JPH04298114A - Digital waveform shaping system - Google Patents

Abstract

PURPOSE:To easily generate a digital signal in which filtering by a digital filter is implemented so that the impulse response indicates an even function. CONSTITUTION:A time slot taking inter-code interference into account of an input data inputted discretely is divided into a past slot and a future slot based on a desired time as a starting point, either the past or the future time slot input data is arranged in a reverse order hourly and an output signal pattern is read from a ROM 12 storing only either the past or the future reply waveform in the impulse response waveform sets of a digital filter going to be used for waveform shaping by using the input data in reverse sequence and the input data of other time slot as an address and read output signal patterns are synthesized to generate a digital signal subjected to filtering by an optional digital filter.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital waveform shaping method that allows easy generation of a digital signal filtered by a digital filter whose impulse response is an even function.

0002

2. Description of the Related Art A signal passing through an arbitrary filter is subjected to intersymbol interference ranging from infinitely past input data to infinitely future input data due to the filter's impulse response. However, the impulse response of such a filter usually becomes smaller as the time slot moves further into the past or future, so in practice it is necessary to ignore interference from the past or future beyond a certain point in time to generate an output signal. method is taken. In this case, if interference of input data that is more than n time slots in the past and future from the relevant time slot is ignored, the output signal is uniquely determined by the input data of 2n+1 time slots in total.

The conventional digital waveform shaping device 1 shown in FIG. 4 first inputs transmission data X(t) into a 2n+1 stage shift register 2, and then inputs data X(-n) to input data for past n time slots. A total of 2n+1 input data patterns including X(-1), input data X(0) for the current time slot, and input data X(1) to X(n) for n future time slots are held. Here, input data 1
If the amount of information per unit is nd bits, nd×(2n+1) stages are required as the shift register 2. Also, 1
When the number of samples per time slot is 1,
Since the sampling theorem poses a problem in the feasibility of a low-pass filter after D/A conversion, sampling is performed at least twice or more than ns times per time slot. 3 is attached. The ROM 4 stores input data X(t) for 2n+1 time slots and filtered signal waveforms using sampling time points as addresses. Here, the outputs A(0) to A(m-1) of the counter 3 that specify sampling points and the input data X(-n) to X(n) stored in the shift register 2 are shown.
) The contents of the ROM 4 can be read out using addresses A(m) to A(2n+m) corresponding to the addresses A(m) to A(2n+m). The data read from the ROM 4 is temporarily transferred to the latch circuit 5.
After being latched in the digital waveform shaping device 1
The output signal is sent to a downstream DA converter (not shown), etc. as an output signal.

0004

[Problems to be Solved by the Invention] The conventional digital waveform shaping device 1 described above has a read-only memory R
The storage capacity of OM4 is nb・ns and nd(2n+1
) is required, and therefore, as the amount of information nd per input data increases, the storage capacity of the ROM 4 increases exponentially. For example, if n
When b=8, ns=4, nd=4, n=7, RO
The storage capacity of M4 was enormous at 4096 MB, and ROM4, whose storage capacity was directly linked to manufacturing cost or purchase cost, had an extremely serious impact on the overall cost of the device. .

On the other hand, as in the digital waveform shaping device 6 shown in FIG. Address A(0)~
A(m-1) and the address A corresponding to the contents of each stage of the shift register 2, which are sequentially switched at high speed via the selector 8.
There is also a method of applying (m) to A(2n+m) to the ROM 7 and adding the output of the ROM 7 and the output of the latch circuit 9 that latches it using an adder 10 and outputting the result. In this case, the storage capacity of ROM7 is nb・ns (2
n+1)nd, so for example, nb=8
, ns=4, nd=4, n=7, ROM7
The storage capacity for this will be 240 bytes. but,
Although the storage capacity of the ROM 7 can be small, it is necessary for the adder 10 to perform the addition operation within a very short time of 1/(2n+1)ns of one time slot length, and the adder 10 is required to be of a high-speed operation type. Of course, there were problems such as having to be prepared for a large amount of power consumption due to the high-speed operation of the adder 10.

[0006]

[Means for Solving the Problems] The present invention has solved the above problems, and is a digital waveform shaping method that generates a digital signal filtered by an arbitrary digital filter whose impulse response is an even function. Divide discretely input input data into past and future based on a desired time for a time slot that takes intersymbol interference into consideration, and reverse the input data of either the past or future time slot in temporal order; Using the reversed input data and the input data of the other time slot as addresses, read output signal patterns from a memory storing only one of the past and future impulse response waveforms of the digital filter; The method is characterized in that the digital signal is generated by combining the signals.

[0007]

[Operation] This invention divides input data that is input discretely into past and future data using a desired time as a starting point for time slots that take intersymbol interference into consideration, and divides the input data of either the past or future time slots into In reverse order of time,
Using the reversed input data and the input data of the other time slot as addresses, output from the memory that stores only one of the past or future response waveforms of the impulse response waveforms of the digital filter to be used for waveform shaping. By reading the signal patterns and synthesizing the read output signal patterns, a digital signal filtered by an arbitrary digital filter is generated.

[0008]

[Example] Hereinafter, an example of this invention will be described with reference to FIGS. 1 and 2.
Explain with reference to. FIG. 1 is a circuit diagram showing an embodiment of a digital waveform shaping device to which the digital waveform shaping method of the present invention is applied, and FIG. 2 is a diagram showing intersymbol interference from the past and the future.

The digital waveform shaping device 11 shown in FIG. 1 uses a ROM 12 that stores only one of the past and future impulse response waveforms of a digital filter whose impulse response is an even function. Then, input data X(t) that is input discretely is held in the shift register 2 for time slots in which intersymbol interference is considered. Furthermore, the input data X(t) held in the shift register 2 is divided into past and future data based on the time slot serving as the starting point. Here, for example, the input data of the past time slot is reversed in time, the reversed past input data and the input data of the future time slot are each used as an address, and these addresses are alternately selected for input. It is applied to the ROM 12 via the selector 13. Furthermore, the output signal patterns read out alternately from the ROM 12 corresponding to the two systems of addresses are sent to the adder 1.
5 and output via the latch circuit 16. Thereby, the configuration is such that a digital signal filtered by an arbitrary digital filter can be generated.

Since the impulse response of the filter is an even function with respect to time, interference from data t times past and interference from t times future are exactly the same. Therefore,
As shown in Fig. 2, the length of one time slot is τ, and the length of one time slot is τ.
The number of samples per time slot is ns, and the subscript indicating the sampling number is j (however, -ns/2<j<n
s/2), and the impulse response waveform of each symbol is
i(t), and the time slot considering interference is ±n, the transmitted signal S(t) is

[0011]

[Math 1]

It is expressed as: By the way, since Xi(t) is an even function,

[0013]

[Math 2]

##EQU1## holds true. Therefore, if we define Yi(t) as a function obtained by rearranging Xi(t) in reverse order with respect to i, we get

[0015]

[Math 3]

Therefore, by setting k=-j, the transmitted signal S(t) becomes

[0017]

[Math 4]

[0018] In this case, since Yk can be calculated from half of the transmitted symbols rearranged in reverse temporal order, the calculation methods for Xj and Yk are basically the same. However, since k=-j, it is necessary to rearrange the sampling numbers in reverse order and then add them.

Input data X(t) is first divided into nd・(2
(n+1) stage shift register 2. X(0)
is the input data of the time slot, and X(-i
) indicates the input data of i timeslot past, and X(i
) indicates input data of i time slots in the future. X(n
) to X(0) are supplied to the selector 13 as addresses A(n+m) to A(m), respectively, and X(-n) to X(0) are also supplied to address A(
n+m) is supplied to the selector 13 as A(m). However, here, since sampling is performed multiple times per time slot, it is necessary to reverse the order of sampling. For this reason, the up counter 17
The address generated by counting up and
The address generated by the down counter 18 counting down is also input to the selector 13. Note that since the outputs of the upcus counter 17 and the downcus counter 18 are in a bit-inverted relationship with each other, one can be generated from the other using a polarity inversion element or an exclusive OR element.

Two sets of addresses A(0) to A(m-1) and A(m) to A(n
+m) address, the output waveform stored in the ROM 12 is read out, the timing is adjusted by a latch, and then added by the adder 15 to obtain the desired output signal waveform.

In this way, the digital waveform shaping device 11
divides discretely input input data into past and future based on a desired time for time slots that take into account intersymbol interference, and then reverses the input data for either the past or future time slots in reverse order. , using the reversed input data and the input data of the other time slot as addresses, respectively, from the ROM 12 that stores only one of the past or future response waveforms of the impulse response waveforms of the digital filter to be used for waveform shaping. By reading the output signal patterns and composing the read output signal patterns, the number of quantization bits per output signal is nb, and the number of samples per time slot is n.
When the number of information bits per input data is nd, the storage capacity required for the ROM 12 is nb.
All you need is ns multiplied by nd to the (n+1) power,
Therefore, the conventional method using ROM 4, which stores both past and future impulse response waveforms of digital filters used for waveform shaping, is
While this requires a huge storage capacity multiplied by 2n+1), the storage capacity can be reduced to the reciprocal of nd to the nth power. That is, for example, nb=8,n
When s = 4, nd = 4, n = 7, the ROM capacity required in the conventional method was 4096 MB, but is now 256 KB.
Only a single byte is required, which greatly reduces memory storage capacity and costs.

On the other hand, input data 1 is also sent to the ROM 7.
A conventional digital waveform shaping device 6 that stores output patterns free of intersymbol interference corresponding to the amount of information per piece, and synthesizes output patterns read out for all input data included in a time slot in which intersymbol interference is considered.
When compared with This avoids the excessive power consumption that occurs when

Note that in order to further reduce the ROM capacity, it is also possible to configure the digital waveform shaping device 21 shown in FIG. 3. The digital waveform shaping device 21 shown in the figure divides the output address of the shift register 2 into four parts, and uses two selectors 22 and 23 to select addresses related to input data with corresponding past and future subscripts. Then, the read operations from the ROMs 24 and 25 connected to the selectors 22 and 23 are performed in parallel with each other, and the adders 26 and 2 connected to the ROMs 24 and 25
7 addition outputs are combined in an adder 28 and then supplied to a latch circuit 29. In this case, ROM2
4 and 25 are both nb if n is an odd number.
・The value obtained by multiplying ns by (n+1)/2 of nd, and also n
If
) is reduced to the power of Therefore, nb=8,n
If s=4, nd=4, n=7, 1K byte ROM
It would be good if there were two. Furthermore, if the number of adders used is not a problem, the output address can be divided into six or more.

[0024]

As explained above, according to the present invention, input data that is input discretely is divided into past and future based on a desired time in a time slot that takes intersymbol interference into consideration. In the future, the input data of one of the time slots will be reversed in time, and the reversed input data and the input data of the other time slot will be used as addresses to create an impulse response waveform of a digital filter that will be used for waveform shaping. Since the output signal patterns are read from the memory that stores only the past or future response waveforms and the read output signal patterns are synthesized, the number of quantization bits per output signal is nb, 1. The number of samples per time slot is n
When the number of information bits per input data is nd, the storage capacity required for the memory is nb・ns
nd multiplied by the (n+1) power. Therefore, the conventional method uses a memory that stores both the past and future impulse response waveforms of the digital filter used for waveform shaping. nb as capacity
・While a huge storage capacity is required, which is ns multiplied by nd to the (2n+1) power, the storage capacity can be reduced to the reciprocal of nd to the nth power, reducing costs by reducing memory storage capacity. It is possible to significantly reduce the burden, and in addition, by storing output patterns free of intersymbol interference for the amount of input data information in the memory, all input data included in a time slot with intersymbol interference taken into account can be stored in the memory. Even compared to conventional digital waveform shaping methods that synthesize output patterns read from This has excellent effects such as being able to avoid excessive power consumption associated with this.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of a digital waveform shaping device to which the digital waveform shaping method of the present invention is applied.

FIG. 2 is a diagram showing intersymbol interference from the past and future.

FIG. 3 is a circuit configuration diagram showing another embodiment of a digital waveform shaping device to which the digital waveform shaping method of the present invention is applied.

FIG. 4 is a circuit configuration diagram showing an example of a conventional digital waveform shaping device.

FIG. 5 is a circuit configuration diagram showing another example of a conventional digital waveform shaping device.

[Explanation of symbols]

2 Shift register 11, 21 Digital waveform shaping device 12, 24, 2
5 ROM 13, 22, 23 Selector 15, 26, 27, 29 Adder

Claims (1)

[Claims] 1. A digital waveform shaping method that generates a digital signal filtered by an arbitrary digital filter whose impulse response is an even function, comprising:
Divide discretely input input data into past and future based on a desired time for a time slot that takes intersymbol interference into consideration, and reverse the input data of either the past or future time slot in temporal order; Using the reversed input data and the input data of the other time slot as addresses, read output signal patterns from a memory storing only one of the past and future impulse response waveforms of the digital filter; A digital waveform shaping method characterized in that the digital signal is generated by combining the digital signals.