JPH04291789A - Multilayer ceramic substrate - Google Patents
Multilayer ceramic substrateInfo
- Publication number
- JPH04291789A JPH04291789A JP5644091A JP5644091A JPH04291789A JP H04291789 A JPH04291789 A JP H04291789A JP 5644091 A JP5644091 A JP 5644091A JP 5644091 A JP5644091 A JP 5644091A JP H04291789 A JPH04291789 A JP H04291789A
- Authority
- JP
- Japan
- Prior art keywords
- multilayer ceramic
- ceramic substrate
- substrate
- via hole
- firing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 44
- 239000000919 ceramic Substances 0.000 title claims abstract description 40
- 239000004020 conductor Substances 0.000 claims abstract description 34
- 239000000843 powder Substances 0.000 claims abstract description 28
- 229910052751 metal Inorganic materials 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims abstract description 24
- 238000010304 firing Methods 0.000 claims description 19
- 239000002245 particle Substances 0.000 claims description 18
- 238000002156 mixing Methods 0.000 claims description 10
- 150000002739 metals Chemical class 0.000 claims description 2
- 239000000203 mixture Substances 0.000 abstract 1
- 239000011229 interlayer Substances 0.000 description 27
- 239000010410 layer Substances 0.000 description 13
- 239000002356 single layer Substances 0.000 description 8
- 230000008602 contraction Effects 0.000 description 6
- 239000007769 metal material Substances 0.000 description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 4
- 229910052750 molybdenum Inorganic materials 0.000 description 4
- 239000011230 binding agent Substances 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000002241 glass-ceramic Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000000354 decomposition reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000002985 plastic film Substances 0.000 description 1
- 229920006255 plastic film Polymers 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は多層セラミック基板に係
わり、特に焼成した際のバイアホールの層間導体の体積
収縮率を、制御性よく(コントローラブルに)基板の体
積収縮率とほゞ同一になした多層セラミック基板に関す
る。[Industrial Application Field] The present invention relates to multilayer ceramic substrates, and in particular, it is possible to controllably controllably make the volumetric contraction rate of interlayer conductors in via holes almost the same as the volumetric contraction rate of the substrate during firing. The present invention relates to a multilayer ceramic substrate.
【0002】近年、電子機器の小型、薄型化の要請に応
えるために、セラミック基板を用いたセラミックパッケ
ージやセラミックプリント板の多様化が進められている
。セラミック基板は、ハイブリッド集積回路においては
古くから用いられているが、最近では半導体素子のよう
な能動素子のチップを直付けするパッケージとか、抵抗
器などの受動素子を高密度に搭載するプリント板とかに
セラミックが用いられるようになっている。そして、回
路装置全体をより小型にしながらより高度な機能を得る
ために、バイアホールを通して数層〜数十層に多層化さ
れた多層セラミック基板が用いられるようになっている
。また、実装密度を上げるために配線パターンの微細化
が進められており、バイアホールの孔径も数十μmの小
さなものになっている。In recent years, in order to meet the demand for smaller and thinner electronic devices, ceramic packages and ceramic printed boards using ceramic substrates have been diversified. Ceramic substrates have been used for a long time in hybrid integrated circuits, but recently they have been used in packages to which active element chips such as semiconductor devices are directly attached, and printed boards in which passive elements such as resistors are mounted in high density. Ceramics are now being used for In order to obtain more advanced functions while making the entire circuit device smaller, multilayer ceramic substrates are being used in which several to several dozen layers are formed through via holes. Further, in order to increase the packaging density, wiring patterns are becoming finer, and the diameter of via holes is also becoming smaller, on the order of tens of micrometers.
【0003】ところが、多層セラミック基板は、絶縁性
の樹脂を用いた多層プリント板に設けられるスルホール
のような、各層を多層に重ねて一括して孔明け、めっき
を行うといった層間接続ができない。そのために、一層
ずつバイアホールによって層間接続しながら重ねていく
方法が採られており、安定した層間接続が可能なバイア
ホールを得る技術が望まれている。However, multilayer ceramic substrates do not allow interlayer connections such as through-holes provided in multilayer printed boards made of insulating resin, such as stacking each layer and drilling and plating them all at once. For this purpose, a method has been adopted in which the layers are stacked one on top of the other while connecting the layers through via holes, and a technique for obtaining via holes that allows stable interlayer connections is desired.
【0004】0004
【従来の技術】図1は多層セラミック基板の一例の一部
切欠き斜視図である。図において、1は単層基板、2は
バイアホール、3は層間導体、4は中間導体、5は表面
導体、6は多層セラミック基板である。2. Description of the Related Art FIG. 1 is a partially cutaway perspective view of an example of a multilayer ceramic substrate. In the figure, 1 is a single layer substrate, 2 is a via hole, 3 is an interlayer conductor, 4 is an intermediate conductor, 5 is a surface conductor, and 6 is a multilayer ceramic substrate.
【0005】単層基板1には、例えばアルミナセラミッ
クやちっ化アルミニウムセラミック、ガラスセラミック
などが用いられる。そして、焼成前は素材の粉末を樹脂
の粘結材で混練した軟らかいいわゆるグリーンシートに
なっている。そして、焼成後は数百μmの層厚になって
おり、予め焼成の際の体積の収縮率を考慮してグリーン
シートは厚めに作られている。[0005] For the single-layer substrate 1, for example, alumina ceramic, aluminum nitride ceramic, glass ceramic, or the like is used. Before firing, the material powder is kneaded with a resin binder to form a soft so-called green sheet. After firing, the layer thickness is several hundred μm, and the green sheet is made thicker in advance in consideration of the volume shrinkage rate during firing.
【0006】単層基板1を重ねてこゝで例示したように
4層の多層セラミック基板6にする場合には、層間接続
を行うためにバイアホール2と呼ばれる孔が設けられる
。このバイアホール2は、グリーンシート状の軟らかい
単層基板1をパンチなどによって穿いて作られる。そし
て、このバイアホール2の中には、層間導体3が形成さ
れる。When the single-layer substrates 1 are stacked to form a four-layer multilayer ceramic substrate 6 as illustrated here, holes called via holes 2 are provided for interlayer connections. This via hole 2 is made by punching a soft single layer substrate 1 in the form of a green sheet. In this via hole 2, an interlayer conductor 3 is formed.
【0007】層間導体3は、例えば、バイアホール2の
底をプラスチックフィルムなどで蓋をし、例えばW(タ
ングステン)とかMo(モリブデン)などの高融点の金
属粉末から作られたペーストを充填して形成される。バ
イアホール2の底の方には金属粉末を詰め、その上にペ
ーストを充填して形成されることもある。The interlayer conductor 3 is formed by, for example, covering the bottom of the via hole 2 with a plastic film or the like, and filling it with a paste made from high melting point metal powder such as W (tungsten) or Mo (molybdenum). It is formed. The bottom of the via hole 2 may be filled with metal powder and then filled with paste.
【0008】また、積層したあと層間に挟まれる第二層
1aや第三層1cの表面には、例えば厚膜ペーストをス
クリーン印刷するなどして中間導体4が形成される。こ
うして得られたグリーンシート状の4枚の単層基板1a
〜1dは、バイアホール2の位置が合致するように重ね
て押圧すると、4枚のそれぞれの層が貼着して一体とな
る。そのあと焼成すれば4層の多層セラミック基板6が
得られる。Further, on the surfaces of the second layer 1a and the third layer 1c which are sandwiched between the laminated layers, an intermediate conductor 4 is formed by, for example, screen printing a thick film paste. Four single-layer substrates 1a in the form of green sheets thus obtained
- 1d are stacked and pressed so that the positions of the via holes 2 match, and the four respective layers are adhered and integrated. After that, by firing, a four-layer multilayer ceramic substrate 6 is obtained.
【0009】一方、第一層1aや第四層1dの表面には
表面導体5が設けられる。この表面導体5は、表面に露
出したバイアホール2の上に被着されて導通可能に適宜
接続される。そして、多層セラミック基板6の上に搭載
される半導体装置や各種デバイスのはんだ付け用パッド
や回路を形成する配線パターンは、この表面導体5によ
って構成される。On the other hand, surface conductors 5 are provided on the surfaces of the first layer 1a and the fourth layer 1d. This surface conductor 5 is deposited on the via hole 2 exposed on the surface and connected appropriately so as to be electrically conductive. Wiring patterns forming soldering pads and circuits of semiconductor devices and various devices mounted on the multilayer ceramic substrate 6 are formed by the surface conductor 5.
【0010】ところで、バイアホール2の中に形成され
る層間導体3は、単層基板1がグリーンシートの状態で
充填されたあと、一体に重ねられて焼成される。ところ
が、単層基板1はグリーンシートから焼成してセラミッ
ク化する間に、溶剤の蒸発やバインダの分解によって例
えば40%とか50%とかいった体積の収縮が起こる。
それと同時に、層間導体3を構成するペーストも、焼成
に際して溶剤の蒸発やバインダの分解によって収縮する
。By the way, the interlayer conductor 3 formed in the via hole 2 is formed by filling the single layer substrate 1 in the form of a green sheet, stacking them together and firing them. However, while the single-layer substrate 1 is fired from a green sheet and turned into a ceramic, the volume shrinks by, for example, 40% or 50% due to evaporation of the solvent and decomposition of the binder. At the same time, the paste constituting the interlayer conductor 3 also shrinks due to evaporation of the solvent and decomposition of the binder during firing.
【0011】そして、この両者1、3の体積収縮率をほ
ゞ合致させないと、焼成したあとの歪みに起因して基板
1やバイアホール2に亀裂が生じ、層間導体3が断線す
るといった重大な障害が間々起こる。[0011] If the volume shrinkage rates of both 1 and 3 are not approximately matched, serious problems such as cracks will occur in the substrate 1 and via hole 2 due to distortion after firing and disconnection of the interlayer conductor 3 will occur. Failures occur from time to time.
【0012】そこで、従来から、層間導体3を構成する
WやMoなどの金属粉末に、基板1が例えばアルミナセ
ラミックの場合ならばアルミナの粉末、ガラスセラミッ
クならばガラスの粉末などを混入して、基板1と層間導
体3の体積収縮率がほゞ同一になるように調整すること
が行われている。Therefore, conventionally, if the substrate 1 is made of alumina ceramic, alumina powder, if the substrate 1 is made of glass ceramic, glass powder, etc. is mixed into the metal powder such as W or Mo constituting the interlayer conductor 3. Adjustments are made so that the volumetric shrinkage rates of the substrate 1 and the interlayer conductor 3 are approximately the same.
【0013】[0013]
【発明が解決しようとする課題】このように、セラミッ
ク基板と層間導体が焼成してセラミック化する際の体積
収縮率をほゞ同一にするために、層間導体を構成する金
属粉末にセラミックの粉末を混入することが従来から行
われている。[Problems to be Solved by the Invention] In this way, in order to make the volume shrinkage rates of the ceramic substrate and the interlayer conductor almost the same when they are fired to form a ceramic, ceramic powder is added to the metal powder constituting the interlayer conductor. It has been conventional practice to mix
【0014】ところが、こうした混入セラミックは、一
般に高絶縁物である。そのため、セラミックを混入する
と層間導体の電気抵抗が大きくなり、多層セラミック基
板の電気特性を悪化させてしまう問題があった。However, such mixed ceramics are generally highly insulating materials. Therefore, when ceramic is mixed, the electrical resistance of the interlayer conductor increases, which causes a problem of deteriorating the electrical characteristics of the multilayer ceramic substrate.
【0015】そこで、本発明は、粒径の異なる金属粉末
を適宜混合してペーストとなし、そのペーストを用いて
焼成したあとの層間導体の体積収縮率を制御性よく調整
して、基板の体積収縮率とほゞ同一となした多層セラミ
ック基板を提供することを目的としている。[0015] Therefore, in the present invention, metal powders having different particle sizes are appropriately mixed to form a paste, and the volume shrinkage rate of the interlayer conductor after firing is adjusted with good controllability, thereby increasing the volume of the substrate. The purpose of the present invention is to provide a multilayer ceramic substrate with substantially the same shrinkage rate.
【0016】[0016]
【課題を解決するための手段】上で述べた課題は、グリ
ーンシートを焼成してなるセラミック基板に設けられた
バイアホールの層間導体が、該グリーンシートを焼成し
た際の体積収縮率とほゞ同一の体積収縮率を有するよう
に、少なくとも二種類の粒径の異なる金属粉末を混合し
てなるペーストによって構成されている多層セラミック
基板によって解決される。[Means for solving the problem] The problem described above is that the interlayer conductor of the via hole provided in the ceramic substrate formed by firing the green sheet has a volume shrinkage rate that is approximately the same as that when the green sheet is fired. This problem is solved by a multilayer ceramic substrate made of a paste made by mixing at least two types of metal powders with different particle sizes so as to have the same volumetric shrinkage rate.
【0017】[0017]
【作用】従来の多層セラミック基板においては、金属粉
末にセラミックを混入して、焼成する際に起こるバイア
ホールの層間導体の体積収縮率を基板の体積収縮率と合
致させる調整を行っていたのに対して、本発明において
は、金属同士を混合して制御性よく調整するようにして
いる。[Operation] In conventional multilayer ceramic substrates, ceramic is mixed with metal powder, and the volumetric shrinkage rate of the interlayer conductor in the via hole that occurs during firing is adjusted to match the volumetric shrinkage rate of the board. On the other hand, in the present invention, the metals are mixed with each other and adjusted with good controllability.
【0018】すなわち、バイアホールの層間導体を構成
するペーストには、同種の金属にしろ、異種の金属にし
ろ、少なくとも二種類の粒径の異なる金属粉末を混合す
るようにしている。そして、粒径と混合比を適宜選択し
て、焼成した際のいろいろな体積収縮率を得るようにし
ている。That is, the paste constituting the interlayer conductor of the via hole is made by mixing at least two types of metal powders with different particle sizes, whether they are the same type of metal or different types of metal. Then, by appropriately selecting the particle size and mixing ratio, various volumetric shrinkage rates can be obtained upon firing.
【0019】そうすると、層間導体の体積収縮率を基板
の体積収縮率とほゞ同一にすることができるので、両者
の体積収縮率の不合致に起因して生じる障害を防ぐこと
ができる。[0019] Then, the volumetric contraction rate of the interlayer conductor can be made almost the same as the volumetric contraction rate of the substrate, so that it is possible to prevent problems caused by a mismatch between the volumetric contraction rates of the two.
【0020】[0020]
【実施例】層間導体を構成する金属粉末にはいろいろな
金属材料を用いることができ、基板が高温で焼成される
アルミナセラミックなどの場合には、WやMoなどの金
属材料を用いる。それに対して、ガラスセラミックのよ
うな比較的低温で焼成される場合には、Ag(銀)とか
Cu(銅)などの金属材料を用いる。[Embodiment] Various metal materials can be used for the metal powder constituting the interlayer conductor, and when the substrate is made of alumina ceramic or the like which is fired at a high temperature, a metal material such as W or Mo is used. On the other hand, when firing at a relatively low temperature such as glass ceramic, a metal material such as Ag (silver) or Cu (copper) is used.
【0021】そして、こうした金属材料の粒径の異なる
金属粉末を混合してペーストを調合し、焼成したあとの
体積収縮率がどのように変わるかを、Wを例として採り
上げ表1に示す。[0021] Taking W as an example, Table 1 shows how the volume shrinkage rate changes after a paste is prepared by mixing metal powders of different particle sizes of these metal materials and firing.
【0022】[0022]
【表1】[Table 1]
【0023】表1には、粒径が 0.5μmと1μm、
および 0.5μmと3μmの2種類のW粉末の組み合
わせについて、混合比を変えたときの平均粒径と焼成し
たあとの体積収縮率を示している。Table 1 shows that the particle sizes are 0.5 μm and 1 μm,
and For combinations of two types of W powder, 0.5 μm and 3 μm, the average particle diameter and volume shrinkage after firing are shown when the mixing ratio is changed.
【0024】この表1から、粒径の小さい方の金属粉末
を増やしていくと体積収縮率が増大し、粒径の大きい方
の金属粉末を増やしていくと体積収縮率が減少する傾向
にあることが分かる。そして、例えば平均粒径がほゞ等
しい1μm:90/3μm:10のペーストと 0.5
μm:70/3μm:30のペーストとで体積収縮率が
異なるのは、粒径によって分散の程度が異なるために、
粉末の充填率に差が生じるためと思われる。[0024] From Table 1, it can be seen that as the metal powder with a smaller particle size is increased, the volumetric shrinkage rate increases, and as the metal powder with a larger particle size is increased, the volumetric shrinkage rate tends to decrease. I understand that. Then, for example, paste with the average particle size of 1 μm:90/3 μm:10 and 0.5
The reason why the volume shrinkage rate is different between the paste with μm:70/3μm:30 is because the degree of dispersion differs depending on the particle size.
This seems to be due to the difference in powder filling rate.
【0025】こゝで示した例の場合には、基板の焼成後
の体積収縮率が44.4%なので、例えば、体積収縮率
が44.0%の1μm:90/3μm:10のペースト
、あるいは体積収縮率が45.0%の 0.5μm:5
0/3μm:50のペーストなどを用いて層間導体3を
設ければ、安定した層間接続ができる。In the case of the example shown here, the volume shrinkage rate after firing of the substrate is 44.4%, so for example, a paste of 1 μm:90/3 μm:10 with a volume shrinkage rate of 44.0%, Or 0.5 μm with a volume shrinkage rate of 45.0%: 5
If the interlayer conductor 3 is provided using a 0/3 μm:50 paste or the like, stable interlayer connection can be achieved.
【0026】こうした効果は、Wばかりでなく、例えば
MoやAg、Cuといった金属材料の粉末についても得
ることが確認できている。何れにしても、粒径の異なる
金属粉末を混合することによって、焼成したあとの体積
収縮率をいろいろ変えることができる。従って、金属粉
末の粒径と混合比を適宜選択することによってバイアホ
ールの層間導体の体積収縮率を基板の体積収縮率とほゞ
同一となした多層セラミック基板を作ることができる。It has been confirmed that such effects can be obtained not only with W but also with powders of metal materials such as Mo, Ag, and Cu. In any case, by mixing metal powders with different particle sizes, the volume shrinkage rate after firing can be varied. Therefore, by appropriately selecting the particle size and mixing ratio of the metal powder, it is possible to produce a multilayer ceramic substrate in which the volumetric contraction rate of the interlayer conductor of the via hole is approximately the same as that of the substrate.
【0027】なお、こゝでは、金属粉末の粒径が2種類
の場合について例示したが、金属粉末の粒径の種類や混
合比には、種々の変形が可能である。[0027] Here, an example has been exemplified in which the metal powder has two types of particle sizes, but various modifications can be made to the types of particle sizes and the mixing ratio of the metal powder.
【0028】[0028]
【発明の効果】多層セラミック基板において、バイアホ
ールを構成する層間導体に用いるペーストの焼成した際
の体積収縮率を調整するのに、従来は例えばセラミック
の粉末を混入していた。それに対して、本発明において
は、粒径の異なる金属粉末を混合することによって調整
している。そして、従来のような層間導体の電気抵抗が
増大することを避けるようにしている。[Effects of the Invention] Conventionally, in a multilayer ceramic substrate, ceramic powder, for example, has been mixed in to adjust the volumetric shrinkage rate upon firing of the paste used for the interlayer conductor constituting the via hole. In contrast, in the present invention, the particle size is adjusted by mixing metal powders with different particle sizes. In addition, an increase in the electrical resistance of the interlayer conductor as in the prior art is avoided.
【0029】その結果、安定したバイアホールを作るこ
とができるようになり、今後ますます微細化していく傾
向にある例えば半導体装置を実装するセラミックパッケ
ージなどの多層セラミック基板を実現することに対して
、本発明は寄与するところが大である。As a result, it has become possible to create stable via holes, which is useful for realizing multilayer ceramic substrates such as ceramic packages for mounting semiconductor devices, which will become increasingly finer in the future. The present invention makes a significant contribution.
【図1】 多層セラミック基板の一例の一部切欠き斜
視図である。FIG. 1 is a partially cutaway perspective view of an example of a multilayer ceramic substrate.
1 単層基板
2 バイアホール3 層間導体
4 中間導体5 表面導体
6 多層セラミッ
ク基板1 Single layer board
2 Via hole 3 Interlayer conductor
4 Intermediate conductor 5 Surface conductor
6 Multilayer ceramic substrate
Claims (2)
ック基板に設けられたバイアホールの層間導体が、該グ
リーンシートを焼成した際の体積収縮率とほゞ同一の体
積収縮率を有するように、少なくとも二種類の粒径が異
なる金属粉末を混合してなるペーストによって構成され
ていることを特徴とする多層セラミック基板。Claim 1: At least at least one conductor of a via hole provided in a ceramic substrate formed by firing a green sheet has a volumetric shrinkage rate that is substantially the same as the volumetric shrinkage rate when the green sheet is fired. A multilayer ceramic substrate characterized by being composed of a paste made by mixing two types of metal powders with different particle sizes.
異種金属からなる請求項1記載の多層セラミック基板。2. The multilayer ceramic substrate according to claim 1, wherein the metal powder comprises at least two different types of metals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5644091A JPH04291789A (en) | 1991-03-20 | 1991-03-20 | Multilayer ceramic substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5644091A JPH04291789A (en) | 1991-03-20 | 1991-03-20 | Multilayer ceramic substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04291789A true JPH04291789A (en) | 1992-10-15 |
Family
ID=13027147
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5644091A Withdrawn JPH04291789A (en) | 1991-03-20 | 1991-03-20 | Multilayer ceramic substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04291789A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6657306B1 (en) * | 1998-06-01 | 2003-12-02 | Kabushiki Kaisha Toshiba | Paste including a mixture of powders, connection plug, burying method, and semiconductor device manufacturing method |
-
1991
- 1991-03-20 JP JP5644091A patent/JPH04291789A/en not_active Withdrawn
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6657306B1 (en) * | 1998-06-01 | 2003-12-02 | Kabushiki Kaisha Toshiba | Paste including a mixture of powders, connection plug, burying method, and semiconductor device manufacturing method |
US7049223B2 (en) | 1998-06-01 | 2006-05-23 | Kabushiki Kaisha Toshiba | Paste including a mixture of powders, connection plug, burying method, and semiconductor device manufacturing method |
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