JPH04288711A - Distortion compensating circuit for amplifier - Google Patents

Distortion compensating circuit for amplifier

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Publication number
JPH04288711A
JPH04288711A JP3295491A JP3295491A JPH04288711A JP H04288711 A JPH04288711 A JP H04288711A JP 3295491 A JP3295491 A JP 3295491A JP 3295491 A JP3295491 A JP 3295491A JP H04288711 A JPH04288711 A JP H04288711A
Authority
JP
Japan
Prior art keywords
distortion
amplifier
output
generating
compensation circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3295491A
Other languages
Japanese (ja)
Inventor
Kenji Suematsu
憲治 末松
Morishige Hieda
護重 檜枝
Shuji Urasaki
修治 浦崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3295491A priority Critical patent/JPH04288711A/en
Publication of JPH04288711A publication Critical patent/JPH04288711A/en
Pending legal-status Critical Current

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  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

PURPOSE:To compensate the distortion of a high output amplifier having various distortion characteristics over a wide dynamic range by adjusting a bias to the driving electrode or the control electrode of a transistor used for an amplifier for generating distortion in the distortion compensating circuit.. CONSTITUTION:A variable voltage source is connected to a drain bias terminal 50 of the transistor used for an amplifier 20 for generating distortion in a distortion compensating circuit 10 so as to adjust a voltage Vd of the transistor. When the high output amplifier having satisfactory linearity is used as a high output amplifier 40 to compensate the distortion, the Vd of the amplifier 20 for generating distortion in the distortion compensating circuit 1O is increased and the distortion characteristic of the amplifier 20 for generating distortion is approximated to the distortion characteristic of the high output amplifier 40 so as to compensate the distortion over the wide dynamic range. When compensating the distortion of the high output amplifier 40 having defective linearity, the Vd of the amplifier 20 for generating distortion is decreased so as to compensate the distortion over the wide dynamic range.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明はマイクロ波・ミリ波帯
を含む高周波帯の高出力増幅器の非線形性により生じる
信号歪を補償する歪補償回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distortion compensation circuit that compensates for signal distortion caused by nonlinearity of high-output amplifiers in high frequency bands including microwave and millimeter wave bands.

【0002】0002

【従来の技術】図10は、例えば特開昭52ー5240
号公報に示された従来の歪補償回路付き高出力増幅器を
示す構成図である。図において、1は入力端子、2は出
力端子、10は歪補償回路、40は歪を補償すべき高出
力増幅器である。また、歪補償回路10において、12
は入力端子1に入力した信号を3分配する分配器、20
は歪発生用増幅器、21および22は線形増幅器、25
a〜25eは可変減衰器、30は上記歪発生用増幅器2
0と上記線形増幅器21の出力を逆相で合成し、歪を抽
出する歪抽出用合成器、31は上記歪抽出用合成器30
で抽出した歪と上記線形増幅器22の出力とを逆相で合
成する合成器である。
2. Description of the Related Art FIG. 10 shows, for example,
1 is a configuration diagram showing a conventional high-output amplifier with a distortion compensation circuit disclosed in the publication. In the figure, 1 is an input terminal, 2 is an output terminal, 10 is a distortion compensation circuit, and 40 is a high output amplifier whose distortion is to be compensated. Furthermore, in the distortion compensation circuit 10, 12
is a divider that divides the signal input to input terminal 1 into three parts, 20
is a distortion generation amplifier, 21 and 22 are linear amplifiers, 25
a to 25e are variable attenuators; 30 is the distortion generation amplifier 2;
0 and the output of the linear amplifier 21 in opposite phase to extract distortion; 31 is the distortion extraction synthesizer 30;
This is a synthesizer that combines the distortion extracted in the above and the output of the linear amplifier 22 in opposite phase.

【0003】次に動作について説明する。入力端子1に
入力した信号は歪補償回路10に導入され、分配器12
で3分配される。分配器12の第1の分配出力は可変減
衰器25aにより所定の電力に減衰された後に、歪発生
用増幅器20に導入される。歪発生用増幅器の入力電力
は可変減衰器25aで調整される。歪発生用増幅器20
によって増幅された信号は歪成分を含んで導出され、可
変減衰器25bを通して歪抽出用合成器30に導入され
る。分配器12の第2の分配出力は可変減衰器25cを
通して線形増幅器21に導入される。線形増幅器21で
信号が増幅される際に歪が発生しないように、可変減衰
器25cの減衰量は設定される。線形増幅器21の歪を
含まない出力は歪抽出用合成器30に導入され、歪発生
用増幅器20の歪を含んだ出力と逆相で合成される。こ
の際、逆相で合成する信号の振幅が等しくなるように可
変減衰器25bの減衰量は設定することにより、信号は
相殺され、歪発生用増幅器20で発生した歪のみが抽出
される。歪抽出用合成器30で抽出された歪は、可変減
衰器25dを通じて合成器31に導入される。分配器1
2の第3の分配出力は可変減衰器25eを通じて線形増
幅器22で歪を含まずに増幅され、合成器31に導入さ
れる。ここで、線形増幅器22で信号が増幅される際に
歪が発生しないように、可変減衰器25eの減衰量は設
定される。合成器31の出力すなわち歪補償回路10の
出力には高出力増幅器40が接続されており、合成器3
1において歪抽出用合成器30で抽出された歪は、高出
力増幅器40で生じる歪を相殺するように可変減衰器2
5dで振幅が調整され、線形増幅器22で増幅された信
号と合成される。したがって、高出力増幅器40の出力
端子2には信号成分のみが出力される。
Next, the operation will be explained. The signal inputted to the input terminal 1 is introduced into the distortion compensation circuit 10, and then passed through the distributor 12.
It will be divided into 3 parts. The first distributed output of the distributor 12 is attenuated to a predetermined power by the variable attenuator 25a and then introduced into the distortion generating amplifier 20. The input power of the distortion generating amplifier is adjusted by a variable attenuator 25a. Distortion generation amplifier 20
The amplified signal containing distortion components is derived and introduced into the distortion extraction synthesizer 30 through the variable attenuator 25b. The second distributed output of the distributor 12 is introduced into the linear amplifier 21 through the variable attenuator 25c. The amount of attenuation of the variable attenuator 25c is set so that no distortion occurs when the signal is amplified by the linear amplifier 21. The distortion-free output of the linear amplifier 21 is introduced into the distortion extracting combiner 30, and is combined with the distortion-containing output of the distortion generating amplifier 20 in reverse phase. At this time, by setting the amount of attenuation of the variable attenuator 25b so that the amplitudes of the signals synthesized in opposite phases are equal, the signals are canceled and only the distortion generated by the distortion generating amplifier 20 is extracted. The distortion extracted by the distortion extraction synthesizer 30 is introduced into the synthesizer 31 through the variable attenuator 25d. Distributor 1
The third distributed output of 2 is amplified without distortion by the linear amplifier 22 through the variable attenuator 25e, and introduced into the combiner 31. Here, the amount of attenuation of the variable attenuator 25e is set so that no distortion occurs when the signal is amplified by the linear amplifier 22. A high output amplifier 40 is connected to the output of the synthesizer 31, that is, the output of the distortion compensation circuit 10.
1, the distortion extracted by the distortion extraction synthesizer 30 is transmitted to the variable attenuator 2 so as to cancel out the distortion generated by the high output amplifier 40.
The amplitude is adjusted at 5d and combined with the signal amplified by the linear amplifier 22. Therefore, only the signal component is output to the output terminal 2 of the high-power amplifier 40.

【0004】0004

【発明が解決しようとする課題】従来の高周波増幅器の
歪補償回路は以上のように構成されているので、歪補償
回路内の歪発生用増幅器の入力電力に対する歪特性が、
高出力増幅器の入力電力に対する歪特性と類似していな
いと、広い入力電力範囲にわたって高出力増幅器の歪を
補償できないために、異なる種類の高出力増幅器の歪を
補償する際には、歪発生用増幅器を歪特性の類似したも
のに交換する必要があるという問題点があった。
[Problems to be Solved by the Invention] Since the conventional distortion compensation circuit of a high frequency amplifier is constructed as described above, the distortion characteristics with respect to the input power of the distortion generating amplifier in the distortion compensation circuit are as follows.
If the distortion characteristics of a high-power amplifier are not similar to the input power, it will not be possible to compensate for the distortion of a high-power amplifier over a wide input power range. There was a problem in that it was necessary to replace the amplifier with one with similar distortion characteristics.

【0005】この発明は上記のような問題点を解決する
ためになされたもので、歪補償回路内の歪発生用増幅器
を交換せずに、異なる歪特性を持つ高出力増幅器の歪を
、広いダイナミックレンジにわたり補償できる歪補償回
路を得ることを目的とする。
The present invention was made to solve the above-mentioned problems, and it is possible to widely reduce the distortion of high-output amplifiers with different distortion characteristics without replacing the distortion generating amplifier in the distortion compensation circuit. The purpose of this invention is to obtain a distortion compensation circuit that can compensate over a dynamic range.

【0006】[0006]

【課題を解決するための手段】この発明に係る高周波増
幅器の歪補償回路は、歪を補償すべき高出力増幅器の入
力電力に対する歪特性に応じて、歪補償回路内の歪発生
用増幅器に用いるトランジスタの駆動電極あるいは制御
電極へのバイアスを調整可能としたものである。
[Means for Solving the Problems] A distortion compensation circuit for a high frequency amplifier according to the present invention is used in a distortion generation amplifier in the distortion compensation circuit according to the distortion characteristics with respect to the input power of the high output amplifier whose distortion is to be compensated. This makes it possible to adjust the bias applied to the drive electrode or control electrode of the transistor.

【0007】[0007]

【作用】この発明においては、歪補償回路内の歪発生用
増幅器に用いるトランジスタの駆動電極あるいは制御電
極へのバイアスを調整することにより、歪発生用増幅器
の入力電力に対する歪特性を、歪を補償すべき高出力増
幅器の歪特性に類似させることができるので、異なる歪
特性を持つ複数種類の高出力増幅器に対して、歪発生用
増幅器を交換することなく適用できる。
[Operation] In the present invention, by adjusting the bias to the drive electrode or control electrode of the transistor used in the distortion generation amplifier in the distortion compensation circuit, the distortion characteristics with respect to the input power of the distortion generation amplifier are compensated for. Since the distortion characteristics can be made similar to the distortion characteristics of a high-output amplifier, it can be applied to multiple types of high-output amplifiers having different distortion characteristics without replacing the distortion generating amplifier.

【0008】[0008]

【実施例】実施例1. 図1はこの発明の一実施例を示す構成図であり、1は入
力端子、2は出力端子、10は歪補償回路、40は歪を
補償すべき高出力増幅器である。また、歪補償回路10
において、12は入力端子1に入力した信号を3分配す
る分配器、20は歪発生用増幅器、21および22は線
形増幅器、25a〜25eは可変減衰器、30は上記歪
発生用増幅器20と上記線形増幅器21の出力を逆相で
合成し、歪を抽出する歪抽出用合成器、31は上記歪抽
出用合成器30で抽出した歪と上記線形増幅器22の出
力とを逆相で合成する合成器、50は歪発生用増幅器2
0に用いられているトランジスタのドレインまたはコレ
クタのバイアス端子、60は上記バイアス端子50に接
続された可変電圧源である。
[Example] Example 1. FIG. 1 is a block diagram showing an embodiment of the present invention, where 1 is an input terminal, 2 is an output terminal, 10 is a distortion compensation circuit, and 40 is a high output amplifier whose distortion is to be compensated. In addition, the distortion compensation circuit 10
, 12 is a divider that divides the signal input to input terminal 1 into three parts, 20 is a distortion generation amplifier, 21 and 22 are linear amplifiers, 25a to 25e are variable attenuators, and 30 is the distortion generation amplifier 20 and the above. A distortion extraction combiner 31 combines the outputs of the linear amplifiers 21 in reverse phase and extracts distortion; 31 is a combiner that combines the distortion extracted by the distortion extraction combiner 30 and the output of the linear amplifier 22 in reverse phase; 50 is a distortion generation amplifier 2
A bias terminal 60 of the drain or collector of the transistor used in 0 is a variable voltage source connected to the bias terminal 50.

【0009】前記のように構成された歪補償回路におい
ては、歪補償回路10内の歪発生用増幅器20に用いら
れているトランジスタのドレインバイアス端子50に可
変電圧源60が接続されており、上記トランジスタのド
レイン電圧Vdを調整できる構成となっている。
In the distortion compensation circuit configured as described above, a variable voltage source 60 is connected to the drain bias terminal 50 of the transistor used in the distortion generation amplifier 20 in the distortion compensation circuit 10. The structure is such that the drain voltage Vd of the transistor can be adjusted.

【0010】図2は、歪発生用増幅器20としてFET
増幅器を用い、ドレイン電圧Vdを3V、5V、7Vと
した時の3次混変調歪IM3 の入力電力Pin依存性
を示したものである。なお、3次混変調歪とは、複数の
異なる周波数の信号を増幅器で同時に増幅した時に増幅
器の非線形性により生じる歪のひとつであり、周波数f
1 とf2 の2信号を増幅する際に2f2 −f1 
と2f1 −f2 の周波数成分を持つ歪を示す。図2
において、Vdが低いほど、より低いPinで歪が生じ
る。
FIG. 2 shows an FET as a distortion generating amplifier 20.
This figure shows the dependence of the third-order intermodulation distortion IM3 on the input power Pin when an amplifier is used and the drain voltage Vd is set to 3V, 5V, and 7V. Note that third-order cross-modulation distortion is one type of distortion that occurs due to the nonlinearity of an amplifier when multiple signals of different frequencies are amplified simultaneously by an amplifier, and
When amplifying two signals of 1 and f2, 2f2 - f1
and 2f1 −f2 frequency components. Figure 2
In this case, the lower the Vd, the more distortion occurs at the lower Pin.

【0011】歪を補償すべき高出力増幅器40としては
、線形性の良好な増幅器ばかりでなく、効率の面から、
線形性の不良な増幅器を用いる場合がある。図3は線形
性の良好な増幅器のIM3 の出力電力Pout依存性
の一例を、図4は線形性の不良な増幅器のIM3 のP
out依存性の一例を示したものである。出力電力を低
くすると、線形性の良好な増幅器は図3のように急激に
歪が減少するが、線形性の不良な増幅器は図4のように
あまり歪は減少しない。
The high-output amplifier 40 for which distortion should be compensated is not limited to an amplifier with good linearity, but also an amplifier with good efficiency.
An amplifier with poor linearity may be used. Figure 3 shows an example of the output power Pout dependence of IM3 of an amplifier with good linearity, and Figure 4 shows an example of the Pout dependence of IM3 of an amplifier with poor linearity.
This shows an example of out dependence. When the output power is lowered, the distortion of an amplifier with good linearity decreases rapidly as shown in FIG. 3, but the distortion of an amplifier with poor linearity does not decrease much as shown in FIG. 4.

【0012】歪を補償すべき高出力増幅器40として図
3の歪特性を持つ線形性の良好な高出力増幅器を用いて
歪補償を行った結果を図5に示す。歪補償回路10内の
歪発生用増幅器20のVdを7Vとすると広いダイナミ
ックレンジにわたり歪を補償することができるが、Vd
を3Vとすると低い出力電力領域において歪補償回路1
0では歪が発生しているのに高出力増幅器40では歪は
ほとんど発生しないために歪補償回路10により歪が増
加してしまう。したがって、線形性の良好な高出力増幅
器の歪補償を行う際は、歪補償回路10の歪発生用増幅
器20のVdを高くして、歪発生用増幅器20に歪特性
と高出力増幅器の歪特性とを近似することにより、広い
ダイナミックレンジにわたり歪を補償することができる
FIG. 5 shows the results of distortion compensation performed using a high output amplifier 40 with good linearity and the distortion characteristics shown in FIG. 3 as the high output amplifier 40 whose distortion is to be compensated. If Vd of the distortion generation amplifier 20 in the distortion compensation circuit 10 is set to 7V, distortion can be compensated over a wide dynamic range.
is 3V, the distortion compensation circuit 1 in the low output power region
0, distortion occurs, but in the high output amplifier 40, almost no distortion occurs, so the distortion is increased by the distortion compensation circuit 10. Therefore, when performing distortion compensation for a high-output amplifier with good linearity, the Vd of the distortion generation amplifier 20 of the distortion compensation circuit 10 is increased, and the distortion characteristics of the distortion generation amplifier 20 and the distortion characteristics of the high-output amplifier are increased. By approximating , distortion can be compensated over a wide dynamic range.

【0013】歪を補償すべき高出力増幅器40として図
4の歪特性を持つ線形性の良好な高出力増幅器を用いて
歪補償を行った結果を図6に示す。歪補償回路10内の
歪発生用増幅器20のVdを3Vとすると広いダイナミ
ックレンジにわたり歪を補償することができるが、Vd
を7Vとすると低い出力電力領域において歪補償回路1
0では歪が発生していないのに高出力増幅器40では歪
が発生するために歪補償回路10によって歪は減少しな
い。したがって、線形性の不良な高出力増幅器の歪補償
を行う際は、歪補償回路10の歪発生用増幅器20のV
dを低くして、歪発生用増幅器20の歪特性と高出力増
幅器の歪特性とを近似することにより、広いダイナミッ
クレンジにわたり歪を補償することができる。
FIG. 6 shows the results of distortion compensation performed using a high output amplifier 40 with good linearity and the distortion characteristics shown in FIG. 4 as the high output amplifier 40 whose distortion is to be compensated. If Vd of the distortion generation amplifier 20 in the distortion compensation circuit 10 is set to 3V, distortion can be compensated over a wide dynamic range.
is 7V, the distortion compensation circuit 1 in the low output power region
0, no distortion occurs, but the high output amplifier 40 produces distortion, so the distortion is not reduced by the distortion compensation circuit 10. Therefore, when performing distortion compensation for a high-output amplifier with poor linearity, the voltage of the distortion generation amplifier 20 of the distortion compensation circuit 10 is
By lowering d and approximating the distortion characteristics of the distortion generating amplifier 20 and the distortion characteristics of a high-output amplifier, it is possible to compensate for distortion over a wide dynamic range.

【0014】以上のように、広いダイナミックレンジに
わたり歪を補償するためには、歪を補償すべき高出力増
幅器40の歪特性と歪補償回路10内の歪発生用増幅器
20の歪特性とは近似している必要がある。
As described above, in order to compensate for distortion over a wide dynamic range, the distortion characteristics of the high-output amplifier 40 that should be compensated for distortion and the distortion characteristics of the distortion generating amplifier 20 in the distortion compensation circuit 10 are similar to each other. Must be.

【0015】例えば、固体高出力増幅器のような線形性
の良好な増幅器に対してはFET増幅器のVdを5V以
上という高い電圧に設定すればよいし、また、進行波管
増幅器のような線形性の不良な増幅器に対してはVdを
5V以下という低い電圧に設定すればよい。
For example, for an amplifier with good linearity such as a solid state high output amplifier, Vd of the FET amplifier may be set to a high voltage of 5 V or more, and for an amplifier with good linearity such as a traveling wave tube amplifier For such defective amplifiers, Vd may be set to a low voltage of 5V or less.

【0016】実施例2.上記実施例1では、歪発生用増
幅器20のVdだけを変化させたが、Vdにより増幅器
の通過位相が変化する場合は、線形増幅器21のVdも
同時に変化させることにより、歪抽出用合成器30で歪
発生用増幅器20の出力と線形増幅器21の出力を合成
する際の位相関係が保たれる。
Example 2. In the first embodiment, only the Vd of the distortion generating amplifier 20 is changed, but if the passing phase of the amplifier changes due to Vd, the Vd of the linear amplifier 21 is also changed at the same time. The phase relationship is maintained when the output of the distortion generating amplifier 20 and the output of the linear amplifier 21 are combined.

【0017】実施例3.上記実施例2においては、増幅
器のVdによる通過位相の変化を考慮し線形増幅器21
のVdを歪発生用増幅器20のVdと共通としたが、合
成器31で歪抽出用合成器30で抽出した歪と線形増幅
器22の出力とを逆相で合成することに注目し、線形増
幅器22のVdも歪発生用増幅器20のVdと共通にし
てもよい。
Example 3. In the second embodiment, considering the change in the passing phase due to the Vd of the amplifier, the linear amplifier 21
The Vd of the distortion generating amplifier 20 was made common to the Vd of the distortion generating amplifier 20, but focusing on the fact that the synthesizer 31 synthesizes the distortion extracted by the distortion extracting synthesizer 30 and the output of the linear amplifier 22 in opposite phase, the linear amplifier The Vd of the distortion generating amplifier 22 may also be made common to the Vd of the distortion generating amplifier 20.

【0018】実施例4.上記実施例1〜3では、Vdに
より歪発生用増幅器20のPinに対する歪特性を変化
させたが、Vdのかわりにゲート電圧Vgで前記歪特性
を制御してもよい。図7に、上記実施例3に対応するV
gによる調整手段を持つ歪補償回路の構成図を示す。図
において、51はゲートあるいはベースのバイアス端子
である。
Example 4. In the first to third embodiments described above, the distortion characteristics with respect to the pin of the distortion generating amplifier 20 are changed by Vd, but the distortion characteristics may be controlled by the gate voltage Vg instead of Vd. FIG. 7 shows V corresponding to the third embodiment above.
FIG. 7 shows a configuration diagram of a distortion compensation circuit having adjustment means according to g. In the figure, 51 is a gate or base bias terminal.

【0019】図8は増幅器A級、AB級、B級動作する
ようにFET増幅器のVgを設定した時のPinに対す
るIM3 特性を示したものである。Vdのかわりに、
Vgにより歪特性を制御できる。
FIG. 8 shows the IM3 characteristic with respect to Pin when the Vg of the FET amplifier is set so that the amplifier operates as class A, class AB, or class B. Instead of Vd,
Distortion characteristics can be controlled by Vg.

【0020】実施例5.上記実施例4では、Vgだけで
歪特性を変化させたが、VdとVgの両方により歪特性
を変化させてもよい。
Example 5. In the fourth embodiment, the distortion characteristics are changed only by Vg, but the distortion characteristics may be changed by both Vd and Vg.

【0021】実施例6.上記実施例1〜5においては、
1個の歪発生用増幅器と2個の線形増幅器とからなる回
路構成について説明したが、他の回路構成においても同
様な効果を奏する。
Example 6. In Examples 1 to 5 above,
Although the circuit configuration consisting of one distortion generating amplifier and two linear amplifiers has been described, similar effects can be achieved with other circuit configurations.

【0022】図9は他の回路構成の歪補償回路に対して
適応させた例であり、図において、11aは入力端子1
に入力した信号を2分配する分配器、11bは線形増幅
器21で増幅した信号を歪抽出用合成器30と合成器3
1に2分配する分配器である。この場合は1個の歪発生
用増幅器20と線形増幅器21のVdを変化させること
により同様の効果を奏する。
FIG. 9 shows an example adapted to a distortion compensation circuit having another circuit configuration. In the figure, 11a is the input terminal 1.
A divider 11b divides the input signal into two parts, and a divider 11b divides the signal amplified by the linear amplifier 21 into a distortion extraction combiner 30 and a combiner 3.
This is a distributor that divides 1 into 2. In this case, the same effect can be achieved by changing the Vd of one distortion generating amplifier 20 and one linear amplifier 21.

【0023】[0023]

【発明の効果】以上のようにこの発明によれば、歪補償
回路内の歪発生用増幅器に用いるトランジスタの駆動電
極あるいは制御電極へのバイアスを調整することにより
、歪特性の異なる増幅器に対して、広いダイナミックレ
ンジにわたり歪補償を行うことができるという効果があ
る。
As described above, according to the present invention, by adjusting the bias to the drive electrode or the control electrode of the transistor used in the distortion generating amplifier in the distortion compensation circuit, amplifiers with different distortion characteristics can be adjusted. This has the advantage that distortion compensation can be performed over a wide dynamic range.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】この発明の実施例1による歪補償回路の構成図
である。
FIG. 1 is a configuration diagram of a distortion compensation circuit according to a first embodiment of the present invention.

【図2】この発明の実施例1に用いる歪発生用増幅器の
ドレイン電圧をパラメータとした歪特性である。
FIG. 2 shows distortion characteristics using the drain voltage of the distortion generating amplifier used in Example 1 of the present invention as a parameter.

【図3】この発明の実施例1による歪を補償される線形
性の良好な高出力増幅器の歪特性である。
FIG. 3 shows distortion characteristics of a high-output amplifier with good linearity and which is compensated for distortion according to the first embodiment of the present invention.

【図4】この発明の実施例1による歪を補償される線形
性の不良な高出力増幅器の歪特性である。
FIG. 4 shows distortion characteristics of a high-power amplifier with poor linearity whose distortion is compensated for according to the first embodiment of the present invention.

【図5】この発明の実施例1による歪補償回路を用いて
歪補償を行った時の、図3に示した高出力増幅器の歪特
性である。
FIG. 5 shows distortion characteristics of the high-output amplifier shown in FIG. 3 when distortion compensation is performed using the distortion compensation circuit according to the first embodiment of the present invention.

【図6】この発明の実施例1による歪補償回路を用いて
歪補償を行った時の、図4に示した高出力増幅器の歪特
性である。
FIG. 6 shows distortion characteristics of the high-output amplifier shown in FIG. 4 when distortion compensation is performed using the distortion compensation circuit according to the first embodiment of the present invention.

【図7】この発明の実施例4による歪補償回路の構成図
である。
FIG. 7 is a configuration diagram of a distortion compensation circuit according to a fourth embodiment of the present invention.

【図8】この発明の実施例4による歪発生用増幅器のゲ
ート電圧をパラメータとした歪特性である。
FIG. 8 shows distortion characteristics using the gate voltage as a parameter of the distortion generating amplifier according to the fourth embodiment of the present invention.

【図9】この発明の実施例6による歪補償回路の構成図
である。
FIG. 9 is a configuration diagram of a distortion compensation circuit according to a sixth embodiment of the present invention.

【図10】従来の歪補償回路の構成図である。FIG. 10 is a configuration diagram of a conventional distortion compensation circuit.

【符号の説明】[Explanation of symbols]

1  入力端子 2  出力端子 10  歪補償回路 11a、11b  分配器 12  3分配器 20  歪発生用増幅器 21、22  線形増幅器 25a〜25e  可変減衰器 30  歪抽出用合成器 31  合成器 40  歪を補償すべき高出力増幅器 50  ドレインあるいはコレクタのバイアス端子51
  ゲートあるいはベースのバイアス端子60  可変
電圧源
1 Input terminal 2 Output terminal 10 Distortion compensation circuit 11a, 11b Distributor 12 3-distributor 20 Distortion generation amplifiers 21, 22 Linear amplifiers 25a to 25e Variable attenuator 30 Distortion extraction combiner 31 Combiner 40 Distortion should be compensated High output amplifier 50 Drain or collector bias terminal 51
Gate or base bias terminal 60 Variable voltage source

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  歪発生用増幅器を有し、該増幅器の発
生する歪成分を用いて増幅器で生じる歪を補償する回路
において、歪を補償すべき増幅器の入力電力に対する歪
特性に応じて、歪発生用増幅器の入力電力に対する歪特
性を調整する手段を設け、上記調整を、歪発生用増幅器
に使用されているトランジスタの駆動電極あるいは制御
電極へのバイアスにより行うことを特徴とする増幅器の
歪補償回路。
Claim 1: In a circuit that has a distortion generation amplifier and uses distortion components generated by the amplifier to compensate for distortion generated in the amplifier, the distortion Distortion compensation for an amplifier, characterized in that means is provided for adjusting the distortion characteristics of the distortion generation amplifier with respect to input power, and the adjustment is performed by biasing a drive electrode or a control electrode of a transistor used in the distortion generation amplifier. circuit.
JP3295491A 1991-02-27 1991-02-27 Distortion compensating circuit for amplifier Pending JPH04288711A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3295491A JPH04288711A (en) 1991-02-27 1991-02-27 Distortion compensating circuit for amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3295491A JPH04288711A (en) 1991-02-27 1991-02-27 Distortion compensating circuit for amplifier

Publications (1)

Publication Number Publication Date
JPH04288711A true JPH04288711A (en) 1992-10-13

Family

ID=12373330

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3295491A Pending JPH04288711A (en) 1991-02-27 1991-02-27 Distortion compensating circuit for amplifier

Country Status (1)

Country Link
JP (1) JPH04288711A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001223539A (en) * 2000-02-08 2001-08-17 Nec Corp Linear power amplifier based on active feedforward type predistortion
JP2006074544A (en) * 2004-09-03 2006-03-16 Yazaki Corp Design method for predistortion linearizer system
JPWO2005027340A1 (en) * 2003-09-10 2007-11-08 株式会社日立国際電気 Distortion compensation amplifier
WO2019146549A1 (en) * 2018-01-23 2019-08-01 株式会社村田製作所 Power amplification circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059805A (en) * 1983-09-12 1985-04-06 Nec Corp Distortion generating device
JPS60173908A (en) * 1984-02-20 1985-09-07 Fujitsu Ltd Nonlinear distortion compensating circuit
JPS61191104A (en) * 1985-02-20 1986-08-25 Fujitsu Ltd Distortion equalizer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059805A (en) * 1983-09-12 1985-04-06 Nec Corp Distortion generating device
JPS60173908A (en) * 1984-02-20 1985-09-07 Fujitsu Ltd Nonlinear distortion compensating circuit
JPS61191104A (en) * 1985-02-20 1986-08-25 Fujitsu Ltd Distortion equalizer

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001223539A (en) * 2000-02-08 2001-08-17 Nec Corp Linear power amplifier based on active feedforward type predistortion
JPWO2005027340A1 (en) * 2003-09-10 2007-11-08 株式会社日立国際電気 Distortion compensation amplifier
JP2006074544A (en) * 2004-09-03 2006-03-16 Yazaki Corp Design method for predistortion linearizer system
JP4524160B2 (en) * 2004-09-03 2010-08-11 矢崎総業株式会社 Design method for predistortion linearizer system
WO2019146549A1 (en) * 2018-01-23 2019-08-01 株式会社村田製作所 Power amplification circuit
US11309849B2 (en) 2018-01-23 2022-04-19 Murata Manufacturing Co., Ltd. Power amplifier circuit
US11750152B2 (en) 2018-01-23 2023-09-05 Murata Manufacturing Co., Ltd. Power amplifier circuit

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