JP2003023325A - Power amplifier, low distortion power amplifier, multistage amplifier, control method for power amplifier, transmitting circuit and radio communication equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power amplifier with which the symmetry of distortion to appear in amplifier output can be controlled. SOLUTION: This device is provided with an input terminal 101 for inputting an input signal from the outside, a transistor 104 for amplifying the input signal, an output terminal 107 for outputting an output signal from the transistor 104 to the outside, and a control circuit 108 for performing control so that the frequency distribution of a distortion component in the signal to appear on the output terminal can become symmetric or asymmetric to a carrier frequency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power amplifier, a low distortion power amplifier, a multistage amplifier, a power amplifier control method, a transmission circuit, and a wireless communication device mainly used in mobile communication and the like.

[0002]

2. Description of the Related Art A conventional power amplifier will be described below with reference to FIGS.

FIG. 6A is a graph showing the relationship between the output power and the output phase with respect to the input power of the power amplifier.
The distortion appearing in the output signal of the power amplifier is caused by the amplitude and phase of the envelope of the input signal changing due to the non-linearity of the power amplifier having the characteristic shown in FIG.

FIG. 6B is a graph showing the relationship between the output power and the output phase with respect to the input power of the predistortion compensation circuit.

FIG. 6C shows the configuration of a low distortion power amplifier 600 to which a predistortion compensation circuit is added. 6C, 610 is a predistortion compensation circuit having the characteristics shown in FIG. 6B, 611 is an input terminal of the predistortion compensation circuit 610, and 612 is a predistortion compensation circuit 610. Reference numeral 620 is an output terminal, 620 is a power amplifier having the characteristics shown in FIG. 6A, 621 is an input terminal of the power amplifier 620, and 622 is an output terminal of the power amplifier 620.

In the low distortion power amplifier 600, the relationship between the output power and the output phase with respect to the input power is such that the linearity is improved as shown in FIG. 6 (d).

When operating only with the power amplifier 620,
Two frequencies f1 and f2 (where f1 <f
When the sine wave signal of 2) with equal amplitude is input, output terminal 62
The signal output to 2 has a third-order intermodulation distortion (IMD3: 3rdorder Inter M) as shown in FIG.
Odulation Distortion) occurs. Intermodulation distortion occurs not only in the 3rd order but also in the 5th, 7th, etc., but here the IMD3 closest to the input signal.
Will be described as an example. IMD as shown in FIG.
The magnitude of 3 is expressed as the ratio of f1 and f2 to the signal power. If the distortion appearing in the signal output to the output terminal 622 is symmetrical as shown in (a) of FIG. 7A, the low distortion power amplifier 40 to which the predistortion compensating circuit 410 is added.
The distortion appearing in the output of 0 can be reduced as shown in (b) of FIG.

[0008]

However, as shown in FIG.
When the degree of asymmetry of the distortion appearing in the output of the power amplifier is large as shown in (a) of (B), it is expected as shown in (b) of FIG. 7B even if the linearity of the power amplifier is improved. The distortion cannot be reduced as described above.

That is, if the frequency distribution of the distortion component of the signal appearing at the output of the power amplifier is controlled so as to be symmetric with respect to the carrier frequency, a power amplifier with lower distortion can be obtained, but conventionally such control is performed. There was no power amplifier capable.

There are also cases where it is preferable to control the frequency distribution of the distortion component of the signal appearing at the output of the power amplifier to be asymmetrical with respect to the carrier frequency. Conventionally, such a power amplifier can perform such control. Did not exist.

That is, there is a problem that the frequency distribution of the distortion component of the signal appearing at the output of the power amplifier cannot be controlled so as to be symmetrical or asymmetrical with respect to the carrier frequency.

In consideration of the above problems, the present invention provides a power amplifier, a low distortion power amplifier, a multistage amplifier, a power amplifier control method, which can control the distortion appearing in the output of the power amplifier to be symmetrical or asymmetrical. An object of the present invention is to provide a transmission circuit and a wireless communication device.

[0013]

In order to solve the above-mentioned problems, a first aspect of the present invention (corresponding to claim 1) includes an input terminal for inputting an input signal from the outside and the input signal. A transistor for amplifying, an output terminal for outputting the output signal from the transistor to the outside, and a control circuit for controlling the frequency distribution of the distortion component of the signal appearing at the output terminal to be symmetrical or asymmetrical with respect to the carrier frequency. It is a power amplifier equipped with.

A second aspect of the present invention (corresponding to claim 2)
Is an input side matching circuit connected between the input terminal and the input of the transistor, an output side matching circuit connected between the output terminal and the output of the transistor, and an input side of the transistor. An input side DC bias supply terminal for supplying a DC bias voltage and an output side DC bias supply terminal for supplying a DC bias voltage to the output side of the transistor, wherein the control circuit comprises the input side matching circuit and the output. By controlling at least one of a side matching circuit, a DC voltage supplied to the input side DC bias supply terminal, and a DC voltage supplied to the output side DC bias supply terminal, the symmetry or asymmetry can be achieved. The power amplifier according to the first aspect of the invention is controlled as described above.

A third aspect of the present invention (corresponding to claim 3)
Is the input side matching circuit, wherein the control circuit looks at the input side matching circuit from the input of the transistor at at least one frequency of a frequency of a modulation bandwidth, a carrier frequency and a harmonic frequency of the carrier frequency. The power amplifier according to the second aspect of the present invention, which controls the impedance so as to be symmetrical or asymmetrical.

A fourth aspect of the present invention (corresponding to claim 4)
The input-side matching circuit has an even harmonic short-circuit circuit, which has a lower impedance or a short circuit than a predetermined value at the frequency of the even harmonic of the carrier frequency, on the terminal side connected to the transistor. Is a power amplifier according to the present invention.

A fifth aspect of the present invention (corresponding to claim 5)
In the input side matching circuit, one is connected to the input terminal, one is connected to the carrier frequency impedance changing circuit for changing the impedance of the carrier frequency, and the other is connected to the other of the carrier frequency impedance changing circuits, and the other is the transistor. A capacitor connected to the input of
One is connected to the input side DC bias supply terminal, one is connected to the input of the transistor, and the other is the modulation bandwidth frequency impedance, and a modulation bandwidth frequency impedance changing circuit that changes the impedance of the frequency of the modulation bandwidth. Carrier wave cutoff that is connected to the other of the change circuits and supplies the DC bias voltage supplied from the input side DC bias supply terminal to the transistor to prevent a signal of the carrier frequency from leaking into the input side DC bias supply terminal. A power amplifier according to the third or fourth aspect of the present invention, wherein at least one of the carrier frequency impedance change circuit and the modulation bandwidth frequency impedance change circuit is variable.

The sixth invention (corresponding to claim 6)
Is the output side matching circuit of the output side matching circuit when the control circuit looks at the output side matching circuit from the output of the transistor at a frequency of at least one of the frequency of the modulation bandwidth, the carrier frequency and the harmonic frequency of the carrier frequency. The power amplifier according to the second or third aspect of the present invention, wherein the impedance is controlled to be symmetrical or asymmetrical.

The seventh invention (corresponding to claim 7)
The output-side matching circuit has an even-order harmonic short-circuit circuit, which has a lower impedance or short-circuit than a predetermined value at a frequency of an even-order harmonic of a carrier frequency, on a terminal side connected to the transistor. Is a power amplifier according to the present invention.

The eighth invention (corresponding to claim 8)
One of the output side matching circuits is connected to the output terminal, and one of the carrier frequency impedance changing circuit for changing the impedance of the carrier frequency and the other of the carrier frequency impedance changing circuit is connected, and the other is the transistor. A capacitor connected to the output of
One is connected to the output side DC bias supply terminal, one is connected to the modulation bandwidth frequency impedance changing circuit for changing the impedance of the frequency of the modulation bandwidth, and the other is connected to the input of the transistor, and the other is the modulation bandwidth frequency impedance. Carrier wave cutoff which is connected to the other side of the change circuit and supplies the DC bias voltage supplied from the output side DC bias supply terminal to the transistor to prevent a signal of the carrier frequency from leaking into the output side DC bias supply terminal. And a circuit, wherein at least one of the carrier frequency impedance changing circuit and the modulation bandwidth frequency impedance changing circuit is variable.

The ninth invention (corresponding to claim 9)
Is a case where the control circuit performs control so as to be symmetrical, and the control circuit includes (1) the input side at a frequency of a modulation bandwidth in which the input side matching circuit is viewed from the input of the transistor. The condition that the imaginary part of the impedance of the matching circuit is smaller than a predetermined value or substantially zero,
(2) The condition that the imaginary part of the impedance of the input-side matching circuit at the second harmonic frequency of the carrier frequency when the input-side matching circuit is viewed from the input of the transistor is smaller than a predetermined value or substantially zero. (3) The condition that the imaginary part of the impedance of the output side matching circuit at the frequency of the modulation bandwidth in which the output side matching circuit is viewed from the output of the transistor is smaller than a predetermined value or substantially zero, (4) At least one of the following conditions: the imaginary part of the impedance of the output-side matching circuit at the second harmonic frequency of the carrier frequency when the output-side matching circuit is viewed from the output of the transistor is smaller than a predetermined value or substantially zero. Any of the second to eighth inventions for controlling the input side matching circuit and / or the output side matching circuit so as to satisfy the above conditions A mounting of the power amplifier.

Further, a tenth aspect of the present invention (corresponding to claim 10) is that a divider for dividing an output signal of the output side matching circuit into two parts, one output of the divider and the control circuit. An output detection circuit for detecting an operating state based on an output signal from one output of the distributor, control information for the input side matching circuit, control information for the output side matching circuit, and the input side DC A memory for storing at least one control information of the control information for the DC bias voltage supplied to the bias supply terminal and the control information for the DC bias voltage supplied to the output side DC bias supply terminal in association with the operating state. The operating state is at least the output power, the carrier frequency, and the frequency of the modulation bandwidth, and the other output of the distributor is the output terminal. Connected to said control circuit,
The control information corresponding to the detected operating state is read from the memory, and a DC bias supplied to the input side matching circuit, the output side matching circuit, and the input side DC bias supply terminal based on the control information. The power amplifier according to any one of the second to ninth aspects of the present invention, which controls at least one of a voltage and a DC bias voltage supplied to the output side DC bias supply terminal.

An eleventh aspect of the present invention (corresponding to claim 11) is a case where the control circuit controls so as to be asymmetrical, wherein the control circuit has a distortion component of a signal appearing at the output terminal. Of the second to eighth and tenth aspects of the present invention, which controls the input side matching circuit and / or the output side matching circuit so that a component higher than the carrier frequency or a frequency component lower than the carrier frequency becomes smaller than a predetermined value. The power amplifier according to any one of 1.

A twelfth aspect of the present invention (corresponding to claim 12) is a case where the control circuit is controlled so as to be symmetrical, and the power according to any one of the second to tenth aspects of the present invention. An amplifier and a pre-compensation circuit that pre-distorts the input signal to the power amplifier, the pre-compensation circuit pre-distorts the input signal, and the control circuit of the distortion component of the signal appearing at the output terminal This is a low distortion power amplifier in which the distortion component of the signal appearing at the output terminal is reduced by controlling the frequency distribution to be symmetrical with respect to the carrier frequency.

In the thirteenth aspect of the present invention (corresponding to claim 13), the control circuit also controls the operation of the predistortion circuit so as to reduce the distortion component of the signal appearing at the output terminal. 12 low distortion power amplifiers according to the invention.

Further, in a fourteenth aspect of the present invention (corresponding to claim 14), the pre-compensation circuit distorts an input signal to the power amplifier in a base band region, an intermediate frequency region or a carrier frequency region in advance. A twelfth aspect of the present invention is a low distortion power amplifier.

The fifteenth aspect of the present invention (corresponding to claim 15) determines the amplitude and the phase of one output signal of the first power divider that divides the input signal into two. A first vector adjuster for adjusting; a main amplifier for amplifying an output signal of the first vector adjuster; a second power distributor for dividing an output signal of the main amplifier into two;
First delay circuit for delaying the other output signal of the power distributor of No. 3, and power synthesis for distortion detection for combining one output signal of the second power distributor and the output signal of the first delay circuit A second delay circuit that delays the other output signal of the second power divider, and a second vector adjuster that adjusts the amplitude and phase of the output signal of the distortion detection power combiner, An auxiliary amplifier that amplifies the output signal of the second vector adjuster; and a distortion removing power combiner that combines and outputs the output signal of the second delay circuit and the output signal of the auxiliary amplifier, The main amplifier is a low distortion power amplifier using the power amplifier according to the eleventh aspect of the present invention.

According to a sixteenth aspect of the present invention (corresponding to claim 16), an input terminal for inputting an input signal from the outside, a transistor for amplifying the input signal, and an output signal from the transistor are output to the outside. A power amplifier control method for controlling a power amplifier having an output terminal for outputting to an output terminal, wherein the frequency distribution of a distortion component of a signal appearing at the output terminal is symmetrical or asymmetrical with respect to a carrier frequency. This is a control method of a power amplifier.

According to a seventeenth aspect of the present invention (corresponding to claim 17), an input side matching circuit is connected between the input terminal and the input of the transistor, and the input side matching circuit is connected between the output terminal and the output of the transistor. An output side matching circuit is connected to the input side, a DC bias voltage is supplied to the input of the transistor from the input side DC bias supply terminal, and a DC bias voltage is supplied to the output of the transistor from the output side DC bias supply terminal. By controlling at least one of a matching circuit, the output side matching circuit, and a DC voltage supplied to the input DC bias supply terminal, and a DC voltage supplied to the output DC bias supply terminal, The power amplifier control method according to the sixteenth aspect of the present invention, wherein the power amplifier is controlled to be symmetrical or asymmetrical.

An eighteenth aspect of the present invention (corresponding to claim 18) includes a plurality of amplifiers connected in series in multiple stages, and at least the final stage amplifier among the plurality of amplifiers has first to eleventh books. A multistage amplifier using the power amplifier according to any one of the inventions or the low distortion power amplifier according to any of the twelfth to fifteenth inventions.

A nineteenth aspect of the present invention (corresponding to claim 19) is the power amplifier according to any one of the first to eleventh aspects of the present invention or the low power amplifier according to any of the twelfth to fifteenth aspects of the present invention. A transmission circuit using the distortion power amplifier or the multistage amplifier according to the 18th aspect of the present invention.

The twentieth invention of the present invention (corresponding to claim 20) is the power amplifier according to any of the first to eleventh inventions, or the low amplifier according to any of the twelfth to fifteenth inventions. A wireless communication device using the distortion power amplifier or the multistage amplifier according to the 18th aspect of the present invention.

[0033]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) A first embodiment will be described with reference to FIGS. 1 to 3. FIG. 1 is a block diagram of a power amplifier 100 of the present invention. 101 is an input terminal, 102 is an input side matching circuit, 103 is an input side DC bias supply terminal, 104 is a transistor, 105 is an output side matching circuit, and 106 is an output side DC bias supply terminal. And 107 is an output terminal,
Reference numeral 108 is a control circuit.

As in the prior art, the power amplifier 1 of FIG.
00 input terminal 101, two frequencies f1 and f2
Consider the case of inputting a sine wave signal of equal amplitude (where f1 <f2). FIG. 2A shows a change in impedance at the frequency (Δf = f2-f1) of the difference between the two frequencies when the input side matching circuit 102 is viewed from the input of the transistor 104. In addition, the carrier frequency (f0 =
The change in impedance at (f1 + f2) / 2) is shown.

At this time, the input side matching circuit 102 has a small impedance change seen from the input of the transistor 104 at the carrier wave frequency and its harmonic frequency, and the output side matching circuit 105 has the difference between the two frequencies and the harmonic wave of the carrier wave. The impedance change seen from the output of the transistor 104 at the frequency is small. Also,
The DC bias supplied to the input side DC bias supply terminal 103 and the output side DC bias supply terminal 106 is also constant.

FIG. 3A shows a change in IMD3 when the output side matching circuit 105 is fixed and the input side matching circuit 102 is changed as shown in FIG. 2A. In FIG. 3B, the input side matching circuit 102 is fixed, and the output side matching circuit 105.
2 shows the change in IMD3 when changed as shown in FIG. In FIG. 3, IMD3 appearing on the frequency side higher than the carrier frequency is shown as + IMD3, and IMD3 appearing on the frequency side lower than the carrier frequency is -I.
Shown as MD3. From FIGS. 3A and 3B, it can be seen that the symmetry of the IMD 3 can be controlled by changing the input-side and output-side matching circuits 102 and 105 connected to the transistor 104.

That is, when the impedance of the input side matching circuit 102 is set to A in FIG. 2A, + IMD3 becomes smaller than -IMD3. Also, the input side matching circuit 1
When the impedance of 02 is set to B in FIG.
+ IMD3 and -IMD3 are about the same size. When the impedance of the input side matching circuit 102 is set to C in FIG. 2A, + IMD3 becomes larger than -IMD3.

On the other hand, when the impedance of the output side matching circuit 105 is set to A in FIG. 2B, + IMD3 becomes larger than -IMD3. Also, the output side matching circuit 10
When the impedance of 5 is set to B in FIG. 2B, +
IMD3 and -IMD3 have the same size. When the impedance of the output-side matching circuit 105 is set to C in FIG. 2B, + IMD3 becomes larger than -IMD3.

As described above, the control circuit 108 controls at least one of the input side matching circuit 102 and the output side matching circuit 105 to control the symmetry of the frequency distribution of the distortion appearing at the output terminal 107. It will be possible.

That is, the control circuit 108 outputs the output terminal 10
When the frequency distribution of the distortion appearing at 7 is controlled to be symmetrical, it is possible to realize a power amplifier in which the asymmetry of the frequency distribution of the distortion appearing at the output terminal 107 is reduced. Further, when the control circuit 108 controls the frequency distribution of distortion appearing at the output terminal 107 to be asymmetric, it is possible to realize a power amplifier that increases the asymmetry of the frequency distribution of distortion appearing at the output terminal 107. .

Here, the case where a two-frequency sine wave signal is input has been described, but in the modulation signal, the carrier frequency corresponds to f0 and the frequency of the modulation bandwidth corresponds to Δf. The same effect can be obtained when a modulated signal is used as the input signal. As an example, the power amplifier of the present embodiment is
When used in a DMA transmission circuit, the carrier frequency is a frequency in the 2 GHz band and the frequency of the modulation bandwidth is about 4 MHz.

At the carrier frequency and the frequency of the modulation bandwidth, the input side matching circuit 102 and the output side matching circuit 1 are provided.
It is possible to realize a power amplifier that can control the frequency distribution of the distortion component of the signal appearing at the output terminal 207 to be symmetrical with respect to the carrier frequency by changing the impedance of 05.
It is also possible to realize a power amplifier which can be controlled so that the frequency distribution of the distortion component of the signal appearing in 7 becomes asymmetric with respect to the carrier frequency.

In the above description, the input side matching circuit 102 changes the frequency of the modulation bandwidth, and the output side matching circuit 105 changes the impedance viewed from the transistor at the carrier frequency, but the present invention is not limited to this. By varying the impedance of the transistor at the frequency of the modulation bandwidth, the carrier frequency, and the harmonic frequency of the carrier frequency, more diverse control becomes possible.

Next, how to perform such various kinds of control will be specifically described by taking as an example a case where control is performed so that the frequency distribution of the distortion component becomes symmetrical.

First, a method of controlling the impedance seen from the transistor of the input side matching circuit 102 and the impedance seen from the transistor of the output side matching circuit 105 will be described.

The inventors conducted an experiment in which the impedance of the input side matching circuit 102 viewed from the transistor 104 was changed and the frequency distribution of the distortion component appearing at the output terminal 207 was measured. That is,
The impedance of the input side matching circuit 102 viewed from the transistor 104 was variously changed, and the frequency distribution of the distortion component appearing at the output terminal 207 was repeatedly measured. Then, by analyzing such experimental data, the inventors have found that the transistor 104 is connected to the input side matching circuit 102.
The smaller the imaginary part of the impedance at the frequency of the modulation bandwidth of the input side matching circuit 102, the smaller the output terminal 2
We have discovered the fact that the frequency distribution of the distortion component appearing at 07 is more symmetrical with respect to the carrier frequency. Further, similarly, the inventors looked at the input side matching circuit 102 from the transistor 104 and found that the carrier frequency of the input side matching circuit 102 was 2
We have discovered the fact that the smaller the imaginary part of the impedance at the harmonics, the more symmetrical the frequency distribution of the distortion component appearing at the output terminal 207 with respect to the carrier frequency. It was also discovered that the imaginary part of the impedance at the frequency of the modulation bandwidth has a greater effect of making the frequency distribution of the distortion component symmetrical with respect to the carrier frequency than the imaginary part of the impedance at the second harmonic of the carrier frequency. Further, it can be inferred that the same fact exists in the output side matching circuit 105.

Therefore, in order to control the frequency distribution of the distortion component of the signal appearing at the output terminal 107 to be symmetric with respect to the carrier frequency, at least one of the following conditions is required.
Input side matching control circuit 10 so as to satisfy one or more conditions.
2 and / or the output side matching circuit 105 may be controlled.

First, as the first condition, the transistor 1
There is a condition that the imaginary part of the impedance of the input side matching circuit 102 at the frequency of the modulation bandwidth in which the input side matching circuit 102 is viewed from the input of 04 is smaller than a predetermined value or substantially zero.

As the second condition, the transistor 1
There is a condition that the imaginary part of the impedance of the input side matching circuit 102 at the double harmonic frequency of the carrier frequency seen from the input of 04 at the input side matching circuit 102 is smaller than a predetermined value or substantially zero.

As the third condition, the transistor 1
There is a condition that the imaginary part of the impedance of the output side matching circuit 105 at the frequency of the modulation bandwidth in which the output side matching circuit 105 is viewed from the output of 04 is smaller than a predetermined value or substantially zero.

As the fourth condition, the transistor 1
There is a condition that the imaginary part of the impedance of the output side matching circuit 105 at the double harmonic frequency of the carrier frequency when the output side 04 of the output side matching circuit 105 is viewed is smaller than a predetermined value or substantially zero.

Therefore, the control circuit 108 controls the first, second,
By controlling the input-side matching circuit 102 and / or the output-side matching circuit 105 so that at least one of the third and fourth conditions is satisfied, the distortion of the signal appearing at the output terminal 107 is controlled. It can be controlled so that the frequency distribution of the components is symmetrical with respect to the carrier frequency.

On the contrary, in order to control the frequency distribution of the distortion component of the signal appearing at the output terminal 107 to be asymmetrical with respect to the carrier frequency, the control opposite to the above first to fourth conditions may be performed. . That is, four conditions can be created by replacing the description of the imaginary part of impedance described in each of the first to fourth conditions with the description "the imaginary part of impedance is larger than a predetermined value". I can. Then, by controlling the input-side matching circuit 102 and / or the output-side matching circuit 105 so as to satisfy at least one or more of the four conditions thus created, the signal appearing at the output terminal 107 The frequency distribution of the distortion component can be controlled to be asymmetric with respect to the carrier frequency.

Next, the input side matching circuit 102 and the output side matching circuit 105 will be described. That is, FIG. 8 shows the input side matching circuit 102, and FIG. 9 shows the output side matching circuit 105.

In FIG. 8, 701a is a bypass capacitor, 702a is a choke coil, and 703a.
a is a DC blocking capacitor, 704a is an even harmonic short circuit, 707a is a low frequency damping circuit, 710a is a matching element, and 711a is a bias resistor.

The bypass capacitor 701a has a low frequency and a low impedance, one of which is connected to the DC bias supply terminal 103 and the other of which is grounded, and which absorbs low frequency noise from the DC bias supply terminal 103. Is.

The choke coil 702a has a high impedance at the carrier frequency, one is connected to the bias resistor 711a, and the other is the transistor 104.
Is a choke coil that is connected to the input of and prevents the transmission signal from leaking to the DC bias supply terminal 103 side.

The DC blocking capacitor 703a has one side connected to the matching element 710a and the other side connected to the input of the transistor 104a, and prevents the DC bias from the DC bias supply terminal 103 from flowing to the input terminal 101a side. It is a capacitor to prevent.

The even harmonic short circuit 704a is a circuit in which a transmission line 703a and a capacitor 705a are connected in series. One of the transmission lines 703a is a transistor 1
04 is connected to the input and the other is connected to one of the capacitors 705a, which is a transmission line having a length of ¼ wavelength of the carrier frequency. The other of the capacitors 705a is grounded, and has a low impedance at the carrier frequency. That is, the even harmonic short circuit 7
The circuit 04a has a high impedance with respect to the carrier frequency and a low impedance (short circuit) at the frequencies of the even harmonics of the carrier frequency.

The low frequency damping circuit 707a is a circuit in which a capacitor 709a and a resistor 708a are connected in series. One of the capacitors 709a is a transistor 1
04 is connected to the input and the other is connected to one of the resistors 708a, which is a capacitor having low impedance at low frequencies. The other of the resistors 708a is grounded. That is, the low-frequency damping circuit 707a is a circuit that suppresses low-frequency oscillation and stabilizes the operation of the power amplifier 100 by causing loss at low frequencies.

The matching element 710a is a circuit that changes the impedance viewed from the transistor at the carrier frequency under the control of the control circuit 108.

The bias resistor 711a is a resistor for adjusting the DC bias supplied from the DC bias supply terminal 103.

On the other hand, in FIG. 9, the output side matching circuit 10
5 is a bypass capacitor 701b and a choke coil 7
02b, a DC blocking capacitor 703b, an even harmonic short circuit 704b, a low frequency damping circuit 707b, a matching element 710b, and a bias resistor 711b.

The elements of the output side matching circuit 105 have the same functions as the elements of the input side matching circuit 102 of FIG. 8 having the same names. However, the matching element 710b is connected to the output terminal 107. Further, one side of the bypass capacitor 701b and one side of the bias resistor 711b are connected to the DC bias supply terminal 106. Further, one of the capacitors 709b, one of the transmission lines 706b, one of the DC blocking capacitors 703b, and one of the choke coils 702b are connected to the output of the transistor 104.

Next, the operations of the input side matching circuit 102 and the output side matching circuit 105 will be described.

In FIG. 8, the signal input from the input terminal 101 is matched by the matching element 710a. That is, matching element 710a changes the impedance seen by the transistor at the carrier frequency under the control of control circuit 108. And the matching element 710a
The signal matched with is output to the DC blocking capacitor 703a.

At this time, at the frequency of the modulation bandwidth,
Since the DC blocking capacitor 710a has a high impedance, even if the impedance of the matching element 710a changes, the impedance change seen from the transistor at the frequency of the modulation bandwidth is small.

DC blocking capacitor 703a passes the signal output from matching element 710a to the input side of transistor 104. In addition, the DC bias supply terminal 103
Is supplied with a DC bias, and the DC blocking capacitor 703a prevents this DC bias from flowing into the input terminal 101 side.

The signal output from the DC blocking capacitor 703a is input to the transistor 104.

At this time, the low frequency damping circuit 707a
Generates a loss at a low frequency to suppress low frequency oscillation and stabilize the input side matching circuit 102.

Further, the even harmonic short circuit 704a has a low impedance (short circuit) at the frequency of the even harmonic of the carrier frequency.

The DC bias supplied from the DC bias supply terminal 103 is supplied to the bypass capacitor 701a.
Thus, low frequency noise from the power supply is absorbed. The bias resistor 711a adjusts the DC bias voltage in which the low frequency noise is absorbed. The adjusted DC bias passes through the choke coil 702a and the transistor 10
4 inputs.

Since the choke coil 702a has a high impedance at the carrier frequency, it prevents the transmission signal passing through the DC blocking capacitor 703a from leaking to the DC bias supply terminal 103 side. In this way, the choke coil 702a supplies the DC bias from the DC bias supply terminal 103 to the transistor 104, and suppresses the carrier frequency signal, that is, the transmission signal, from leaking to the DC bias supply terminal 103 side.

Since the DC blocking capacitor 703a has a high impedance at the frequency of the modulation bandwidth,
The impedance at the frequency of the modulation bandwidth viewed from the transistor 104 is high impedance. Therefore, at the frequency of the modulation bandwidth, the transistor 10
The impedance seen from 4 is substantially equal to the impedance seen from the transistor 104 of the circuit shown in FIG.

Therefore, at the frequency of the modulation bandwidth,
The real number part and the imaginary number part of the impedance viewed from the transistor 104 can be changed by changing the resistance value of the bias resistor 711a. In this way, even if the impedance viewed from the transistor 104 is changed at the frequency of the modulation bandwidth, the choke coil 7
Since 02a has a high impedance at the carrier frequency, the impedance change at the carrier frequency viewed from the transistor 104 is small.

Even if the impedance of the carrier frequency or the impedance of the frequency of the modulation bandwidth is changed, at the frequency of the even harmonics, the even harmonic short circuit 707a provided in the immediate vicinity of the input of the transistor 104 can be used. Since it is short-circuited, the transistor 10
The impedance at the frequency of the even harmonic viewed from 4 is constant.

Thus, the impedance at the carrier frequency seen by the input of transistor 104 can be varied by controlling matching element 710a. Moreover, even if such control is performed, the impedance change in the modulation bandwidth viewed from the input of the transistor 104 is small. Further, the impedance at the frequency of the modulation bandwidth viewed from the input of the transistor 104 can be changed by controlling the bias resistor 711a. Moreover, even if such control is performed, the change in impedance at the carrier frequency seen from the input of the transistor 104 is small. In addition, even if any of the above controls is performed, since the even harmonic short-circuit circuit 704a is used, the impedance at the frequency of the even harmonic of the carrier frequency seen from the input of the transistor 104 becomes constant.

That is, for the following three reasons, without affecting the impedance at other frequencies,
The impedance of only the desired frequency can be changed. The first reason is that the impedance of the frequency of the modulation bandwidth viewed from the input of the transistor 104 is changed on the DC bias supply terminal side 103 of the choke coil 702a. The second reason is that the impedance of the carrier frequency seen from the input of the transistor 104 is changed on the input terminal side 101 of the DC blocking capacitor 710a. The third reason is that the even harmonic short circuit 704a is provided on the input side of the transistor 104.

As described above, the input side matching circuit 102 of FIG.
Can change the impedance viewed from the input of the transistor 104 independently at the carrier frequency and the frequency of the modulation bandwidth.

In the present embodiment, the even harmonic short circuit 704a includes a transmission line 703a and a capacitor 705.
Although it has been described as being composed of a and a, it is not limited to this. The even harmonic short circuit 704c shown in FIG. 11 may be used. That is, the even harmonic short circuit 704c
Is composed of an inductor 709c and a capacitor 708c. The inductor 709c and the capacitor 708c function as an LC series resonator that is short-circuited at the frequency of the double harmonic of the carrier frequency. Even if the even harmonic short circuit 704a is used instead of the even harmonic short circuit 704a, the same effect can be obtained.

Further, the input side matching circuit 1 of the present embodiment.
02 is not limited to the one shown in FIG. 8, but may be one as shown in FIG. That is, in FIG. 14, the choke coil 702a and the even harmonic short circuit 70 of FIG.
Instead of 4a, a quarter wavelength line 712a and a carrier frequency short capacitor 713a are provided. Other than that, it is the same as FIG. Quarter-wave line 712a
Is a quarter-wave line at the carrier frequency,
One end is connected to the input of the transistor 104, and the other end is connected to the bias resistor 711a. The carrier frequency short-circuit capacitor 713a is a capacitor whose one end is connected to the bias resistor 711a and whose other end is grounded. The quarter-wave line 712a and the carrier frequency short-circuit capacitor 713a supply the DC bias from the DC bias supply terminal 103 to the input of the transistor 104, and the carrier frequency signal leaks to the DC bias supply terminal 103 side. Suppress. Further, the quarter-wave line 712a and the carrier frequency short-circuit capacitor 713a are provided in the immediate vicinity of the input of the transistor 104 and become a short circuit (short) at the frequency of the even harmonics.
The impedance at the frequency of the even harmonic seen from is constant.

When the circuit of FIG. 14 is used as the input side matching circuit 102, FIG. 1 seen from the input of the transistor 104.
The impedance of the circuit of 4 is as follows. That is, at frequency 0, that is, at direct current, a short circuit occurs. It also has a low impedance at frequencies in the modulation bandwidth and an open or high impedance at carrier frequencies. In addition, the second harmonic causes a short circuit, that is, a low impedance. In this way, the quarter-wave line 7
12a and carrier frequency short capacitor 713a
Has a function equivalent to that of the choke coil 702a in FIG. 8 and can also function as the even harmonic short circuit 704a.

The operation of the output-side matching circuit 105 is the same as the above-described description of the input-side matching circuit 102, and the detailed description thereof will be omitted. That is, “input terminal 101” in FIG. 8 is read as “output terminal 107” in FIG. 9, “DC bias supply terminal 103” in FIG. 8 is read as “DC bias supply terminal 106” in FIG. "To the input of the transistor 104" may be read as "to the output of the transistor 104" in FIG.

Therefore, also in the output side matching circuit 105 of FIG. 9, the impedance seen from the output of the transistor 104 can be changed independently at the carrier frequency and the frequency of the modulation bandwidth. Moreover, even if the impedance seen from the output of the transistor 104 is changed at the carrier frequency and the frequency of the modulation bandwidth, the impedance at the frequency of the even harmonic of the carrier frequency can be made constant.

By using the input side matching circuit 102 and / or the output side matching circuit 105 as described above, the input side matching circuit 102 shows the impedance of the transistor at the frequency of the modulation bandwidth and the output side matching circuit 105 shows the impedance seen from the transistor at the carrier frequency. It becomes possible to change. further,
Not limited to this, the impedance seen from the transistor at the frequency of the modulation bandwidth, the carrier frequency, and the harmonic frequency of the carrier frequency can be made variable for each matching circuit, so that more diverse control is possible. When controlling the frequency distribution of the distortion component of the signal appearing at the output terminal 107 to be symmetrical with respect to the carrier frequency, at least one of the first to fourth conditions described above should be satisfied. Can be controlled.

The choke coil of this embodiment is an example of the carrier wave cutoff circuit of the present invention, and the quarter wavelength line and the carrier frequency shorting capacitor of this embodiment is an example of the carrier wave cutoff circuit of the present invention. The bias resistor of the present embodiment is an example of the modulation bandwidth frequency impedance changing circuit of the present invention, and the matching element of the present embodiment is an example of the carrier frequency impedance changing circuit of the present invention.

Further, the carrier wave cutoff circuit of the present invention is realized by the choke coil of the present embodiment,
It is not limited to the one realized by the quarter-wave line and the carrier short-circuit capacitor, but may be realized by another circuit. In short, the carrier wave blocking circuit of the present invention is such that one is connected to the input of the transistor and the other is connected to the other of the modulation bandwidth frequency impedance changing circuit,
The circuit may be any circuit that supplies the DC bias voltage supplied from the input DC bias supply terminal to the transistor and prevents a carrier frequency signal from leaking into the input DC bias supply terminal.

As described above, according to the present embodiment, it is possible to realize a power amplifier capable of controlling the frequency distribution of the distortion component of the signal appearing at the output terminal 207 to be symmetrical or asymmetrical with respect to the carrier frequency. I can.

(Second Embodiment) FIG. 4 shows a block diagram of a power amplifier 400 according to a second embodiment of the present invention. 401 is an input terminal, 402 is an input side matching circuit, 40
3 is an input side DC bias supply terminal, 404 is a transistor, 405 is an output side matching circuit,
6 is an output side DC bias supply terminal, 407 is an output terminal, 408 is a control circuit, 409 is a first distributor, 410 is an output detection circuit, and 411 is a memory. The operation of the power amplifier portion is the same as that of the first embodiment, and the description is omitted here.

The memory 411 has an input side for optimum operation of the power amplifier, such as optimum distortion and efficiency, depending on the operating state of the power amplifier 400, such as output power, carrier frequency, and frequency of modulation bandwidth. Output side matching circuit 4
02 and 405 and input side and output side DC bias supply terminals 4
The conditions of the DC bias voltage to be supplied to 03 and 406 are stored. As described above, these conditions are stored in the memory 411 in association with the operating state.

Incidentally, the input side matching circuit 40 of the present embodiment.
The DC bias voltage condition of No. 2 is an example of control information for the input side matching circuit of the present invention, and the DC bias voltage condition of the output side matching circuit 405 of the present embodiment is the control information for the output side matching circuit of the present invention. This is an example, and the DC bias voltage condition of the input side DC bias supply terminal 403 of the present embodiment is an example of control information for the DC bias voltage supplied to the input side DC bias supply terminal of the present invention. The DC bias voltage condition to be supplied to the output side DC bias supply terminal 406 is an example of control information for the DC bias voltage supplied to the output side DC bias supply terminal of the present invention.

A part of the output of the power amplifier part is the distributor 4
09, and is input to the output detection circuit 410. The output of the output detection circuit 410 is input to the control circuit 408, and the matching circuit 40 on the input side and the output side corresponding to the information
2, 405 and output side DC bias supply terminals 403, 40
The condition of the DC bias voltage to be supplied to 6 is read from the memory 411 and each part is controlled. As a result, it is possible to realize a power amplifier capable of quickly responding to changes in the operating state of the amplifier and controlling the symmetry of distortion.

(Third Embodiment) FIG. 5 shows a block diagram of a low distortion power amplifier 500 according to a third embodiment of the present invention. The power amplifier 520 surrounded by the dotted line in FIG.
The detailed description is omitted here.

Reference numeral 512 denotes a distortion compensation circuit,
Reference numeral 3 is an input terminal of the distortion compensation circuit 512, and reference numeral 514 is an output terminal of the distortion compensation circuit 512. Power amplifier 520
Is controlled by the control circuit 508 and the input side matching circuit 502,
At least one of the DC bias voltage supplied to the output side matching circuit 505 and the transistor 504 is changed to control so that the asymmetry of distortion appearing at the output terminal 507 is reduced. For small distortions with asymmetry,
Distortion compensation circuit 512 can be connected to the input of power amplifier 520 to improve distortion by reducing the linearity of low distortion power amplifier 500. As described above, a low distortion power amplifier can be realized.

Further, by controlling the operation of the distortion compensating circuit 512 by the control circuit 508, it is possible to realize a low distortion power amplifier which can obtain a distortion reducing effect even when the operating state of the power amplifier 520 is different.

The circuit configuration shown in FIG. 5 is an example of the third embodiment of the present invention. As the operation of the power amplifier to which the distortion compensating circuit is added, the envelope of the output signal is the linear form of the envelope of the input signal. Similar effects can be obtained as long as they are changed. As an example of the distortion compensating circuit, a circuit for improving the linearity of the power amplifier 520 as shown in FIG. 6 described in the related art, an input signal in a baseband region or an intermediate frequency (IF; Intermediate Freq) is used.
A circuit that preliminarily has distortion in the (uency) region or the carrier frequency region can be used.

Although the transistors 104, 404, and 504 are shown as bipolar transistors in FIGS. 1, 4, and 5, field effect transistors (FET: F
It is clear that the same effect can be obtained by using the field effect transistor.

(Fourth Embodiment) FIG. 12 shows a block diagram of a low distortion power amplifier 15 according to a fourth embodiment of the present invention.

In FIG. 12, 1 is an input terminal and 2
Is an output terminal, 3 is a power distributor, 4 is a power combiner, 5 is a vector adjuster, 6 is a main amplifier, 7 is a delay circuit, and 8 is a power distributor. Yes,
Reference numeral 9 is a power combiner, 10 is a delay circuit, 13 is a vector adjuster, and 14 is an auxiliary amplifier. Further, symbols a to k and m attached to the power distributors 3 and 8 and the power combiners 4 and 9 represent respective ports.

That is, the low distortion power amplifier 15 is a feedforward amplifier.

The power amplifier described in the second embodiment is used as the main amplifier 6.

Next, the operation of this embodiment will be described.

In FIG. 13, input terminal 1 receives 2 as an input signal.
The spectrum of the signal which appears in each part of the power amplifier 5 when the sine wave signal of equal amplitude of two frequencies f1 and f2 (however, f1 <f2) is input is shown.

The signal actually input to the input terminal 1 is actually a carrier frequency f0 and a modulation bandwidth frequency Δf.
Although a modulated signal corresponding to is input, in order to facilitate understanding, the following description will be made by associating the spectrum of FIG.

FIG. 12 (a) shows the spectrum of the input signal at the input terminal 1, and the input terminal 1 has two equal frequencies of f1 and f2 (where f1 <f2) as the input signal. A case where a signal is input is shown. However, Δf = f2-f1.

First, the input signal including a plurality of carrier frequency components input from the input terminal 1 is divided into two by the power divider 3 and output from the port b and the port c, respectively.

The signal output from the port b is amplified by the main amplifier 6 through the vector adjuster 5. The output signal from the main amplifier 6 is supplied to the power distributor 8 and the delay circuit 10.
Is input to the port j of the power combiner 4.

At this time, due to the non-linearity of the main amplifier 6, a signal containing a distortion component due to intermodulation in addition to the carrier frequency component is output from the main amplifier 6. Here, in the control circuit 408 of the main amplifier 6, among the distortion components of the signal appearing at the output terminal of the main amplifier 6, that is, the signal output to the port d of FIG. 12, the frequency component higher than the carrier frequency becomes sufficiently small. In this way, the input side matching circuit 402 and the output side matching circuit 405 are controlled. In this way, the control circuit 408
Controls so that the frequency distribution of the distortion component of the signal appearing at the output terminal of the main amplifier 6 is asymmetric with respect to the carrier frequency.

FIG. 13B shows the spectrum of the output signal of the power amplifier 6. Third-order intermodulation distortion on the low frequency side appears at a frequency lower than the frequency f1 by Δf, and third-order intermodulation distortion on the higher frequency side appears at a frequency higher than the frequency f2 by Δf. However, as a result of control by the control circuit 408, the third-order intermodulation distortion on the high frequency side is sufficiently smaller than the third-order intermodulation distortion on the low frequency side.

A part of the output signal of the main amplifier 6 is taken out from the port f of the power distributor 8 and input to the port h of the power combiner 9. FIG. 13C shows the spectrum of the signal input to the port h.

On the other hand, the signal output from the port c is input to the port g of the power combiner 9 through the delay circuit 7.
FIG. 13D shows the spectrum of the signal input to the port g. In FIG. 13D, the signal frequencies f1 and f
The two components are in opposite directions, which means that the phases are opposite. By adjusting the vector adjuster 5 and the delay circuit 7 so that the carrier frequency components of the signals input to the ports g and h have the same amplitude and opposite phases, distortion in which the carrier frequency components are canceled from the port i is obtained. The signal of only the component is output.

FIG. 13E shows the spectrum of the signal output from the port i. It can be seen that the carrier frequency component is canceled by combining the signal of (c) of FIG. 13 and the signal of (d) of FIG. 13 to form a signal having only a distortion component.

Next, the signal output from the port i is amplified by the auxiliary amplifier 14 through the vector adjuster 13 and input to the port k of the power combiner 4. Where port j
By adjusting the vector adjuster 13 and the delay circuit 10 so that the distortion components of the signal input to the port k and the ports have the same amplitude and opposite phases, the distortion components from the port m of the power combiner 4 to the output terminal 2 are adjusted. A signal of only the carrier frequency component in which is canceled is output.

FIG. 13F shows the spectrum of the signal input to the port k. 13 (g) shows the spectrum of the signal input to port j. By combining these signals with the power combiner 4, a signal as shown in (g) of FIG. 13 is output from the port m.

By the way, when the frequency distribution of the distortion component of the signal output from the main amplifier 6 is symmetric with respect to the carrier frequency, the auxiliary amplifier 14 causes the distortion component having a frequency higher than the carrier frequency to have a frequency lower than the carrier frequency. It is necessary to amplify the distortion component as well. Therefore, the auxiliary amplifier 14 is required to have a wide band characteristic. Auxiliary amplifier 1
If the auxiliary amplifier 14 has a frequency-dependent characteristic in the frequency band where the amplified distortion component 4 is distributed, the distortion component generated in the main amplifier 6 cannot be canceled well.

However, in the present embodiment, the frequency distribution of the distortion component generated in the main amplifier 6 is controlled so as to be asymmetrical with respect to the carrier frequency, and one distortion level is reduced. The frequency band for amplification can be narrowed. Further, making the characteristics of the auxiliary amplifier 14 independent of frequency in such a narrow frequency band is more preferable than making the characteristics of the auxiliary amplifier 14 independent of frequency in a wide frequency band. It's easy.

As described above, by controlling the distortion components generated in the main amplifier 6 to be asymmetric, the low distortion power amplifier 15 having excellent characteristics without using a high performance amplifier as the auxiliary amplifier 6 is provided. Can be realized.

In the present embodiment, the control circuit 408 of the main amplifier 6 inputs the distortion component of the signal appearing at the output terminal of the main amplifier 6 so that the frequency component higher than the carrier frequency becomes sufficiently small. Although it has been described that the side matching circuit 402 and the output side matching circuit 405 are controlled, the present invention is not limited to this. The control circuit 408 of the main amplifier 6 controls the input side matching circuit 402 and the output side matching circuit 405 so that the frequency component lower than the carrier frequency among the distortion components of the signal appearing at the output terminal of the main amplifier 6 becomes sufficiently small. May be controlled.

(Embodiment 5) A method of adjusting the power amplifier 100 of FIG. 1, which is Embodiment 4 of the present invention, will be described with reference to FIGS. First, characteristics such as output power, distortion and efficiency are optimized by the DC bias voltage supplied to the transistor 104 and the output side matching circuit 105. In FIG. 3B, the output side matching circuit 105 is changed, but the magnitude of IMD3 is + IMD3 at the same output power.
And -IMD3 are different. Next, the symmetry of the IMD 3 is changed by changing the input side matching circuit 102. FIG. 3A shows that the output side matching circuit 105 is kept constant and the input side matching circuit 102 is changed, and the symmetry of distortion can be controlled. By adopting such an adjustment method, it becomes possible to control the symmetry of distortion while optimizing the characteristics of the power amplifier 100.

Even when the operating state of the power amplifier 100 changes, the same control is performed by the control circuit 108 to obtain optimum characteristics even in different operating states.
A low distortion power amplifier can be realized.

Also in the power amplifier shown in the second embodiment, the data stored in the memory 411 can be obtained by the adjusting method shown in the fourth embodiment. That is, the memory 411 is adjusted for each operating state by the adjustment method shown in the fifth embodiment.
The data to be stored may be created and stored in association with each operating state.

In the present embodiment, the adjustment method has been described with reference to FIG. 3, but it has been described that the control is performed based on the adjustment method. However, as described in the first embodiment, the control circuit 108 The input-side matching circuit 102 and / or the output-side matching circuit 105 so that at least one of the first, second, third, and fourth conditions is satisfied.
It is also possible to control so that the frequency distribution of the distortion component of the signal appearing at the output terminal 107 is symmetric with respect to the carrier frequency.

In addition, the power amplifiers are connected in series in multiple stages,
By using, as at least the final stage amplifier, the power amplifier and the control method thereof described in the first to fourth embodiments, it is possible to obtain a low-distortion multistage power amplifier whose distortion symmetry can be controlled.

Further, in the present embodiment, the control circuit is
Input side matching circuit 102, input side DC bias supply terminal 1
03, the output side matching circuit 105, and the output side DC bias supply terminal 106 is controlled so that the frequency distribution of the distortion component of the signal appearing at the output terminal is controlled to be symmetrical with respect to the carrier frequency. Not limited to Input side DC bias supply terminal 10 of power amplifier
3 and / or the DC bias voltage of the output DC bias supply terminal 106 may be fixed. In such a case, the control circuit cannot control the DC bias voltage of the input side DC bias supply terminal 103 and / or the output side DC bias supply terminal 106, but the input side matching circuit 102 and the output side matching circuit 105. By controlling
The frequency distribution of the distortion component of the signal appearing at the output terminal 107 can be controlled to be symmetrical with respect to the carrier frequency. When the power amplifier does not include either the input side matching circuit 102 or the output side matching circuit 105 or the impedance to be controlled is fixed, the other matching circuit is controlled. , The frequency distribution of the distortion component of the signal appearing at the output terminal 107 can be controlled to be symmetrical with respect to the carrier frequency.

Further, by using the above power amplifier in the transmission circuit of the wireless communication device, the symmetry of distortion can be controlled,
A low distortion transmission circuit and wireless communication device can be obtained.

[0127]

As is apparent from the above description, according to the present invention, the power amplifier, the low distortion power amplifier, the multistage amplifier, which can control the distortion appearing in the output of the power amplifier to be symmetrical or asymmetrical, A power amplifier control method, a transmission circuit, and a wireless communication device can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a first embodiment of the present invention.

FIG. 2 is a diagram showing impedances of the input side and output side matching circuits according to the first embodiment of the present invention.

FIG. 3 is a diagram showing characteristic changes of the IMD 3 according to the first embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a second embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of a third embodiment of the present invention.

FIG. 6 is a diagram showing a configuration and characteristics of a conventional power amplifier.

FIG. 7 is a diagram showing distortion characteristics of a conventional power amplifier.

FIG. 8 is a diagram showing a configuration of an input side matching circuit according to the first embodiment of the present invention.

FIG. 9 is a diagram showing a configuration of an output side matching circuit according to the first embodiment of the present invention.

FIG. 10 is a diagram showing impedance at a frequency of a modulation bandwidth viewed from the transistor according to the first embodiment of the present invention.

FIG. 11 is a diagram showing a configuration of another even harmonic short-circuit circuit according to the first embodiment of the present invention.

FIG. 12 is a diagram showing a configuration of a low distortion power amplifier according to a fourth embodiment of the present invention.

FIG. 13 is a diagram showing a spectrum of a signal in each part of the low distortion power amplifier according to the fourth embodiment of the present invention.

FIG. 14 is a diagram showing another configuration of the input side matching circuit according to the first embodiment of the present invention.

[Explanation of symbols]

100, 400, 500, 520, 600, 620 Power amplifier 101, 401, 501, 513, 611, 621 Input terminal 102, 105, 402, 405, 502, 505 Matching circuit 104, 404, 504 Transistor 103, 106, 403 , 406, 503, 506 DC bias supply terminals 107, 407, 507, 514, 612, 622 Output terminals 108, 208, 408, 508 Control circuits 409, 509 Distributors 410, 510 Output detection circuits 411, 511 Memories 512, 610 Distortion compensation circuit

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hisashi Adachi             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. (72) Inventor Makoto Sakakura             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. (72) Inventor Toshio Ohara             3-1, Tsunashima-Higashi 4-chome, Kohoku-ku, Yokohama-shi, Kanagawa             Matsushita Communication Industry Co., Ltd. F term (reference) 5J090 AA01 AA41 CA21 FA10 GN01                       HA02 HA25 HA26 HA29 HA33                       KA00 KA12 KA15 KA29 MA14                       SA13 TA01 TA02 TA03                 5J091 AA01 AA41 CA21 FA10 HA02                       HA25 HA26 HA29 HA33 KA00                       KA12 KA15 KA29 MA14 SA13                       TA01 TA02 TA03 UW08                 5K060 BB07 HH06 HH31 HH37 JJ08                       KK06 LL07 LL11

Claims (20)

[Claims] 1. An input terminal for inputting an input signal from the outside, a transistor for amplifying the input signal, an output terminal for outputting the output signal from the transistor to the outside, and an output terminal appearing at the output terminal. And a control circuit for controlling the frequency distribution of the distortion component of the signal so as to be symmetrical or asymmetrical with respect to the carrier frequency. 2. An input side matching circuit connected between the input terminal and an input of the transistor, an output side matching circuit connected between the output terminal and an output of the transistor, and An input side DC bias supply terminal for supplying a DC bias voltage to the input side, and an output side DC bias supply terminal for supplying a DC bias voltage to the output side of the transistor, the control circuit, the input side matching circuit, By controlling at least one of a DC voltage supplied to the output side matching circuit and the input side DC bias supply terminal, and a DC voltage supplied to the output side DC bias supply terminal, The power amplifier according to claim 1, wherein the power amplifier is controlled to be asymmetric. 3. The input circuit as viewed from the input side matching circuit from the input of the transistor at at least one frequency of a frequency of a modulation bandwidth, a carrier frequency and a harmonic frequency of the carrier frequency. The power amplifier according to claim 2, wherein the impedance of the side matching circuit is controlled to be symmetrical or asymmetrical. 4. The input side matching circuit includes an even harmonic short-circuit circuit, which has a lower impedance or a short circuit than a predetermined value at a frequency of an even harmonic of a carrier frequency, on a terminal side connected to the transistor. The power amplifier according to claim 3, comprising. 5. The matching circuit on the input side, one of which is connected to the input terminal and which changes a carrier frequency impedance changing circuit, and one of which is connected to the other of the carrier frequency impedance changing circuit and the other of which is connected to the other. Is a capacitor connected to the input of the transistor, one is connected to the input side DC bias supply terminal, a modulation bandwidth frequency impedance change circuit for changing the impedance of the frequency of the modulation bandwidth, one to the input of the transistor And the other side is connected to the other side of the modulation bandwidth frequency impedance changing circuit, supplies the DC bias voltage supplied from the input side DC bias supply terminal to the transistor, and a signal of a carrier frequency is input to the input side. Conveyance that prevents leakage into the DC bias supply terminal The power amplifier according to claim 3, further comprising at least a wave cutoff circuit, wherein at least one of the carrier frequency impedance change circuit and the modulation bandwidth frequency impedance change circuit is variable. 6. The output side of the control circuit, wherein the output side matching circuit is viewed from the output of the transistor at at least one frequency of a modulation bandwidth frequency, a carrier frequency, and a harmonic frequency of the carrier frequency. The power amplifier according to claim 2, wherein the impedance of the matching circuit is controlled to be symmetrical or asymmetrical. 7. The output side matching circuit includes an even harmonic short-circuit circuit, which has a lower impedance or a short circuit than a predetermined value at a frequency of an even harmonic of a carrier frequency, on a terminal side connected to the transistor. The power amplifier according to claim 6, which comprises. 8. The output-side matching circuit, one of which is connected to the output terminal and which changes the impedance of the carrier frequency, has a carrier-frequency impedance changing circuit, and the other of the carrier-frequency impedance changing circuit has one connected and the other. Is a capacitor connected to the output of the transistor, one is connected to the output side DC bias supply terminal, a modulation bandwidth frequency impedance change circuit for changing the impedance of the frequency of the modulation bandwidth, one to the input of the transistor Is connected to the other side of the modulation bandwidth frequency impedance changing circuit, the DC bias voltage supplied from the output side DC bias supply terminal is supplied to the transistor, and a signal of a carrier frequency is output to the output side. Conveyance that prevents leakage into the DC bias supply terminal 8. The power amplifier according to claim 6, further comprising at least a wave cutoff circuit, wherein at least one of the carrier frequency impedance change circuit and the modulation bandwidth frequency impedance change circuit is variable. 9. The control circuit is for controlling so as to be symmetrical, wherein the control circuit is (1) at a frequency of a modulation bandwidth in which the input side matching circuit is viewed from the input of the transistor. The condition that the imaginary part of the impedance of the input side matching circuit is smaller than a predetermined value or substantially zero, and (2) at the double harmonic frequency of the carrier wave frequency when the input side matching circuit is viewed from the input of the transistor. The condition that the imaginary part of the impedance of the input side matching circuit is smaller than a predetermined value or substantially zero, and (3) the output side at the frequency of the modulation bandwidth in which the output side matching circuit is viewed from the output of the transistor. The condition that the imaginary part of the impedance of the matching circuit is smaller than a predetermined value or is substantially zero, and (4)
At least one of the conditions that the imaginary part of the impedance of the output side matching circuit at the second harmonic frequency of the carrier frequency when the output side matching circuit is viewed from the output of the transistor is smaller than a predetermined value or substantially zero. The power amplifier according to claim 2, wherein the input side matching circuit and / or the output side matching circuit is controlled so as to satisfy the above conditions. 10. A divider that divides an output signal of the output side matching circuit into two, an output from one output of the divider, which is connected between one output of the divider and the control circuit. An output detection circuit that detects an operating state based on a signal, control information for the input side matching circuit, control information for the output side matching circuit, and control information for a DC bias voltage supplied to the input side DC bias supply terminal, and A memory for storing at least one control information of the control information for the DC bias voltage supplied to the output side DC bias supply terminal in association with the operating state, and the operating state means at least output power and carrier wave. The frequency and the frequency of the modulation bandwidth, the other output of the distributor is connected to the output terminal, the control circuit is detected. The control information corresponding to the operating state is read from the memory, and based on the control information, the input side matching circuit, the output side matching circuit, and the DC bias voltage supplied to the input side DC bias supply terminal, and the DC bias voltage. The power amplifier according to claim 2, which controls at least one or more DC bias voltages supplied to the output DC bias supply terminal. 11. The control circuit performs control so as to be asymmetrical, wherein the control circuit has a distortion component of a signal appearing at the output terminal that is higher than a carrier frequency or lower than a carrier frequency. To make the frequency component smaller than a predetermined value,
The power amplifier according to claim 2, which controls the input-side matching circuit and / or the output-side matching circuit. 12. The power amplifier according to claim 2, wherein the control circuit controls to be symmetrical, and the preamplifier for predistorting an input signal to the power amplifier. Compensation circuit, the pre-compensation circuit pre-distorts the input signal, by the control circuit so that the frequency distribution of the distortion component of the signal appearing at the output terminal is symmetrical with respect to the carrier frequency, A low distortion power amplifier in which distortion components of a signal appearing at the output terminal are reduced. 13. The low distortion power amplifier according to claim 12, wherein said control circuit also controls the operation of said predistortion circuit so as to reduce the distortion component of the signal appearing at said output terminal. 14. The low distortion power amplifier according to claim 12, wherein the pre-compensation circuit pre-distorts an input signal to the power amplifier in a baseband region, an intermediate frequency region, or a carrier frequency region. 15. A first power divider that divides an input signal into two, a first vector adjuster that adjusts the amplitude and phase of one output signal of the first power divider, and the first power divider. A main amplifier that amplifies the output signal of the vector adjuster, a second power divider that divides the output signal of the main amplifier into two, and a first delay that delays the other output signal of the first power divider. A circuit, a power detector for distortion detection for combining one output signal of the second power divider and an output signal of the first delay circuit, and the other output signal of the second power divider. A second delay circuit for delaying; a second vector adjuster for adjusting the amplitude and phase of the output signal of the distortion detecting power combiner; and an auxiliary amplifier for amplifying the output signal of the second vector adjuster. The output signal of the second delay circuit and the auxiliary A low-distortion power amplifier, comprising: a power combiner for distortion removal that combines the output signal of the amplifier and outputs the combined signal, wherein the power amplifier according to claim 11 is used as the main amplifier. 16. A power amplifier having an input terminal for inputting an input signal from the outside, a transistor for amplifying the input signal, and an output terminal for outputting the output signal from the transistor to the outside. A method of controlling a power amplifier, wherein the frequency distribution of distortion components of a signal appearing at the output terminal is symmetrical or asymmetrical with respect to a carrier frequency. 17. An input side matching circuit is connected between the input terminal and the input of the transistor, an output side matching circuit is connected between the output terminal and the output of the transistor, and the input side of the transistor is connected to the input side of the transistor. A DC bias voltage is supplied from an input DC bias supply terminal, a DC bias voltage is supplied to the output of the transistor from an output DC bias supply terminal, the input side matching circuit, the output side matching circuit, and the input side DC voltage supplied to the DC bias supply terminal,
17. The method for controlling a power amplifier according to claim 16, wherein the symmetric or asymmetric control is performed by controlling at least one or more DC voltages supplied to the output DC bias supply terminal. 18. A plurality of amplifiers connected in series in multiple stages, wherein at least a final stage amplifier among the plurality of amplifiers is provided.
A multistage amplifier using the power amplifier according to any one of claims 1 to 11 or the low distortion power amplifier according to any one of claims 12 to 15. 19. A transmission circuit using the power amplifier according to any one of claims 1 to 11, the low distortion power amplifier according to any one of claims 12 to 15, or the multistage amplifier according to claim 18. 20. A wireless communication device using the power amplifier according to claim 1, the low distortion power amplifier according to claim 12, or the multistage amplifier according to claim 18. .