JPH04286115A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a method which eliminates foreign matter in a contact hole and produces-an ohmic contact definitely with regards to a manufacturing method of a semiconductor device. CONSTITUTION:Insulation films 2 and 6 formed on a, semiconductor 1 substrate or a conductor, is dry-etched so as to form a contact hole for a wafer. The wafer thus formed is exposed to an ambient atmosphere including heated hydrogen or hydrogen plasma or hydrogen plasma and chlorine plasma before the formation of a wiring layer to fill the contact hole 10 so that deposits 11 built up on the contact hole 11 may be eliminated.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device. In recent years, the width of contact holes in VLSIs has become smaller year by year, reaching sub-micron or half-micron dimensions. For this reason, contact resistance tends to increase even if a very small amount of deposit is present in the contact hole.

[0002] Increase in contact resistance significantly deteriorates the reliability of VLSI. Therefore, it is necessary to remove the deposits and keep the contact resistance stable and low.

0003

2. Description of the Related Art Conventionally, when etching an oxide film when forming contact holes in integrated circuits, anisotropic etching has been performed by diluting gas such as CF4, CHF3, etc. with Ar gas. Normally, the flow rates of CF4 and CHF3 need only be approximately the same, but as integrated circuits become ultra-LSI and contact hole sizes become submicron, precise control becomes essential.
It has become necessary to improve the selectivity of O2 (oxide film) to Si.

On the other hand, when the proportion of CHF3 is large, CH
The decomposition of F3 tends to produce organic deposits, which have the disadvantage of being deposited within the contact hole. Therefore, when a wiring layer is formed by burying a contact hole, contact resistance may increase, resulting in a problem of lack of stability.

[0005]

[Problems to be Solved by the Invention] In view of the above-mentioned problems, the present invention aims to effectively remove deposits even if deposits are formed in the contact hole during formation of the contact hole, thereby achieving a low contact resistance. An object of the present invention is to provide a method that can stably form a wiring layer.

[0006]

[Means for solving the problem] Figures 1(a) to (d)
2A and 2B are process-order sectional views for explaining an example. The above problem is solved by dry etching the insulating films 2 and 6 formed on the semiconductor substrate 1 or the conductor to form the contact hole 10.
The wafer 12 on which the contact holes 10 are formed is
Before forming the wiring layer 13 in which the wiring layer 13 is embedded, the wiring layer 13 is exposed to an atmosphere containing heated hydrogen, an atmosphere containing hydrogen plasma, or an atmosphere containing hydrogen plasma and chlorine plasma.
The problem is solved by a semiconductor device manufacturing method that removes the deposit 11 deposited in the contact hole 10.

[0007]

[Operation] Even if organic deposits are formed in the contact hole 10 when the contact hole 10 is formed, if it is exposed to a heated atmosphere containing hydrogen, the hydrogen gas will react with the organic matter and form CH4, C2 H2, etc. This produces volatile gases and removes deposits.

[0008] Further, for example, H+ ions, H radicals, etc. existing in an atmosphere containing hydrogen plasma have a similar effect, and deposits are removed. When the contact hole 10 is formed, the etching gas may etch the metal inner wall of the chamber or other metal parts, and for example, Al, Fe, or metal compounds thereof may be deposited in the contact hole 10. In this case, if exposed to an atmosphere containing chlorine plasma, for example, Cl- ions, Cl radicals, etc.
Deposits of Al, Fe, and their metal compounds are AlCl
3, FeCl3, etc., and is evaporated and removed.

[0009]

[Example] Figures 1(a) to (d) are cross-sectional views in the order of steps for explaining the example.
, shows the process of forming a wiring layer connected to the gate electrode. FIG. 2 is a conceptual diagram of a processing device showing the first embodiment,
FIG. 3 is a conceptual diagram of a processing device showing a second embodiment.

[0010] Hereinafter, embodiments will be explained with reference to these figures. FIG. 1(a) A gate oxide film 2, a field oxide film 3, a gate electrode 4, an insulating film side wall 5, a diffusion region (source/drain) 6 are formed on a reference Si substrate 1, and an insulating film 7 covering the entire surface is formed. Ru. The gate electrode 4 is, for example, poly-Si, and the insulating film 7 is, for example, a SiO2 film with a thickness of about 1000 Å.

A resist is applied on the insulating film 7, and openings 9 are patterned on the source/drain 6 to form a resist mask 8. The width of the opening 9 is, for example, 0.5 μm.
It is. Anisotropic etching of the insulating film 7 is performed through the opening 9 using a mixed gas of Ar, CF4, and CHF3 as an etching gas. The flow rate ratio of CF4 and CHF3 is, for example, 30:70.

Referring to FIG. 1(b), anisotropic etching is performed using a mixed gas of CF4 and CHF3 to form a contact hole 10 exposing the surface of the source/drain 6, and then the resist mask 8 is peeled off.

An organic deposit 11 generated by decomposition of the etching gas remains in the contact hole 10 . Figure 1(c) A reference wafer is exposed to a heated H2 atmosphere, or an atmosphere containing H2 plasma, or H2 plasma and Cl2.
A process is performed to remove the deposit 11 by exposing it to an atmosphere containing plasma.

Refer to FIG. 1(d). Thereafter, for example, poly-Si is deposited on the entire surface to form a wiring layer 13 connected to the source/drain 6.

Next, a first embodiment for removing deposits 11 will be described with reference to FIG. In FIG. 2, 12 is a wafer with a deposit 11 on it, 14
is a support stand, 15 is a quartz tube, 16 is a heater, 17a
is the processing gas and 17b is the processing gas and is H2,
17c is the raw material gas for the wiring layer, SiH4, 18a ~ 1
8d represents a valve, and 19a to 19c represent gas supply pipes.

The wafer 12 is placed on the support stand 14 and placed inside the quartz tube 15, and the wafer 12 is placed in the quartz tube 15 by the heater 16.
Heat to 00-650°C. H2 100cc/m
diluted with Ar900cc/min and put into quartz tube 1.
Supply within 5 days. Deposit 11 could be completely removed by supplying for 5 to 10 minutes.

The supply of H2 and Ar is stopped, and the wafer 12
SiH4 from the gas supply pipe 19c is kept at the same temperature.
supply. The supply amount of SiH4 is 100 to 400
cc/min. After 20 minutes of supply, thickness 20
A wiring layer 13 of poly-Si having a thickness of 0.00 Å was formed. Thereafter, the wiring layer 13 was patterned to form a wiring pattern.

In this way, a wiring pattern with low contact resistance was formed. Next, referring to Figure 3,
A second example of removing deposits 11 will be described. In FIG. 3, 12 is a wafer on which a resist mask 8 is formed, 20 is a stage, 21 is an Al chamber, 22 is a quartz shower, 23a to 23f are processing gases, 24a to 24g are valves, 25a
~25f represents a gas supply pipe, and 26 represents an RF power source.

The wafer 12 is placed on the stage 20 and the Al
After placing it in a chamber 21 and evacuating it, Ar, CF4, and CHF3 are supplied into the Al chamber 21. The pressure was 100 mTorr, the gas flow rate was about 40 to 100 sccm for each gas, and CF4 and CHF3
The flow rate ratio is 30:70. RF power supply 26 to 1
A power of 3.56 MHz and 1 kW is supplied to generate plasma, and the SiO2 film 7 is anisotropically etched to form a contact hole 10. A deposit 11 remains in the contact hole 10 after the SiO2 film 7 is removed.

[0020] This deposit is an organic substance produced by decomposition of etching gas such as CF4 or CHF3. Sometimes A
Metal fine powder and metal compound fine powder produced by etching the chamber 21 and other metal parts may be mixed together. To remove the deposit 11, H2 diluted with Ar is supplied for 40-100 sccm into the Al chamber 21, or in addition Cl2 is supplied for 40-100 s.
ccm and generate plasma.

Deposit 11 is removed by hydrogen plasma and chlorine plasma. The wafer 12 is placed in the Al chamber 21
After removing the resist mask 8 from the film and peeling off the resist mask 8, the contact hole 10 is filled with polysilicon by, for example, the CVD method.
A wiring layer 13 is formed by depositing i, and the wiring layer 13 is patterned to form a wiring pattern.

In this way, a wiring pattern with low contact resistance is formed. In addition, in the example, poly-Si wiring connected to the source and drain was explained.
The present invention can be applied to other cases, and can be applied very effectively, for example, to connecting lower layer wiring and upper layer wiring via contact holes.

[0023]

[Effects of the Invention] As explained above, according to the present invention, organic or metal deposits generated during etching for forming contact holes in an insulating film can be removed.
Contact resistance can be kept low and stable.

The present invention has the effect of reliably forming fine contact holes accompanying the miniaturization of VLSIs, and contributes to improved productivity.

[Brief explanation of the drawing]

[Fig. 1] (a) to (d) are process-order cross-sectional views for explaining an example.

FIG. 2 is a conceptual diagram of a processing device showing a first embodiment.

FIG. 3 is a conceptual diagram of a processing device showing a second embodiment.

[Explanation of symbols]

1 is a semiconductor substrate, Si substrate 2 is a gate oxide film 3 is a field oxide film 4 is a gate electrode 5 is an insulating film, side walls 6 are diffusion regions, source/drain 7 are insulating films, and SiO2 film 8 is a resist. The mask 9, the opening 10, the contact hole 11, the deposit 12, the wafer 13, the wiring layer 14, the support stand 15, the quartz tube 16, the heater 17a, 17b, the processing gas 17c, the raw material gas for wiring 18a to 18d, the valve 19a - 19c are gas supply pipes 20, stage 21 is Al chamber 22, quartz shower 23a - 23f are processing gases 24a - 24g are valves 25a - 25f are gas supply pipes

Claims (1)

[Claims] 1. A wafer (12) in which a contact hole (10) is formed by dry etching an insulating film (2, 6) formed on a semiconductor substrate (1) or a conductor.
) is exposed to an atmosphere containing heated hydrogen, an atmosphere containing hydrogen plasma, or an atmosphere containing hydrogen plasma and chlorine plasma to form the contact hole (10) before forming the wiring layer (13) to fill the contact hole (10). A method for manufacturing a semiconductor device, comprising removing a deposit (11) deposited in a hole (10).