JPH04280616A - Chip type laminated ceramic capacitor and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a chip type laminated ceramic capacitor, having high reliability and mechanical strength, on which a plated layer can be formed continuously on the surface of a terminal electrode in a tightly fixed manner without strictly controlling the upper limit of compounding quantity of inorganic bonding material. CONSTITUTION:The title ceramic capacitor is provided with a bare chip 11 formed by polymerizing a plurality of ceramic dielectric layers having internal electrodes 13, terminal electrodes 12 which are electrically connected to inner electrodes 13 by baking paste, containing metal powder and inorganic bonding material, on both end parts of the bare chip 11, and metal-plated layers 14 and 15 formed on the surface of the terminal electrodes 12. The characteristics of the above-mentioned constitution is that the surface of the terminal electrodes 12 of a laminated ceramic capacitor 10 is polished and that metal-plated layers 14 and 15 are formed on the polished surface of the terminal electrodes.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a chip-type multilayer ceramic capacitor whose terminal electrode is composed of an electrode layer baked with a paste containing metal powder and an inorganic binder, and a plating layer on the surface of the baked electrode layer, and a method for manufacturing the same. It is related to.

0002

[Prior art] Chip type multilayer ceramic capacitors are
It is equipped with a bare chip formed by polymerizing a plurality of ceramic dielectric layers having internal electrodes, and a terminal electrode electrically connected to the internal electrode, and the surface of the terminal electrode is plated with Ni, Sn or Sn/Pb. Two plating electrode layers are formed. This terminal electrode is made by applying a paste made by kneading metal powder such as Ag, Pd, or Pt, an inorganic binder, and an organic vehicle to both ends of the bare chip.
A terminal electrode with a plating base is formed by firing at a temperature of about 600 to 800°C, and two layers of Ni plating and Sn or Sn/Pb plating are formed in this order on the surface of this base electrode by electroless or electrolytic plating. ing. This chip-type multilayer ceramic capacitor is used with terminal electrodes soldered to a substrate. Since the terminal electrodes are used to connect the internal electrodes of the capacitor and the electric circuit on the substrate, their quality greatly affects the electrical characteristics, reliability, mechanical characteristics, etc. of the capacitor. Therefore, terminal electrodes are required to have two contradictory properties: solder wettability and solder heat resistance, and also to have reliability as typified by moisture resistance.

Ni plating is applied to prevent the metal components of the terminal electrodes from being leached into the molten solder when soldering the terminal electrodes of a capacitor, in other words, to prevent the electrodes from being eaten away by the solder. Pb plating is applied to facilitate solderability. Usually, these platings are performed using a wet electrolytic barrel plating method. If there are holes inside the terminal electrode during the plating process, the electrolytic solution may infiltrate into the holes, which may reduce the reliability of the capacitor or weaken the bonding strength of the terminal electrode. In order to increase the bonding strength of this terminal electrode to the bare chip, an inorganic bonding material mainly made of glass is added to the paste. This inorganic binder melts when the terminal electrode is baked and has the effect of filling the voids inside the terminal electrode. By adjusting the composition and blending ratio of this inorganic binder, it is possible to prevent a decrease in reliability due to the electrolyte.

0004

[Problems to be Solved by the Invention] However, when the blending ratio of the inorganic binder is increased, the glass is pushed out onto the surface of the terminal electrode as the metal particles are sintered and the volume contracts when the terminal electrode is baked. It will be covered with glass. This tendency is particularly noticeable in the parietal region where the electrode thickness is relatively large. When plating is performed in this state, the plating film is not deposited on the surface of the glass, so the plating film first deposits on the surface of the metal and extends laterally from there to cover the entire surface of the terminal electrode. In other words, the entire plating film does not come into close contact with the terminal electrode, but only partially. In this state, there is no problem with the reliability of the capacitor itself, but if an external force is applied to the terminal electrode after it is soldered to the board, cracks will easily occur between the plating film and the terminal electrode, so the reliability will be reduced in actual use. There was a problem in that the value decreased significantly. On the other hand, if the blending ratio of the inorganic binder is reduced, it is possible to prevent the glass from protruding on the surface of the terminal electrode, but since pores remain inside the terminal electrode, it is no longer possible to prevent the electrolyte from entering as described above. There were drawbacks.

The object of the present invention is to provide a chip type that does not require strict regulation of the upper limit of the amount of inorganic binder, can form a plating layer in close contact with the surface of a terminal electrode, and has high reliability and mechanical strength. An object of the present invention is to provide a multilayer ceramic capacitor and a method for manufacturing the same.

[0006]

[Means for Solving the Problems] The chip type multilayer ceramic capacitor of the present invention has an internal electrode 13 as shown in FIG.
The bare chip 11 is formed by polymerizing a plurality of ceramic dielectric layers having the following properties, and the terminals are electrically connected to the internal electrodes 13 by baking a paste containing metal powder and an inorganic binder onto both ends of the bare chip 11. It includes an electrode 12 and plating layers 14 and 15 formed on the surface of the terminal electrode 12. Its characteristic structure is a multilayer ceramic capacitor 1
The surface of the terminal electrode 12 of No. 0 was polished, and the plating layers 14 and 15 were formed on the polished surface of this terminal electrode.

The present invention will be explained in detail below. The multilayer ceramic capacitor of the present invention is manufactured by polymerizing a plurality of ceramic dielectric layers having internal electrodes to form a bare chip, and forming terminal electrodes electrically connected to the internal electrodes at both ends of the bare chip. Ru. This ceramic dielectric has
Dielectric materials such as lead-based and barium titanate-based materials are used, and noble metals such as Pd, Pt, Ag/Pd, or N are used for the internal electrodes.
Base metals such as i, Fe, Co, etc. are used. A Ni plating layer and a Sn or Sn/Pb plating layer are formed in this order on the surface of the terminal electrode of the present invention.

[0008] In this method of manufacturing a terminal electrode, first, metal powder and an inorganic binder are kneaded together with an organic vehicle to prepare a paste. The metal powder used includes one or more of Ag, Pd, Pt, and Cu, and the inorganic binder includes glass such as lead borosilicate glass, zinc borosilicate glass, lead zinc borate glass, etc. is used. This glass must not be corroded by the electrolyte during the plating process and must have thermal matching with the bare chip to be bonded. In addition to glass, oxide fine particles may also be blended into the inorganic binder. The organic vehicle used is a mixture of ethyl cellulose, methyl cellulose, or the like with an organic solvent. When the paste is 100% by weight, the metal powder is 70 to 80% by weight, the inorganic binder is 4 to 15% by weight based on the metal powder, and the organic vehicle is the balance. The above blending ratio of the inorganic binder depends on the specific gravity, particle size, and
Depending on the density after baking, the specific gravity of the glass, etc., and in order to prevent deterioration during plating, it is decided to mix the amount in an amount greater than the amount that fills the voids of the metal particles after baking the terminal electrode. That is, the upper limit of the inorganic binder content of 15% by weight is a little higher than the usual content.

Next, the end of the bare chip was immersed in the prepared paste, pulled up, and dried at 150 to 200°C.
The paste is baked at 00 to 800°C to form a terminal electrode. With the above-mentioned blending ratio of the inorganic binder, the surface of the terminal electrode is covered with the glass component, so the surface of the terminal electrode is polished to remove the glass component floating on the electrode surface. As methods for polishing the terminal electrode, there are a chemical method in which the glass component is dissolved and removed using an aqueous sodium phosphate solution, and a physical method in which the glass component is removed by barrel polishing. Barrel polishing is preferred from the viewpoint of reliability. Barrel polishing includes methods such as rotating barrel, centrifugal barrel, and vibrating barrel. Both are polished with a medium consisting of an abrasive, water, or an organic solvent. In rotary barrel polishing, a multilayer ceramic capacitor chip, fine ceramic abrasive material, and water are placed in a resin pot made of polyethylene or the like, and the terminal electrodes of the ceramic capacitor are polished by stirring them. Polishing conditions such as the mixing ratio and polishing time are determined depending on the polishing amount, material, shape, etc. of the capacitor chip, but the mixing ratio is as follows: When the resin pot is 100% by volume, the multilayer ceramic capacitor chip is
~10% by volume, 5-20% by volume of abrasive, 20-5% by volume of water.
It is preferable to add 0% by volume, and the polishing time is 30 to 90%.
About a minute is preferable. After polishing, ultrasonic cleaning is performed using ion-exchanged water for 10 to 30 minutes.

[0010] A Ni plating layer and a Sn or Sn/Pb plating layer are formed in this order on the surface of the polished terminal electrode. In the present invention, the thickness of the Ni plating layer is preferably 1 to 3 μm, and the thickness of the Sn or Sn/Pb plating layer is preferably 5 to 20 μm. These plating layers are formed by barrel plating, such as electroless or electrolytic plating. The plating bath is Ni,
For both Sn and Sn/Pb, known ones are used.

[Effect] Even if a paste is prepared by blending a large amount of inorganic binder in consideration of variations without strictly regulating the upper limit of the inorganic binder content, and this paste is baked on both ends of the bare chip, even if the paste is baked on both ends of the bare chip, Excess inorganic bonding material floating on the surface of the terminal electrode is removed by polishing. When plating is performed in this state, a plating film is formed continuously and closely on the surface of the metal.

[0011]

[Effects of the Invention] As described above, in the conventional technology, it is necessary to design a terminal electrode by taking into consideration glass protruding on the surface, and it is extremely difficult to manufacture a versatile terminal electrode material. However, according to the present invention, by polishing the surface of the terminal electrode after baking and plating the surface without taking the above considerations, the plating layer is formed in continuous and close contact, improving moisture resistance and solder resistance. It is possible to produce a terminal electrode that has excellent properties in both wettability. As a result, even if there are large variations in capacitor materials or manufacturing conditions, it is possible to absorb this and produce a chip-type multilayer ceramic capacitor that always has terminal electrodes with excellent reliability and mechanical properties.

0012

EXAMPLES Next, examples of the present invention will be explained based on the drawings together with comparative examples. <Example> As shown in FIG. 1, a chip-type multilayer ceramic capacitor 10 includes a bare chip 11 and
Terminal electrodes 12 formed at both ends of the terminal electrodes 12 are provided. The bare chip 11 is made of barium titanate and contains the noble metal Pd.
The internal electrode 13 has a length of 3.1 mm and a width of 1.
A chip having a size of 5 mm and a thickness of 0.85 mm (manufactured by Mitsubishi Materials Corporation, type 3216, JIS-R characteristics, rating 50 V, capacity 100 nF) was used. A Ni plating layer 14 and a Sn/Pb plating layer 15 are formed in this order on the surface of the terminal electrode 12. The terminal electrode 12 was formed under the following conditions.

[0013] A commercially available silver paste (JPN5224 manufactured by Mitsubishi Materials Corporation) containing 78% by weight of Ag component, an inorganic binder consisting of lead borosilicate glass, and the remainder an organic paste containing ethyl cellulose, butyl carbitol, and terpineol. A paste was prepared by kneading the mixture with vehicle using a three-roll kneader. Lead borosilicate glass is ground to under 600 mesh (glass particle size is approximately 20 μm or less), and three types of pastes are prepared containing 4% by weight, 8% by weight, and 12% by weight based on the metal component. did. Using a terminal electrode applicator (manufactured by Paloma), three types of paste were applied to both ends of the bare chip 11 so that the thickness after baking was 100 μm, and the paste was applied to both ends of the bare chip 11 at 200°C under atmospheric pressure for 10 minutes.
Dry for a minute. Bare chips dried using a belt furnace for terminal electrode baking (manufactured by Koyo Lindberg Co., Ltd.) were heated to 800°C under atmospheric pressure at a rate of 25°C/min, held there for 5 minutes, and then heated at a rate of 20 min/min. The temperature was lowered to room temperature at
A baked electrode layer was obtained.

The terminal electrode was polished under the following conditions. Pot: Polyethylene resin pot, internal volume: 2000cc
Abrasive material SiC abrasive material #100 (average particle size approximately 150 μm) Media
Water (contains 0.1% by weight of surfactant)
Mixing ratio Multilayer capacitor chip 20
0cc (20000 pieces)
Abrasive material 500cc
Medium 1000cc
Polishing time 3 at rotation speed 200 rpm
0 minutes

A Ni plating layer and a Sn/Pb plating layer were formed under the following conditions. ■ Ni plating pH 4.0, temperature 50℃ nickel sulfamate (N
Using a bath with a composition of i(NH2SO3)2.4H2O) 120g/L, 1 was applied to the surface of the terminal electrode by electrolytic barrel plating.
A μm thick Ni plating layer was formed. ■ Sn/Pb plating pH 4.5, tin (Sn) 15g/L and lead (
Using a bath having a composition of 6 g/L (Pb), a Sn/Pb plating layer with a thickness of 5 μm was formed on the surface of the Ni plating layer by electrolytic barrel plating. As a result, a chip-type multilayer ceramic capacitor was obtained in which two further plating layers were formed on the terminal electrodes. <Comparative Example> Three types of terminal electrodes with different amounts of inorganic binder were formed on both ends of the same bare chip as in the example in the same manner as in the example except that the terminal electrodes were not polished. Two plating layers were formed in the same manner as in the example.

<Measurement Method> Various characteristics of the multilayer ceramic capacitors manufactured in the above Examples and Comparative Examples were measured by the following methods. The number n in parentheses is the number of samples tested. (a) Capacitance (nF) and dielectric loss tangent (%) (n=1
00) LCR meter (manufactured by Hewlett Packard Company 4284)
Measurements were made at 1 kHz and 1 Vrms using (b) Insulation resistance (Ω) (n=50) High resistance meter (Model 4329A manufactured by Hewlett-Packard)
After applying a direct current voltage of 50 V using the following, the resistance was measured after 30 seconds had elapsed. (c) Terminal electrode adhesion strength (n = 10) Using a strength tester (IM-20 model manufactured by Intesco), a 0.8 mm solder drawn steel wire was attached to the terminal electrode of the sample on a hot plate at 230°C. They were adhered using crystal cream solder, and the adhesion strength was measured by pulling the steel wire at 10 mm/min. (d) Deflection limit value (n = 5) Using a strength testing machine (IM-20 model manufactured by Intesco), the terminal electrode of the sample was placed in the center of a glass epoxy substrate with a length of 90 mm, a width of 40 mm, and a thickness of 1.6 mm. Solder and
Span this board at 90° with the soldering side of the sample facing down.
Place it on a support stand of mm, apply a load to the upper surface of the center of the span,
The amount of deflection of the substrate until the sample peeled off from the substrate was measured. (e) High temperature load test (n=30) A DC voltage of 100 V was applied at a temperature of 125° C. and a relative humidity of 1% or less, and the presence or absence of dielectric breakdown after 1000 hours was examined. (f) Humidity load test (n=20) A DC voltage of 50 V was applied at a temperature of 85° C. and a relative humidity of 85%, and the time until dielectric breakdown occurred was measured. (g) Pressure cooker test (n=50) 151°C
A DC voltage of 50 V was applied at a temperature of 5 atm and a water vapor pressure of 5 atm, and the time until dielectric breakdown occurred was measured.

<Measurement results and evaluation> The results of (a) to (g) above are shown in Table 1 for Examples and Table 2 for Comparative Examples.
are shown respectively. (Hereafter, this page margin)

[0018]

[Table 1]

[0019]

[Table 2]

From Tables 1 and 2, in both Examples and Comparative Examples, the moisture resistance performance represented by the moisture resistance load test and pressure cooker test improves as the blending ratio of glass, which is an inorganic binder, increases. I understand. In addition, the terminal electrode adhesion strength and deflection limit value, which are typical values of mechanical properties, have a large polishing effect on the terminal electrode, and in the examples, both values increase as the blending ratio of glass increases. On the other hand, in a comparative example in which the terminal electrodes were not polished, when the glass blending ratio reached an excessive 12% by weight, the adhesion of the plating film deteriorated, and both the terminal electrode adhesion strength and the deflection limit value decreased significantly. It becomes impractical. As a result, it was found that the example exhibited substantially the same electrical characteristics and reliability as the comparative example, and exhibited superior values in mechanical strength and solder wettability.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a chip-type multilayer ceramic capacitor of the present invention.

[Explanation of symbols]

10 Chip type multilayer ceramic capacitor 11 Bare chip 12 Terminal electrode 13 Internal electrodes 14, 15 Plating layer

Claims (3)

[Claims] 1. A bare chip (11) formed by polymerizing a plurality of ceramic dielectric layers having internal electrodes (13).
), a terminal electrode (12) electrically connected to the internal electrode (13) by baking a paste containing metal powder and an inorganic binder onto both ends of the bare chip (11), and a terminal electrode (12) electrically connected to the internal electrode (13); 12) Plating layer formed on the surface of (
14, 15), the surface of the terminal electrode (12) is polished, and the plating layer (12) is coated on the polished surface of the terminal electrode.
4, 15) A chip-type multilayer ceramic capacitor characterized in that: 4, 15) are formed. 2. The chip-type multilayer ceramic capacitor according to claim 1, wherein the surface polishing of the terminal electrode (12) is barrel polishing. 3. A bare chip (11) is formed by polymerizing a plurality of ceramic dielectric layers having internal electrodes (13), and a paste containing metal powder and an inorganic binder is applied to both ends of the bare chip (11). After that, a terminal electrode (12) electrically connected to the internal electrode (13) is formed by firing, and a plating layer (14,
15), in which the plating layer (14, 15) is formed after polishing the surface of the terminal electrode (12). Production method.