JPH0427694B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a method for manufacturing a semiconductor device.

Conventionally, in semiconductor integrated circuits, an insulating layer is formed on a semiconductor substrate on which predetermined circuit elements are formed.
A metal layer such as aluminum is formed on the insulating layer, or a semiconductor layer such as silicon is formed in the openings of this insulating layer by vapor deposition, sputtering, vapor deposition, etc., and then a wiring path is formed by photolithography. Wiring was formed by leaving some parts of the metal layer and removing other parts.

Conventionally, in this semiconductor device, the side surfaces of the wiring paths are exposed at least during the manufacturing process from forming the wiring paths to sealing them, and even after the device is completed, there are devices that do not have an insulating layer covering the wiring paths. Of course,
Even in devices that have an insulating layer, it is difficult to obtain a completely strong and dense insulating layer using methods other than thermal oxidation, so dirt enters from the sides of the wiring path, impairing the stability of the device and reducing the reliability of the semiconductor device.

It has also been proposed to create wiring layers by selective oxidation of polycrystalline silicon (Japanese Patent Application No. 1973-
63338, Japanese Patent Publication No. 49-32635), no consideration was given to the conductivity of the polycrystalline silicon wiring layer after selective oxidation, and there was no consideration given to the conductivity type of the element region in the semiconductor substrate and the polycrystalline silicon wiring layer. Relationships are not taken into consideration either, making it impractical.

An object of the present invention is to provide a practical method for manufacturing a semiconductor device having a highly reliable wiring/electrode structure.

A feature of the present invention is that a first impurity region of a second conductivity type, which is a conductivity type opposite to the first conductivity type, is formed on the semiconductor substrate of the first conductivity type. a step of forming an insulating layer having an opening through which a portion of the impurity region of No. 1 is exposed; a step of forming a semiconductor layer into which no impurity is continuously introduced within the opening and on the insulating layer; a step of selectively forming a silicon nitride film on the layer; a step of converting the semiconductor layer not covered with the silicon nitride film into an oxide layer by thermal oxidation; A second impurity region of the second conductivity type is introduced into the semiconductor substrate through the semiconductor layer and the opening, and is connected to the first impurity region. A method of manufacturing a semiconductor device includes a step of forming the semiconductor device on the semiconductor substrate.

According to the manufacturing method of the present invention, since impurities are introduced after the thermal oxidation step, the electrodes and wiring paths formed by the semiconductor layer can be made to have a predetermined low resistance value.

In other words, the amount of impurities contained in the semiconductor layer before the thermal oxidation process may not maintain its initial value after the thermal oxidation process, and an oxidized layer of the semiconductor layer containing a large amount of impurities is not suitable as a surface protective film due to its characteristics. However, in the present invention, since impurities are introduced after thermal oxidation, desired conductivity can be obtained.
Further, since the impurity is introduced after the shape of the electrode/wiring path is determined, the same conductivity type as that of the element region in the substrate formed in contact with the impurity can be freely selected. Furthermore, impurities introduced after thermal oxidation can form a predetermined impurity region in the semiconductor substrate through this semiconductor layer. Furthermore, since the second impurity region is formed by introducing impurities through the opening, the connection with the first impurity region is ensured.

Next, FIG. 1 shows a technology closely related to the present invention.

In FIG. 1, the same reference numerals represent the same elements, and a source region 2, which is a p-type diffusion region, is located on one main surface in the element formation area of an N-type single crystal silicon substrate 1.
and drain region 3 are formed. These regions are formed and a silicon dioxide layer 4 is formed on the main plane of the substrate 1 by thermal oxidation. This silicon dioxide layer is a thick field layer outside the device forming area, and is a thin layer inside the device forming area. After drilling holes in the silicon dioxide layer 4 as shown in FIG. 1A using standard photolithographic masking and etching techniques to provide ohmic corrosion to the source region 2 and drain region 3. A P-type silicon layer 5 of about 1 micron was formed thereon by vapor deposition, sputtering, vapor phase growth, or the like. Next, a silicon nitride film 6 is formed as a non-oxidizing insulating film thereon by vapor phase growth, and then a silicon nitride film 6 on the silicon layer 5 which is to become a wiring path is formed by standard photolithography.
The other parts were removed except for.

By further performing thermal oxidation, as shown in FIG. A wiring path (source electrode 7, gate electrode 8, drain electrode 9) was formed. Since the thickness of this silicon dioxide layer 10 was about 2.4 microns, 1.4 microns of this thickness was removed by etching to make the silicon dioxide layer 10 and wiring paths 7, 8, and 9 on the same surface, and then the silicon nitride film 6 was removed. Next, by thermal oxidation,
As shown in Figure 1, the surface of the semiconductor device is coated with silicon dioxide 1.
1. In this way, the electrode wiring of the semiconductor layer is connected to the element region and extends over the field insulating film.

FIG. 2 is a sectional view showing an embodiment of the present invention,
Similar to the process shown in Figure 1, the silicon layer is selectively oxidized by a thermal oxidation process to form electrode wiring paths 7, 8, and 9, and then impurities are introduced to lower the resistance of these wiring paths. It is. Single crystal silicon substrate 1
Middle diffusion region (source region 2, drain region 3)
When a hole is made in the upper insulating layer 4, even if the position of the hole is not completely within the area 2, 3 and extends slightly, the resistance of the wiring paths 7, 8, 9 can be reduced. During the diffusion to lower the impurities, the impurities were also diffused into the single crystal silicon substrate 1 to form regions 17 and 18, and these regions 17 and 18 were successfully etched. Therefore, in the wiring of the semiconductor device of the present invention, there is a large degree of latitude in determining the position for ensuring ohmic corrosion between the diffusion region and the wiring path, and the area of the diffusion region can be reduced to the minimum necessary, and the wiring path can be The resistance can be set to a low value with good controllability, and an impurity region can be formed at a predetermined value in the semiconductor substrate under the wiring path.

The embodiments described above are for illustrative purposes only, and
The present invention is not limited to these. For example, although the present invention is applied to an insulated gate field effect transistor in the above embodiment, it is generally applicable to unipolar type field effect semiconductor devices, field effect semiconductor integrated circuit devices, etc. The present invention can be applied to any so-called planar semiconductor device, such as a semiconductor device or a bipolar semiconductor device. Further, instead of single crystal silicon, semiconductor materials such as germanium and gallium arsenide can be used, and as the insulating layer 4, instead of silicon dioxide formed by thermal oxidation, silicon dioxide formed by thermal oxidation, vapor deposition, sputtering, vapor phase growth, etc. can be used. Silicon oxide, silicon dioxide, silicon nitride film, alumina, phosphorus glass, etc. can also be used. Further, instead of the silicon layer used as the wiring layer, a semiconductor layer of germanium, gallium arsenide, etc. formed by vapor deposition, sputtering, vapor phase growth, etc. can also be used. Furthermore, the dimensions and conductivity type of each part of the semiconductor device can be freely selected. Furthermore, it is also possible to use a partial combination of the wiring structure of the present invention and the conventional wiring structure within one semiconductor device. Further, an aluminum wiring path may be brought into contact with the silicon wiring layer of the embodiment through the opening provided in the surface insulating film 11 to form a multilayer structure, or a wiring layer formed by selective oxidation of the silicon layer may be formed through the same opening. It is also possible to provide multilayer wiring.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional model diagram showing a manufacturing process of a technology related to the present invention, and FIG. 2 is a cross-sectional model diagram showing an embodiment of the present invention. 1... Semiconductor base, 2... Source region, 3...
Drain region, 4... Insulating layer, 5... Semiconductor layer,
7, 8, 9... Wiring, 10... Thermal oxidation insulator.

Claims (1)

[Claims] 1. A first impurity region of a second conductivity type, which is an opposite conductivity type to the first conductivity type, is formed on a semiconductor substrate of a first conductivity type. a step of forming an insulating layer having a partially exposed opening, a step of forming a semiconductor layer into which impurities are not introduced continuously in the opening and on the insulating layer, and a step of forming a silicon nitride layer on the semiconductor layer. a step of selectively forming a film; a step of converting the semiconductor layer not covered with the silicon nitride film into an oxide layer by thermal oxidation; introducing an impurity into the semiconductor substrate through the semiconductor layer and the opening to form a second impurity region of the second conductivity type connected to the first impurity region in the semiconductor substrate under the opening. A method for manufacturing a semiconductor device, comprising the steps of: