JPH04276646A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make the title device small-sized and to make its heat-dissipating property good by a method wherein a metal is buried in a base body for a chip carrier and a chip is fixed and bonded to the surface of the metal. CONSTITUTION:A chip carrier is constituted of a base body in which an epoxy resin 9 has been fixed and bonded to the circumference of a copper plate 8 where a recessed part is formed on the surface. An interconnection pattern 2 is formed on the surface of the epoxy resin 9; an electrode 3 is formed at a peripheral end. A semiconductor chip 4 is mounted on the recessed part of the chip carrier; the semiconductor chip 4 and the interconnection pattern 2 are connected electrically by a wire 5. Heat generated at the semiconductor chip 4 is dissipated immediately to the copper plate 8. The coefficient of thermal expansion of the copper plate 8 coming into contact with the semiconductor chip 4 is much smaller than that of the epoxy resin, and a thermal stress exerted on the semiconductor element is extremely small.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to its mounting structure.

0002

2. Description of the Related Art Methods for mounting semiconductor elements include methods using metal, ceramic, and resin as a sealing package material.

Among these methods, a typical method using resin is called a chip carrier.

For example, (a) and (b) in FIG.
Here, (b) is a diagram showing the A-A cross section of (a)), a wiring pattern 2 is formed on the surface of a base 1 made of resin such as epoxy resin, and an external wiring pattern is formed on the peripheral edge. A semiconductor element 4 is mounted on the surface of the substrate, and the bonding pads of the semiconductor element chip 4 and the wiring pattern 2 are bonded with gold wire or aluminum wire. The wires are connected by wires 5, and these are further coated with resin 6. Reference numeral 7 denotes a resin retaining ring, which is used for positioning the sealing resin 6 and the like.

By the way, multi-terminal LSIs are often mounted on such chip carriers, but in recent years the heat generation of these LSIs has increased, the size of the mounted chips has also increased, and the number of terminals has also increased. There is a tendency for the number of pins to increase from about 100 pins to several hundred pins.

[0006] Furthermore, with the advent of smart ICs, increasing the power of ICs is attracting attention, and heat dissipation from elements will become an increasingly important issue in the future.

[0007] Because of this trend, there has been a need for chip carriers to improve heat dissipation and to reduce thermal stress on elements due to increased number of terminals and increased chip size.

[0008]

[Problems to be Solved by the Invention] As described above, in conventional chip carriers, the base is made of resin, and a resin stopper ring is required to prevent the resin from flowing, and the height of the sealing part is also high. Therefore, there was a problem that the heat dissipation property was poor and it could not be used for mounting elements that generate a large amount of heat. Furthermore, even when the amount of heat generated is small, the element temperature increases, causing a decrease in reliability.

[0009] Furthermore, since there is a large difference in coefficient of thermal expansion between the resin and the semiconductor element, there is a problem in that a large thermal stress is applied to the element, reducing reliability.

Furthermore, there is a problem in that the mounting structure has a large thickness and is difficult to reduce in thickness.

[0011] Furthermore, since the base body is made of resin, there is a problem in that it does not have sufficient mechanical strength.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device that is small in size, has good heat dissipation properties, and is highly reliable.

[0013]

[Means for Solving the Problems] Accordingly, in the present invention, metal is embedded in the base of the chip carrier, and the chip is fixed on the surface of the metal.

[0014]

[Function] According to the above structure, since metal is embedded in the base of the chip carrier, heat dissipation is good and it can be used for mounting elements that generate a large amount of heat. There is no rise in temperature.

Furthermore, since the contact portion with the semiconductor element is made of metal, the difference in thermal expansion can be kept small, and no large thermal stress is applied to the element.

Furthermore, the thickness of the mounting structure can be reduced.

Furthermore, since the metal is embedded in the resin constituting the base, the mechanical strength is sufficiently high.

[0018]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

Embodiment 1 FIG. 1 is a sectional view showing a semiconductor device according to a first embodiment of the present invention.

[0020] In this semiconductor device, the chip carrier is
It is composed of a base body in which an epoxy resin 9 is fixed around a copper plate 8 having a recess formed on its surface.A wiring pattern 2 is formed on the surface of this epoxy resin 9, and an electrode 3 is formed on the peripheral edge. It is characterized by the fact that it is formed.

A semiconductor element chip 4 is mounted in the recess of this chip carrier, electrical connection between the semiconductor element chip 4 and the wiring pattern 2 is achieved by wires 5, and the semiconductor element chip 4 is sealed with a resin 6.

According to this semiconductor device, the heat generated in the semiconductor element chip 4 is immediately radiated to the copper plate 8, as shown in FIG. Furthermore, the coefficient of thermal expansion of the copper plate 8 in contact with the semiconductor element chip 4 is significantly smaller than that of conventional epoxy resin, and the thermal stress applied to the semiconductor element is also extremely small.

Furthermore, since the semiconductor element is disposed within the recess of the copper plate, the height of the sealing structure using the sealing resin can be reduced. Further, the conventional step of forming a resin retaining ring is not necessary, the number of parts and the number of work steps can be reduced, and the amount of resin can also be reduced.

In addition, in conventional chip carriers, it was necessary to make electrical connections to external circuits from side electrodes provided on the resin, but since the back side of the semiconductor element chip is bonded to the copper plate, Electrical connection is possible from the back side.

Furthermore, since the base is made of a composite material of metal and resin, it is resistant to mechanical stress due to vibration and warping.

Next, the manufacturing process of this chip carrier will be explained with reference to FIG.

This figure shows the structure of only the electrode portion of the chip carrier. For comparison, a manufacturing process diagram of the conventional chip carrier shown in FIG. 8 is shown on the right.

First, a hole is made in a region of the copper plate 8 that will later become an electrode, and a resin is injected into the hole to form a base (step 101).

Next, the wiring layer 2 made of an aluminum layer is bonded via an insulating adhesive layer (step 102).
.

A resist pattern is formed by photolithography, and the aluminum layer 2 is patterned using this as a mask (step 103).

Furthermore, a second resist pattern is formed, and using this as a mask, the substrate is etched to form through holes h (step 104).

After that, plating is performed on the through hole h (
Step 105).

[0033]Finally, it is divided into individual parts to obtain chip carrier substrates (step 106).

For comparison, a process diagram for obtaining a corresponding conventional chip carrier substrate is shown on the right.

Further, FIG. 4 shows an example of a mounting configuration when this semiconductor device is mounted on a board.

This semiconductor device is bonded to circuit wiring 11 formed on the surface of main circuit board 10 via solder 14, as shown in FIG. 12 is a chip component such as a chip resistor, and 13 is a surface mount component.

Embodiment 2 FIG. 5 is a diagram showing a semiconductor device according to a second embodiment of the present invention.

In the above embodiment, a recess was formed on the surface of the copper plate 8 constituting the base, but in this example, the surface is made into a flat plate. The semiconductor chip 4 is fixed to the surface of a copper plate 8 via an insulating layer 15, and a resin stop ring 7 for preventing flow is formed, and the inside of this ring is filled with resin 6. The other parts are formed in the same manner as in the previous embodiment.

As shown in FIG. 6, the effect of this semiconductor device is similar to that of the first embodiment, in that heat dissipation and thermal stress can be reduced.

Furthermore, since the insulating layer 15 is interposed between the copper plate 8 and the semiconductor chip 4, a capacitor can be formed between the back electrode of the semiconductor chip and the copper plate. Further, it can also be formed between the wiring pattern 2 and the copper plate.

Further, by arbitrarily selecting the material and thickness of the insulating layer 15, the back electrode of the semiconductor element chip, the size of the wiring 2, etc., it is possible to freely select the capacitance.

Furthermore, the thickness of the insulating layer 15 can be up to several tens of μm. In addition, high dielectric materials (Ta2O5, BaTiO3, T
By using a material mixed with iO2, etc., the capacity can be easily adjusted.

Further, the capacitor formed under the back electrode of the semiconductor element chip 4 can be used as a bypass capacitor inserted between the power supply and GND.

Furthermore, since the copper plate 8 can be formed from the base of the semiconductor element chip 4 to below the wire-bonded wiring 2, it is effective as a countermeasure against radio wave interference.

Further, FIG. 7 shows an overall perspective view of the chip carrier of this embodiment.

A resin 9 is formed around the end of the chip carrier, and electrodes 3 are provided on the side surfaces. A copper plate 8 is buried directly under the semiconductor element chip and a part of the wiring 2, and as described above, a capacitor is formed by the insulating layer 15 directly under the semiconductor element (note that here (The sealing resin and resin retaining ring were omitted.)

Although a copper plate was used as the metal plate in Examples 1 and 2, it is not limited to this and can be selected as appropriate, and metals such as 42 alloy and Mo may also be used in addition to copper. good. In addition, ceramics (AlN,
It is also possible to use materials other than metals, such as Al2O3).

[0048]

[Effects of the Invention] As explained above, according to the present invention, metal is embedded in the chip carrier base and the chip is fixed on the metal surface, so heat dissipation is good and the device has a large A semiconductor device with high mechanical strength can be provided without applying thermal stress.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a semiconductor device according to a first embodiment of the present invention.

[
Figure 2: Explanatory diagram showing the operation of the semiconductor device

[Figure 3] Manufacturing process diagram of the semiconductor device

[Figure 4] Diagram showing the mounting configuration of the semiconductor device

FIG. 5 is a diagram showing a semiconductor device according to a second embodiment of the present invention.

[Fig. 6] Explanatory diagram showing the operation of the semiconductor device

[Fig. 7] A diagram showing a chip carrier used in the semiconductor device.

[Fig. 8] Diagram showing a conventional semiconductor device

[Explanation of symbols]

1 Chip carrier base 2 Wiring 3 Electrode 4 Semiconductor element chip 5 Wire 6 Sealing resin 7 Resin retaining ring 8 Copper plate 9 Epoxy resin 10 Main circuit board 11 Circuit wiring 12 Chip parts 13　Surface mount parts 14 Solder 15 Insulating film

Claims (1)

[Claims] 1. An insulating substrate having a wiring pattern formed on its surface and embedded with metal, and a semiconductor element fixed to the metal surface of the insulating substrate, wherein the semiconductor element and the wiring A semiconductor device characterized in that it is connected to a pattern via a bonding wire.