JPH04271173A - Optical semiconductor device - Google Patents

Abstract

PURPOSE:To easily incorporate a reflection preventive film of a photodiode in a bipolar IC. CONSTITUTION:First and second epitaxial layers 25, 26 are separated to form a plurality of island regions 28, 29, 30. A photodiode 21 is formed on the region 28, and the surface is covered with a reflection preventive film 36 made of a silicon nitride film. A capacitance element 22 made of a thin dielectric film 28 formed by a common process with that of the film 36 is formed on the region 28. An N-P-N transistor 23 is formed on the region 30.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device that integrates a photodiode and a bipolar IC.

0002

[Prior Art] Optical semiconductor devices in which a light-receiving element and peripheral circuitry are integrated and formed monolithically are expected to reduce costs, unlike hybrid ICs in which the light-receiving element and circuit elements are made separately. , which has the advantage of being resistant to noise caused by external electromagnetic fields.

A conventional structure of such an optical semiconductor device is known, for example, as described in Japanese Unexamined Patent Publication No. 1-205564. This is shown in FIG. In the same figure,
(1) is a P-type semiconductor substrate, (2) is a P-type epitaxial layer, (3) is an N-type epitaxial layer, and (4) is a P-type semiconductor substrate.
+ type isolation region, (5) is N+ type diffusion region, (6) is N+ type
Type buried layer, (7) is P type base region, (8) is N+
type emitter region. The photodiode (9) is formed by a PN junction between a P-type epitaxial layer (2) and an N-type epitaxial layer (3), with the N+ type diffusion region (5) taken out as a cathode and the isolation region (4) taken out as an anode. It is. The NPN transistor (10) has a buried layer (6) provided at the boundary between a P-type epitaxial layer (2) and an N-type epitaxial layer (3), and uses the N-type epitaxial layer (3) as a collector. An accelerating electric field is formed by the autodoped layer (11) from the substrate (1) to facilitate the movement of carriers generated in a region deeper than the depletion layer.

Such a device is passivated so that light selectively hits only the photodiode (9) portion, and is molded with a resin that allows the wavelength of the optical signal to pass through.

[0005]

However, a considerable amount of the light passing through the package is reflected on the silicon surface of the epitaxial layer, so there is a drawback that it cannot contribute to photocurrent. The amount of reflection largely depends on the thickness and material of the film covering the silicon surface. For example, if a silicon surface is covered with a silicon oxide film and that surface is sealed with an epoxy resin that has the same refractive index as the silicon oxide film, the amount of reflection on the silicon surface can be calculated using the following equation since there is no need to take into account light interference. can be expressed.

[0006]

[Math 1]

That is, 16.4% of the light becomes ineffective. As a means for reducing such reflection, there is a means for preventing reflection by attaching materials having different refractive indexes to the silicon surface. However, since a photodiode is incorporated into the IC, it is difficult to take the above-mentioned anti-reflection measures.
This had the disadvantage of complicating the process.

[0008]

[Means for Solving the Problems] The present invention has been made for the purpose of efficiently incorporating the above-mentioned antireflection means into an IC.
Multiple island regions (28) (29) (3) formed by separating
0), a diffusion region (34) formed on the surface of the first island region (28) and serving as an electrode extraction region of one of the photodiodes (21), and an antireflection film attached to cover the diffusion region (34). (36), the lower electrode region (37) of the capacitive element (22) formed in the second island region (29), and the dielectric thin film (37) of the capacitive element (22) formed simultaneously with the antireflection film (36). 38) and the upper electrode (39) of the capacitive element (22).
) and an NPN transistor (23) formed in the third island region (30), the above object is achieved.

[0009]

[Function] According to the present invention, the antireflection film (36) of the photodiode (21) and the dielectric thin film (3) of the capacitive element (22)
8), the anti-reflection coating of the photodiode (21) can be inserted into the bipolar IC without any additional process.
36) can be built-in.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a cross-sectional view of an IC incorporating a photodiode (21), a capacitor (22), and an NPN transistor (23). In the same figure, (2
4) is a P-type single-crystal silicon semiconductor substrate, (25) is a first epitaxial layer with a thickness of 15 to 20 μm laminated on the substrate (24) in a non-doped manner by vapor phase growth, (26)
is a second epitaxial layer doped with phosphorus (P) and laminated on the first epitaxial layer (25) with a thickness of 4 to 6 μm by vapor phase growth. The substrate (24) has an impurity concentration of 40 to 60Ω・c, which is lower than that of a general bipolar IC.
The first epitaxial layer (2
5) is 10 when laminated by laminating without doping.
It has a specific resistance of 200 to 1,500 Ω·cm when completed after being subjected to heat treatment to form a diffusion region. The second epitaxial layer (26) is composed of phosphorus (
By doping about 1015 to 1016 cm-3 of P), it has a specific resistance of 0.5 to 3.0 Ω·cm.

[0011] The first and second epitaxial layers (25) (
26) is a P+ type isolation region (27) that completely penetrates both.
), a first island region (28) forming a photodiode (21), a second island region (29) forming a capacitive element (22), and a third island region forming an NPN transistor (23). (30) and are electrically separated. This isolation region (27) includes a first isolation region (31) that is diffused in the vertical direction from the surface of the substrate (24), and a first isolation region (31) that is diffused in the vertical direction from the boundary between the first and second epitaxial layers (25) and (26). a second isolation region (32) formed from the surface of the second epitaxial layer (26) and a third isolation region (33) formed from the surface of the second epitaxial layer (26)
The three layers are connected to separate the first and second epitaxial layers (25) and (26) into islands.

On the surface of the second epitaxial layer (26) of the photodiode (21) section, the photodiode (21)
An N+ type diffusion region (34) from which the cathode is taken out is formed. By expanding the N+ type diffusion region (34) to substantially the entire surface of the first island region, the cathode lead-out series resistance can be reduced. The oxide film (35) on the N+ type diffusion region (34) is partially opened, and an antireflection film (36) is formed in direct contact with the silicon surface so as to cover this opening. The antireflection film (36) is made of a silicon nitride film (SiN) with a thickness of 800 to 1000 Å.

[0013] On the surface of the second island region (29) forming the capacitive element (22), an N+ type lower electrode region (37) which becomes one electrode of the capacitive element (22) is formed. The oxide film (35) is removed from the surface of the lower electrode region (37), and the dielectric thin film (3) of the capacitive element (22) is formed to cover the surface.
8). The dielectric thin film (38) is formed in the same process as the antireflection film (36) of the photodiode (21), and has the same material and film thickness. An upper electrode (39) made of Al is formed on the dielectric thin film (38) so as to face the lower electrode region (37). Note that (40) is an N+ type buried layer buried in the boundary between the first and second epitaxial layers (25) and (26).

At the boundary between the first and second epitaxial layers (25) and (26) of the NPN transistor (23),
An N+ type buried layer (41) is embedded. Second epitaxial layer (26) above buried layer (41)
A P-type base region (42), an N+-type emitter region (43), and an N+-type collector contact region (44) of the NPN transistor (23) are formed on the surface.

Anti-reflection coating (3) of photodiode (21)
6) and the dielectric thin film (38) of the capacitive element (22) are again covered with a silicon oxide film (45), and these oxide films (38)
5) An electrode wiring (46) made of 1stAl contacts each diffusion region through a contact hole passing through (45). The upper electrode (39) of the capacitive element (22) is made of the 1st Al. Photodiode (21
), a cathode electrode (not shown) is provided on the surface of the separation region (27), and a cathode electrode (not shown) is provided on the part of the N+ type diffusion region (34) from which the antireflection film (36) is removed. will be placed.

The 1st Al is covered with an interlayer insulating film (47) made of a polyimide insulating film, and the 2nd Al
The layer is covered by a polyimide jacket coat (48). The interlayer dielectric (47) and jacket coat (48) on the photodiode (21) are removed for light incidence. Each element is electrically connected by 1stAl and 2ndAl, and the photodiode (21) connects the optical signal input section to the NPN
The transistor (23) constitutes a signal processing circuit together with other elements. Then, the entire structure is molded with an epoxy resin having the same refractive index as the silicon oxide film (45).

Next, the function of the photodiode (21) will be explained. The photodiode (21) has +5 on the cathode electrode.
The device is operated in a reverse bias state where a VCC potential such as V is applied to the anode electrode and a GND potential is applied. When such a reverse bias is applied, the first and second photodiodes (21)
The depletion layer spreads from the boundary between the epitaxial layers (25) and (26), and since the first epitaxial layer (25) is a high resistivity layer, the first epitaxial layer (25)
It expands greatly inside. The depletion layer easily expands until it reaches the substrate (24), making it possible to obtain an extremely thick depletion layer with a thickness of 20 to 25 μm. Therefore, the photodiode (2
1) Reduces junction capacitance and enables high-speed response.

Also in the present invention, the impurity (boron) in the substrate (24) is diffused into the first epitaxial layer (25) by heat treatment of each diffusion region to form a P-type autodoped layer. However, since the impurity concentration is superimposed on the non-doped layer, the impurity concentration does not become so high, and the substrate (
If a material with a relatively low impurity concentration of 40 to 60 Ω·cm is used as 24), this effect will be doubled. Therefore, the autodoped layer due to thermal diffusion does not inhibit the expansion of the depletion layer, and in this respect as well, a thick depletion layer can be obtained.

Furthermore, a first epitaxial layer (25)
When laminated in a non-doped manner, the epitaxial layer is deposited on the substrate (24) and the first isolation region (24) during the epitaxial growth process.
If boron (B) scattered from 31) recombines with silicon atoms and is deposited, or if unexpected impurities (mainly boron) enter from the outside, the layer can become a P-type layer that is very close to the intrinsic layer. However, since N-type inversion is unlikely, by forming the N-type second epitaxial layer (26), a P layer suitable for forming a depletion layer is formed.
An IN junction or a PN junction can be easily formed.

Furthermore, since a depletion layer thicker than the first epitaxial layer (25) is obtained, the absorption efficiency of incident light is high, and the carriers generated in the deep part of the photodiode (21) (outside the depletion layer) are correspondingly high. The ratio of generated carriers is also reduced, and the speed of the photodiode (21) can be increased. Moreover, since carriers generated by light incidence reach the anode electrode via the low-resistance separation region (27) on the anode side, the series resistance of the photodiode (21) can be reduced. Since the cathode side is recovered by the N+ type diffusion region (34) formed so as to cover the entire surface, the series resistance can be reduced.

Next, the antireflection film (36) of the photodiode (21) will be explained. In the above embodiment, the surface of the photodiode (21) is covered with an antireflection film (36),
It is then covered with a silicon oxide film (45) and an epoxy resin having the same refractive index. Since the anti-reflection film (36) has a thickness that causes interference with the wavelength of light,
The formula for calculating the amount of reflected light R is as shown in formula (2). However, n
0=refractive index of silicon oxide film (=1.42), n1=refractive index of silicon nitride film (=2.0), and n2=refractive index of silicon (=3.42).

[0022]

[Math 2]

In equation (2), if light with a wavelength λ = 850 nm is incident perpendicularly, when the thickness of the antireflection film (36) is 450 Å, the amount of reflected light R = 11%, and when the thickness of the antireflection film (36) is 900 Å, the amount of reflected light R = It becomes 2.2%. Therefore, the antireflection film (3
By setting the film thickness of 6) to around 900 Å, the amount of reflected light can be reduced and the photocurrent conversion efficiency of the photodiode (21) can be improved.

On the other hand, in the capacitive element (22) that shares the same material as the anti-reflection film (36), the dielectric thin film (38) can be made of a silicon nitride film with a thickness of about 900 Å, so that the breakdown voltage and capacitance density can be improved. A well-balanced capacitive element (22) can be obtained. The structure of FIG. 1 can be achieved by the following manufacturing method. First, the surface of the P-type substrate (24) is thermally oxidized to form an oxide film, and the oxide film is photoetched to serve as a selection mask. Then, on the surface of the substrate (24) there is a separation region (
Boron (B) forming the first isolation region (31) of
) (Figure 3).

Next, after removing all the oxide film used as a selective mask, the substrate (24) is placed on a susceptor of an epitaxial growth apparatus, and the substrate (24) is heated by lamp heating.
) is heated to a high temperature of approximately 1140°C, and S is added to the reaction tube.
By introducing iH2Cl2 gas and H2 gas, the non-doped first epitaxial layer (25) is
Grow 0μ. When grown in this way without doping,
When all processes are completed, a high resistivity layer of 200 to 1500 Ω·cm can be formed (FIG. 4).

Next, the surface of the first epitaxial layer (25) is thermally oxidized to form a selective mask, and the N+ type buried layer (41) of the NPN transistor (23) and the capacitive element (2
Antimony forming the N+ type buried layer (40) of 2) is diffused (FIG. 5). With this heat treatment, the first separation region (3
1) is also slightly diffused. The selection mask is then changed and boron (B) forming the second isolation region (32) of the isolation region (27) is diffused. Then, the entire substrate (24) is subjected to heat treatment while an oxide film is being formed, and the first and second isolation regions (31) and (32) are connected by diffusion. In this step, the first separation region (31) is 8 to 10μ,
The second isolation region (32) is diffused by 6-8μ (Fig. 6)
. After that, the oxide film is removed and the first epitaxial layer (
A second phosphorus-doped epitaxial layer (26) having a thickness of 4 to 6 μm is formed on the layer 25).

Next, the surface of the second epitaxial layer (26) is thermally oxidized to form a selective mask, and the isolation region (27) is
Boron (B) forming the third isolation region (33) is diffused and heat treated to form the second and third isolation region (32) (
33). In this step, the second separation region (32)
is 4 to 5 μ in the upward direction, and the third separation region (33) is 1 to 3
μ diffused. Base diffusion is then performed to form the base region (42) of the NPN transistor (23) in the third island region (30) (FIG. 6). Note that the third isolation region (33) of the isolation region (27) and the base region (42) may be formed simultaneously.

Next, emitter diffusion is performed to form the emitter region (43) and collector contact region (44) of the NPN transistor (23) in the third island region (30), and the second
The lower electrode region (29) of the capacitive element (22) is located in the island region (29) of
37) and a photodiode (2) in the first island region (28).
1) N+ type diffusion region (34) is formed (FIG. 7).
Next, the N+ type diffusion region (34) and the lower electrode region (37)
The upper oxide film (35) is removed, a silicon nitride film (SixNy) of the above thickness is deposited by the CVD method, and photoetched to form the antireflection film (36) of the photodiode (21) and the capacitive element (22). A dielectric thin film (38) is formed (FIG. 8).

After that, 1 is formed by forming an oxide film (45), forming contact holes, depositing Al, and photoetching
Formation of stAl electrode (46), formation of interlayer insulating film (47) and 2ndAl electrode, and passivation film (
48) results in the structure shown in FIG. The structure of the photodiode (21) portion of the present invention is not limited to the above embodiment. For example, with a single layer epitaxial structure, N+
Instead of the type diffusion region (34), a P-type region may be formed by base diffusion.

[0030]

[Effects of the Invention] As explained above, according to the present invention, by forming the antireflection film (36) on the photodiode (21), the amount of reflected light can be reduced, so the advantage is that the light-to-current conversion efficiency can be maximized. has. Furthermore, the anti-reflection film (36) of the photodiode (21) is coated with the capacitive element (22).
) is formed at the same time as the dielectric thin film (38), which has the advantage of being able to share the process and reducing costs.

Furthermore, by using the non-doped first epitaxial layer (25) as in the above embodiment, the depletion layer can be extended extremely thickly in the first epitaxial layer (25). Therefore, it is possible to reduce the junction capacitance, improve the light absorption rate, and suppress the generation of carriers generated outside the depletion layer.
21).

Furthermore, a high concentration low resistance isolation region (27)
Since the contact area reaches the substrate (24), the series resistance of the photodiode (21) can be significantly reduced, and the isolation region (27) completely separates the photodiode (21) from the NPN transistor (23), etc. This has the advantage of preventing parasitic effects and the like. Furthermore, by stacking the layers without doping, there is no need to control the impurity concentration.
In addition to having the advantage of easily obtaining a high resistivity layer, it also has the advantage of not contaminating the epitaxial growth device with a large amount of boron (B), making it easy to maintain the device, and allowing the line to be shared with other models. .

Furthermore, since the thick first epitaxial layer (25) is separated by the first and second isolation regions (31) and (32), the second isolation region (32) can be made shallower. However, lateral diffusion can also be reduced. Therefore, the breakdown voltage between the second isolation region (32) and the N+ type buried layer (41) can be increased, which has the advantage of contributing to miniaturization of the NPN transistor (23).

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view for explaining an optical semiconductor device of the present invention.

FIG. 2 is a first drawing illustrating the manufacturing method of FIG. 1;

FIG. 3 is a second drawing illustrating the manufacturing method of FIG. 1;

FIG. 4 is a third drawing illustrating the manufacturing method of FIG. 1;

FIG. 5 is a fourth drawing illustrating the manufacturing method of FIG. 1;

FIG. 6 is a fifth drawing illustrating the manufacturing method of FIG. 1;

7 is a sixth drawing illustrating the manufacturing method of FIG. 1. FIG.

8 is a seventh drawing illustrating the manufacturing method of FIG. 1. FIG.

FIG. 9 is a sectional view showing a conventional example.

Claims (8)

[Claims] 1. A semiconductor substrate of one conductivity type, an epitaxial layer formed on a surface of the semiconductor substrate, an isolation region of one conductivity type in which the epitaxial layer is formed into a plurality of island regions, and a first island region. A diffusion region formed on the surface of the epitaxial layer to serve as one extraction region of the photodiode, an antireflection film covering the surface of the epitaxial layer in the region where the photodiode is formed, and a capacitive element formed on the surface of the epitaxial layer in the second island region. a lower electrode area of
a dielectric thin film made of the same material as the antireflection film of the photodiode and covering the surface of the lower electrode region; an upper electrode of a capacitive element formed on the dielectric thin film so as to face the lower electrode; 1. An optical semiconductor device comprising: a base region of one conductivity type formed on the surface of an epitaxial layer of an island region; and an emitter region of opposite conductivity type formed on the surface of the base region. 2. The optical semiconductor device according to claim 1, wherein the antireflection film is a silicon nitride film. 3. The optical semiconductor device according to claim 1, wherein the high concentration diffusion region of the photodiode and the lower electrode region of the capacitive element are formed at the same time as the formation of the emitter region. Claim 4: The optical signal has a wavelength λ=850 to 900 nm.
2. The optical semiconductor device according to claim 1, wherein the infrared light is the infrared light. 5. A semiconductor substrate of one conductivity type, a first epitaxial layer of high specific resistance laminated on the surface of the semiconductor substrate, and a second epitaxial layer of the opposite conductivity type laminated on the surface of the first epitaxial layer. an epitaxial layer, an isolation region of one conductivity type penetrating the first and second epitaxial layers to form a plurality of island regions, and taking out a photodiode formed on the surface of the second epitaxial layer of the first island region. an anti-reflection film covering the surface of the first epitaxial layer in the region where the photodiode is formed;
a lower electrode region of the capacitive element formed on the surface of the second epitaxial layer of the second island region; a dielectric thin film made of the same material as the antireflection film of the photodiode covering the surface of the lower electrode region; an upper electrode of a capacitive element formed on the dielectric thin film so as to face the electrode, and a third
An optical semiconductor device comprising: a base region of one conductivity type formed on the surface of a second epitaxial layer of an island region; and an emitter region of opposite conductivity type formed on the surface of the base region. 6. The semiconductor substrate has a specific resistance of 40 to 60.
5. The optical semiconductor device according to claim 4, wherein the resistance is Ω·cm. 7. The optical semiconductor device according to claim 4, wherein the first epitaxial layer has a specific resistance of 200 to 1500 Ω·cm. 8. Claim 5, wherein the first epitaxial layer is laminated without doping.
Optical semiconductor device as described in section.