JPH04268284A - Memory card - Google Patents

Abstract

PURPOSE:To make a low speed EEPROM applicable to real time for a high speed image recording medium by writing an image information read out from a camera at high speed into the plural EEPROMs in parallel. CONSTITUTION:When a master controller 30 is connected with the camera, the EEPROMs 21-2n at the recorded position are erased at a cluster unit by an instruction from the camera. When a photographing is started, a time sequence of the image information from the camera is time-divided to the specified amount by the controller 30 and repeatedly outputted to block controllers 51-5n in order. Those are distributed to each buffer memory 41-4n by the controllers 51-, and the informations are written by the memories 41- then read out at low writing speed of the EEPROM in order of FIFO. The informations read out by the memories 41- are written into each cluster of the EEPROMs 21- at time division by the controllers 51-.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card having an EEPROM as a storage area.

0002

[Prior Art] A conventional memory card used as a storage medium for image data in an electronic still camera has a storage area of S
It was RAM. SRAM requires a backup power supply circuit and has the disadvantage of being expensive per bit. In recent years, memory cards with EEPROM storage areas that do not require battery backup and can be electrically erased in blocks have been put into practical use, and some with a capacity of 1 Mbit have also appeared, and are used in place of SRAM memory cards. I can think of that.

0003

[Problem to be solved by the invention] However, the current EEP
ROM has a problem in that it is slow and takes time to access. In cameras using this EEPROM, in order to enable continuous shooting, it is necessary to provide a buffer memory on the camera side to temporarily store image information, and the larger the number of continuous shots, the larger the capacity of the buffer memory becomes. There is a drawback.

SUMMARY OF THE INVENTION It is an object of the present invention to overcome the drawbacks of the prior art and to provide a memory card that allows continuous shooting without providing a buffer memory on the camera side.

[0005]

[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention provides a memory card having an EEPROM as a storage area, in which the storage area is divided into a plurality of groups, and the card has a plurality of memory cells corresponding to the plurality of groups. group control means and buffer storage means, and main control means for controlling a plurality of groups,
The main control means time-divides the serially input information into a plurality of groups and passes the information from the group control means corresponding to the groups to the buffer storage means, and the buffer storage means temporarily stores the input information and writes it into the EEPROM. The group control means writes this output to the storage area of the corresponding group in the EEPROM.

[0006]

[Operation] According to the present invention, in a memory card, EE
The storage area of the PROM is divided into a plurality of groups, and a plurality of groups of block control means and buffer storage means are provided. The main control means for controlling the groups time-divides input information from the outside into a plurality of groups and passes the time-divided information from the block control means to the buffer storage means. The buffer storage means outputs this information at low speed, and the block control means writes it into the group-compatible EEPROM.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of a memory card according to the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a schematic block diagram of a memory card showing an embodiment. In the configuration of the memory card of this embodiment, the memory card 10 is attached to a camera (not shown) and records image information taken in units of frames and associated data thereof. The memory card 10 has an EEPROM storage area divided into a plurality of areas, and performs pipeline-based parallel writing to these areas to speed up the slow writing of the EEPROM. The master controller 30 is an EEPROM 21
, 22 . connected to the camera control unit.

The EEPROMs 21, 22...2n are unit storage areas, that is, clusters 1, 2...n, (n+
1), (n+2)...2n... Each cluster is selected in this order, and a predetermined amount of image information, for example, in units of bytes or units of cluster, is written. The buffer memories 41, 42...4n are
EEPROM has a predetermined capacity as described above, writes information at the output speed of the camera, and stores stored information in EEPR.
It is a single-port memory or a dual-port memory that can be read at OM write speed. Single-port memories read after writing, and dual-port memories write and read simultaneously.

Since writing is performed on the EEPROM after erasing existing records, when the master controller 30 is connected to a camera, the master controller 30 erases the EEPROM at the recorded location in units of clusters based on instructions from the camera. When photographing is started, the master controller 30 time-divides the time series of image information input from the camera via the interface 32 into a predetermined amount, and sends the block controller 51 to the block controller 51, for example, in units of bytes or in units of clusters. 52・
...Repeat outputting to 5n in order. The block controllers 51, 52...5n allocate this to the respective buffer memories 41, 42...4n.

The buffer memories 41, 42...4n are
Input image information is written at the read speed of the camera, and the information is read out in FIFO order at the slow write speed of the EEPROM. block controller 5
1, 52...5n are respective buffer memories 41
, 42, . . . , 4n to be read out are written to the EEPROM at low speed. A predetermined amount of image information is written into each cluster of the EEPROMs 21, 22, . . . 2n in a time-sharing manner.

FIGS. 2 and 3 show operation diagrams when the buffer memories 41, 42, . . . , 4n (hereinafter referred to as buffers) are dual port memories and single port memories.
Shown below. In FIG. 2, the master controller 30 uses the block controllers 51, 5 in write cycles W1, W2, .
2...5n in this numerical order cyclically. Each block controller 51, 52...5n transfers image information to a dual port memory buffer 41, 42...
Output to 4n. The buffer 41 has a write cycle W1.
The image information to be input is written and stored, and the stored information is read out in the order of input during the write cycles W1 to Wn, and the read information is written to the cluster 1 of the EEPROM 21 via the block controller 51. The buffer 42 reads the image information written in the write cycle W2 in the write cycles W2 to W1, and the read information is sent to the EE via the block controller 52.
Written to cluster 2 of PROM 21. Thereafter, writing is performed in the same manner up to cluster n of EEPROM 2n. Next, clusters (n+1) to 2n are written.

In FIG. 3, the operations of the master controller 30 and block controllers 51, 52, . The buffer 41 writes image information input in the write cycle W1, and reads out this information in the next write cycles W2 to Wn. The buffer 42 writes image information input in write cycle W2, and then writes this information in write cycles W3 to Wn.
Read to +1. Writing and reading are performed serially, and image information is recorded in the EEPROMs 21 to 2n.

The image is reproduced by selecting one frame of the image recorded in the EEPROM and reading it out in the same order as the writing.

[0014]

As described above, according to the present invention, by writing image information read out from a camera at high speed into a plurality of EEPROMs in parallel, a low speed EEPROM can be used as a high speed image recording medium in real time. EE
PROM can be used in computers and the like as a high-speed recording medium.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing an embodiment of a memory card of the present invention.

FIG. 2 is an operational diagram of an embodiment in which the buffer memory is a dual port memory.

FIG. 3 is an operational diagram of an embodiment in which the buffer memory is a single-port memory.

[Explanation of symbols]

10 Memory card 21~2n EEPROM 30 Master controller 41~4n Buffer memory 51~5n block controller

Claims (2)

[Claims] 1. A memory card having an EEPROM as a storage area, wherein the storage area is divided into a plurality of groups, and the memory card includes a plurality of group control means and a buffer storage means corresponding to the plurality of groups, and a plurality of group control means and buffer storage means corresponding to the plurality of groups. The main control means time-divides the serially input information into the plurality of groups and passes the information from the group control means corresponding to the groups to the buffer storage means, and the buffer storage means . A memory card characterized in that input information is temporarily stored and outputted at the writing speed of the EEPROM, and the group control means writes the output from the buffer storage means to a corresponding group storage area of the EEPROM. 2. The memory card according to claim 1, wherein the buffer storage means is either a single port memory or a dual port memory.