JPH04267530A - Semiconductor device - Google Patents

Abstract

PURPOSE:To offer an ion implantation type high-frequency semiconductor device, which is superior in the linearity of input/output characteristics without being accompanied by a reduction in a gain. CONSTITUTION:A semiconductor device, which has an active region formed on the side of the main surface on one side of the main surfaces of a semiconductor substrate 1 using an ion implantation method, comprises a first semiconductor layer 3, which is turned most of the active region into an operating layer 5, and a second semiconductor layer 2, which is formed in the interior more inside of the substrate 1 than said layer 3 and has the activation rate of an impurity implanted for forming the active region lower than that of the above layer 3.

Description

[Detailed description of the invention]

[Purpose of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having an active layer formed by ion implantation.

0002

BACKGROUND OF THE INVENTION In the current situation where society is becoming increasingly information-oriented, digital communication systems using high frequencies of more than 10 GHz have been put into practical use as a means of transmitting large amounts of information. Furthermore, in order to make this high-frequency communication system more compact and highly reliable, efforts are being made to solidify the system. The high-frequency semiconductor devices used to solidify this system are mainly metal-based materials made of gallium arsenide.
A semiconductor contact field effect transistor (hereinafter abbreviated as MESFET) is used.

[0003] In the above digital communication system, importance is placed on linearity in the input/output characteristics of the high frequency semiconductor device. This is because, in the digital communication system, distortion of the output wave generates a third harmonic component close to the signal frequency, making detection of the signal wave extremely difficult. To reduce the distortion of the output waveform, for example, StewartM Per
low, “Basic Facts about
Distortion and Gain S
APPLIED MICRO
WAVE, May 1989, pp. 107-117
It is most important that the mutual conductance (gm) of a high frequency semiconductor device is constant regardless of the gate applied voltage, as exemplified in . In particular, a decrease in mutual conductance (gm) near pinch-off causes a decrease in linearity in the input/output characteristics when the input power of the high-frequency semiconductor device is lower. In order to prevent the decrease in mutual conductance (gm) near this pinch-off, it is necessary to increase the carrier concentration near the interface between the active layer and the buffer layer, and to make the carrier concentration near the active layer-buffer layer interface as step-like as possible. What is important is how to make a sudden change.

Ion-implanted MESFETs, in which an active layer is formed using an ion-implantation method, are attracting attention as high-frequency semiconductor devices because they have excellent uniformity of characteristics within a semiconductor wafer surface and can be manufactured at low prices. However, the carrier concentration distribution in the depth direction of the active layer of this ion-implanted MESFET is determined by the well-known LSS theory (Lindhand).
According to the ion implantation distribution calculation theory by , Scharf, Schiot et al.), it shows an approximately Gaussian distribution, so
It is difficult to form a steep step-like carrier concentration distribution near the active layer-buffer layer interface. Therefore, in order to realize this, an acceptor impurity is implanted below the donor impurity to realize a steep carrier concentration distribution near the interface between the active layer and the buffer layer.
ion technology is used.

FIGS. 3(a) and 3(b) show a conventional co-imp
Ion implantation MESF using lantation technology
A cross-sectional view of the process for forming the active layer of ET is shown in GaAsMES.
The case of FET will be shown as an example. Ion implantation type MESFE
To form the active layer of T, after ion implantation 14 of, for example, Si ions, which will serve as a donor, at an energy of 180 KeV and a dose of 6 x 1012 cm-2, Be ions, which will serve as an acceptor, are implanted at a dose of, for example, 130 KeV, into the semi-insulating GaAs substrate 11.
Inject 14 at 1.2 x 1012 cm-2 (Fig. 3(a)
). Next, heat treatment (annealing) is performed to restore the crystallinity of the GaAs layer destroyed by ion implantation and to activate the implanted ions (FIG. 3(b)). The Si ions implanted by this heat treatment (heating means 16)
As donors within As, Be ions act as acceptors.

FIG. 4 shows a co-implantation
2 shows a carrier concentration distribution in an active layer of an ion implanted MESFET using this technology. Assuming that the implanted Si ions and Be ions are Gaussian distributed according to the LSS theory as shown in the figure, the Si ions are distributed relatively shallowly on the surface side of the GaAs substrate, and the Be ions are distributed relatively deeply. Therefore, in a region where donors and acceptors coexist, they compensate each other, and particularly in a region deeper than around 0.25 μm where the Be concentration exceeds the Si concentration, the carrier concentration rapidly decreases. In this way, a step-like steep carrier concentration distribution can be realized near the active layer-buffer layer interface.

However, in this method, since both donors and acceptors are present in the active layer, the carrier concentration in the active layer is lowered by an amount corresponding to the acceptor concentration compared to when only donors are injected. In high-frequency semiconductor devices, mutual conductance is proportional to the square root of electron concentration, so a decrease in electron concentration leads to a decrease in mutual conductance. Furthermore, since the impurity concentration increases compared to when only donors are implanted, impurity scattering increases and electron mobility decreases. FIG. 5 shows the relationship between the Be ion dose and the electron mobility of the active layer when the Si ion implantation conditions are kept constant. The electron mobility was approximately 4000cm2/V・S at room temperature when only Si ions were implanted, but it decreased to 1.2×1012cm when the Be dose was
It can be seen that at -2, it decreases to about 3000 cm2/V·S, which is 75%. This decrease in electron mobility increases the resistance of the active layer, lowering the mutual conductance,
The increase in source resistance causes a decrease in the gain of the high frequency semiconductor device.

[0008] The conventional co-implantati
If an attempt is made to steepen the electron concentration distribution at the interface between the active layer and the buffer layer using the on method, the drop in electron concentration and mobility will lead to a drop in mutual conductance and an increase in source resistance. This caused a decline in characteristics.

[0009] Even if the dose of Si ions is increased to compensate for the decrease in electron concentration, a decrease in mobility cannot be avoided, and a deterioration in the high frequency characteristics of the semiconductor device due to this is unavoidable.

0010

[Problems to be Solved by the Invention] As described above, in conventional ion-implanted MESFETs, donor impurities and acceptor impurities coexist in the active layer, resulting in a decrease in carrier concentration and mobility, which leads to a decrease in mutual conductance. ,
This causes an increase in source resistance, which in turn causes a decrease in the gain of the high frequency semiconductor device.

The present invention has been made to eliminate the above-mentioned drawbacks, and an object of the present invention is to provide an ion-implanted high-frequency semiconductor device that exhibits excellent linearity of input/output characteristics without decreasing gain.

[Configuration of the invention]

[0013]

[Means for Solving the Problems] A semiconductor device according to the present invention has an active region formed on one main surface side of a semiconductor substrate using an ion implantation method, in which the active region is mainly an active layer. a first semiconductor layer, and a second semiconductor layer, which is formed inside the semiconductor substrate and has a lower activation rate of impurities implanted to form an active region than the first semiconductor layer. It is characterized by including a semiconductor layer.

[0014]

[Function] The semiconductor device of the present invention having the above structure can realize a steep carrier concentration distribution, improve the mutual conductance near pinch-off, and suppress the distortion of the output waveform during high frequency operation, thereby reducing the third harmonic. The generation of waves can be reduced. Furthermore, there is no reduction in carrier concentration or mobility, and high frequency characteristics do not deteriorate. Furthermore, even when a low resistance layer is formed in a region where an ohmic electrode is formed, the short channel effect can be suppressed and the pinch-off characteristics under a high electric field can be improved.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor device according to the present invention will be described below with reference to the drawings. FIGS. 1A and 1B are for explaining a method of forming an active layer of a GaAs MESFET according to an embodiment, and FIGS. 2A and 2B show the carrier concentration distribution.

First, a MOC is placed on a semi-insulating GaAs substrate 1.
An AlGaAs layer 2 is grown to a thickness of 0.1 μm as a second semiconductor layer by a VD method (organic metal chemical vapor deposition method). Subsequently, a GaAs layer 3 was formed with a thickness of 0.2 as the first semiconductor layer.
Grow to 5 μm (Figure 1(a)). S as dona impurity
It is known that the activation rate when i ions are implanted in the AlGaAs layer as the second semiconductor layer is about 80% lower than that in the GaAs layer as the first semiconductor layer.

Next, Si ions 4 are selectively implanted into the region that will become the active layer. The implantation conditions are, for example, an implantation energy of 180 KeV and a dose of 6×10 12 cm −2 . In addition, in the region where the ohmic electrode will be formed, Si ions are selectively implanted with an implantation energy of 180 KeV and a dose of 2 x 1013 cm-2 in order to form a low-resistance layer to reduce ohmic resistance. do. Figure 1
In (b), 5 is an active layer and 6 is an N+ layer (FIG. 1(b)).

The implanted Si ions have a depth of approximately 0.1
A roughly Gaussian distribution is shown in the depth direction with a peak at 5 μm (FIGS. 2(a) and (b)). Next, heat treatment is performed at 900° C. for 5 seconds by rapid thermal annealing to activate the Si ions. As a result, GaAs, AlGaAs
The Si ions inside act as donors, but their activation rate is lower than that of GaA.
The carrier concentration is approximately 70% in GaAs and approximately 14% in AlGaAs, and as a result, the carrier concentration rapidly decreases at the GaAs/AlGaAs interface (FIGS. 2(a) and 2(b)). Since such a steep carrier concentration distribution can be realized, mutual conductance near pinch-off can be improved. Also, in the ohmic electrode formation region, the depth of the low resistance layer is G
This has the advantage that leakage current within the substrate flowing between the N+ layers through the substrate below the active layer can be reduced near the aAs/AlGaAs interface, and pinch-off characteristics under high electric fields can be improved.

Note that the second semiconductor is not limited to AlGaAs, and may be used as long as the activation rate of the implanted impurity is lower than that of the first semiconductor. The same GaAs is used for both semiconductors, and the stoichiometry is changed to GaAs as the second semiconductor.
By making the second semiconductor rich, the activation rate of the implanted impurities in the second semiconductor becomes lower than that in the first semiconductor, and the same effect as in the above embodiment can be obtained.

As described above, the semiconductor device according to the present invention has the following features:
By performing ion implantation and forming in advance a second semiconductor layer that has a lower activation rate than the first semiconductor layer immediately below the first semiconductor layer that will become the active layer, the structure shown in FIG. 2(a) is formed. As shown, the carrier concentration distribution changes rapidly at the interface between the first semiconductor layer and the second semiconductor layer. This prevents the mutual conductance from decreasing near pinch-off,
Since the mutual conductance approaches a constant value regardless of the gate voltage, linearity in the input/output characteristics of the high frequency semiconductor device is improved. Furthermore, since there is no need to implant acceptor impurities, there is no need to worry about deterioration of high frequency characteristics due to a decrease in mobility or a decrease in concentration.

Furthermore, even when forming a low resistance layer (N+ layer), which is often used to reduce ohmic resistance, the carrier concentration can be sharply reduced at the interface between the first semiconductor layer and the second semiconductor layer (Fig. 2(b)) It is possible to reduce the leakage current in the substrate flowing between the N+ layers through the substrate under the active layer, to improve the pinch-off characteristics under a high electric field, and to reduce the so-called short channel effect.

[0022]

[Effects of the Invention] As described above, according to the present invention, a steep carrier concentration distribution can be realized, mutual conductance near pinch-off is improved, and distortion of the output waveform during high frequency operation can be suppressed. Generation of harmonics can be reduced. Furthermore, since there is no need to inject acceptor impurities into the active layer, there is no reduction in carrier concentration or mobility, and there is no fear of deterioration in high frequency characteristics. Furthermore, even when forming a low resistance layer in a region where an ohmic electrode is formed to reduce ohmic resistance, the short channel effect can be suppressed.
Pinch-off characteristics under high electric fields can be improved.

Note that even if the thickness of the epitaxially grown layer of the first semiconductor layer becomes non-uniform within the wafer surface, the second semiconductor layer of the first semiconductor layer can be implanted deeply during ion implantation of the donor impurity. The carrier concentration distribution near the interface with the semiconductor can be kept uniform, and it is possible to obtain an element semiconductor device with superior uniformity of the carrier concentration distribution within the wafer surface compared to simply using an epitaxially grown layer doped with donor impurities. .

[Brief explanation of the drawing]

FIGS. 1A and 1B are cross-sectional views for explaining a manufacturing method of a semiconductor device according to the present invention.

FIGS. 2(a) and 2(b) are diagrams showing carrier concentration distributions in an active layer and an N+ layer of a semiconductor device according to the present invention.

FIGS. 3A and 3B are cross-sectional views showing each step of a conventional semiconductor device manufacturing method.

FIG. 4 is a diagram showing a carrier concentration distribution in an active layer of a semiconductor device according to a conventional method.

FIG. 5 is a diagram showing carrier mobility in an active layer of a semiconductor device according to a conventional method.

[Explanation of symbols]

1...Semi-insulating GaAs substrate 2...AlGaAs layer 3...GaAs layer 4...Si ion 5...Operation layer 6...N+ layer

Claims (1)

[Claims] 1. A semiconductor device having an active region formed on one main surface side of a semiconductor substrate using an ion implantation method, wherein the active region includes a first semiconductor layer mainly serving as an active layer; A semiconductor device comprising a second semiconductor layer formed inside the semiconductor substrate and having a lower activation rate of impurities implanted to form an active region than the first semiconductor layer.