JPH0426416A - Signal transmission circuit of ultrasonic diagnostic device - Google Patents

Signal transmission circuit of ultrasonic diagnostic device

Info

Publication number
JPH0426416A
JPH0426416A JP2132072A JP13207290A JPH0426416A JP H0426416 A JPH0426416 A JP H0426416A JP 2132072 A JP2132072 A JP 2132072A JP 13207290 A JP13207290 A JP 13207290A JP H0426416 A JPH0426416 A JP H0426416A
Authority
JP
Japan
Prior art keywords
switch
circuit
delay
point
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2132072A
Other languages
Japanese (ja)
Inventor
Junichi Ishida
純一 石田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Corp
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Corp, Omron Tateisi Electronics Co filed Critical Omron Corp
Priority to JP2132072A priority Critical patent/JPH0426416A/en
Publication of JPH0426416A publication Critical patent/JPH0426416A/en
Pending legal-status Critical Current

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  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)

Abstract

PURPOSE:To obtain the signal transmission circuit of the ultrasonic diagnostic device which does not generate polarization and can operate on higher frequencies by constituting the device of a power source supply section and a driving circuit section, a delay circuit section, and a differential circuit section. CONSTITUTION:A switch SW1 turns on and the potential at the point (a) rises sharply to the level of a voltage VH with transition response and gradually executes an electric discharge when a trigger input signal Si is applied. The trigger input signal Si is applied to a switch SW2 with the delay by as much as the tau time by a delay circuit 3 and, therefore, the switch SW2 is turned on with the delay by tau from the switch SW1. The charge of a capacitor C1 is rapidly discharged through the switch SW1 and the switch SW2 and the potential at the point (a) rises sharply up to a GND level when the switch SW2 turns on. Consequently, the point (a) is the rectangular pulse of a high voltage. The rectangular pulse at the point (d) is differentiated by a differential circuit 4 and, therefore, the waveform at the point (b) is the pulse waveform of positive and negative directions up to +VH to about -VH as shown by (b) of Fig. 2.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 この発明は、超音波診断装置の高出力、高周波の送信回
路に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to a high-output, high-frequency transmitting circuit for an ultrasonic diagnostic apparatus.

(ロ)従来の技術 従来の超音波診断装置の送信回路には、第6図に示すも
のがある(特開昭62−117533号)この送信回路
は、出力トランジスタQ。の駆動回路部60を、入力側
にそれぞれ抵抗R,、R,を接続したNPN)ランジス
タQ、 、Q、からなる第1、第2のベース接地増幅回
路と、出力端子を前記第2のベース接地増幅回路の出力
端子とともに出力トランジスタQ b xのゲートに接
続したNPNトランジスタQcからなるコレクタ接地増
幅回路とから構成している。この送信回路は、出力トラ
ンジスタQ。にMOS−FETを使用し、電源供給部、
駆動回路部よりの信号により0N10FF制御すること
で高出力、高周波の出力を得ていた。
(B) Prior Art A transmission circuit of a conventional ultrasonic diagnostic apparatus is shown in FIG. 6 (Japanese Unexamined Patent Publication No. 117533/1983).This transmission circuit includes an output transistor Q. The drive circuit section 60 is connected to first and second base-grounded amplifier circuits consisting of NPN (NPN) transistors Q, , Q, each having a resistor R, , R, connected to the input side, and an output terminal connected to the second base. It consists of a collector grounded amplifier circuit consisting of an NPN transistor Qc connected to the output terminal of the grounded amplifier circuit and the gate of the output transistor Q b x. This transmitter circuit has an output transistor Q. MOS-FET is used for the power supply section,
High output and high frequency output was obtained through 0N10FF control using a signal from the drive circuit section.

(ハ)発明が解決しようとする課題 上記した従来の超音波診断装置の送信回路は、出力トラ
ンジスタ1段で、単電源を0N10FFする構成となっ
ているため、出力が片電源方向の台形パルスしか得られ
ない。そのため、出力の周波数特性が広がりを持ち、ま
た振動子をドライ7した時に分極を引き起こすおそれが
ある。さらに出力トランジスタのゲート遅延のため、高
周波化にも限界があるという問題があった。
(c) Problems to be Solved by the Invention The transmission circuit of the conventional ultrasonic diagnostic device described above has one stage of output transistors and is configured to turn a single power supply into 0N10FF, so the output is only a trapezoidal pulse in the direction of one power supply. I can't get it. Therefore, the frequency characteristics of the output have a wide range, and there is a possibility that polarization may occur when the vibrator is dried. Furthermore, there is a problem in that there is a limit to increasing the frequency due to the gate delay of the output transistor.

この発明は、上記問題点に着目してなされたものであっ
て、分極の生じない、しかも高周波化を実現し得る超音
波診断装置の送信回路を提供することを目的としている
The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a transmitting circuit for an ultrasonic diagnostic apparatus that does not cause polarization and can realize a high frequency.

(ニ)課題を解決するための手段及び作用この発明の超
音波診断装置の送信回路は、電源からの電圧を充電する
電源供給用コンデンサと過大電流制御部からなる電源供
給部と、前記電源供給用コンデンサの蓄積電荷を負荷に
供給する第1のトランジスタと前記蓄積電荷を放電する
第2のトランジスタからなる駆動回路部と、前記第1と
第2のトランジスタの制御タイミングをずらすための遅
延回路部と、前記駆動回路部の出力を微分して負荷に供
給する微分回路部とから構成されている。
(d) Means and Effects for Solving the Problems The transmission circuit of the ultrasonic diagnostic apparatus of the present invention includes a power supply unit that includes a power supply capacitor that charges voltage from a power supply and an overcurrent control unit, and a power supply unit that a drive circuit section consisting of a first transistor that supplies the accumulated charge of the storage capacitor to the load and a second transistor that discharges the accumulated charge; and a delay circuit section that shifts the control timing of the first and second transistors. and a differentiation circuit section that differentiates the output of the drive circuit section and supplies it to the load.

この送信回路では、トリガ入力信号が入力されていない
状態では、電源供給用コンデンサに電源電圧まで電荷が
充電蓄積されている。トリガ入力信号が加えられると、
第1のトランジスタがONし、駆動回路部の出力が電源
電圧まで2、峻に立上がる。一方、遅延回路による遅延
時間の後に、第2のトランジスタがONL、電源供給用
のコンデンサの電荷が、第1、第2のトランジスタを介
して放電し、駆動回路部の出力が急峻にGNDレベルに
立下がる。つまり、駆動回路部より、遅延時間に対応し
たパルス幅の信号が出力される。このパルス信号が、微
分回路部で微分され、正負両極性のパルスが負荷に出力
される。
In this transmission circuit, when no trigger input signal is input, charge is stored in the power supply capacitor up to the power supply voltage. When a trigger input signal is applied,
The first transistor turns on, and the output of the drive circuit rises steeply to the power supply voltage. On the other hand, after the delay time caused by the delay circuit, the second transistor turns ON, the charge in the power supply capacitor is discharged via the first and second transistors, and the output of the drive circuit section sharply drops to the GND level. Fall down. In other words, the drive circuit section outputs a signal with a pulse width corresponding to the delay time. This pulse signal is differentiated by a differentiating circuit section, and pulses of both positive and negative polarities are output to the load.

(ホ)実施例 以下、実施例により、この発明をさらに詳細に説明する
(E) Examples The present invention will be explained in more detail with reference to Examples below.

第1図は、この発明の送信回路の原理的構成を示す回路
図である。同図において、+■o電源(100〜200
 V)に過大電流制限用の抵抗R,、コイルし、及び電
源用の電圧を充電する電源供給用コンデンサC3からな
る電源供給部1が接続されている。さらに電源供給部1
とGND間に第1のスイッチSWlと第2のスイッチS
Wtからなる駆動回路部2が接続されている。ここでは
、スイッチSWl、SW2は原理的に有接点図示してい
るが、実際にはトランジスタ等が使用される。
FIG. 1 is a circuit diagram showing the basic configuration of a transmitting circuit according to the present invention. In the same figure, +■o power supply (100 to 200
A power supply unit 1 is connected to V), which includes a resistor R for overcurrent limiting, a coil, and a power supply capacitor C3 for charging the power supply voltage. Furthermore, the power supply section 1
and GND between the first switch SWl and the second switch S
A drive circuit section 2 made of Wt is connected. Although the switches SWl and SW2 are shown in principle as contact diagrams here, transistors or the like are actually used.

駆動回路部2のスイッチSWlは入力信号S、によって
ONされ、またスイッチSW2には、入力信号S、が遅
延回路3でてだけ遅延されて加えられ、ONされる。駆
動回路部2の出力は抵抗R2、コンデンサC2からなる
微分回路4を経て負荷RI−に供給される。
The switch SWl of the drive circuit section 2 is turned on by the input signal S, and the input signal S is applied to the switch SW2 after being delayed by the delay circuit 3, and the switch SW2 is turned on. The output of the drive circuit section 2 is supplied to the load RI- through a differentiating circuit 4 consisting of a resistor R2 and a capacitor C2.

次に、第2図に示す信号波形図により、第1図の送信回
路の動作を説明する。
Next, the operation of the transmitter circuit shown in FIG. 1 will be explained with reference to the signal waveform diagram shown in FIG.

トリガ入力信号S、が加えられる前は、スイッチS W
 + 、S W zは共に、OFF状態であり、コンデ
ンサC1にはコイルLI、抵抗R1を通して、電源■8
よりの電荷が充電、蓄積され、電圧■8のレベルに達し
ている。やがて、トリガ入力信号S、が加えられると、
スイッチSW1がONとなり、a点の電位は過渡応答で
電圧■イのレベルまで急峻に立上がり、その後徐々に放
電を行う(第2図のa参照)。また、トリガ入力信号S
iは遅延回路3によりτ時間だけ遅延してスイッチSW
2に加えられるため、スイッチSW2はスイッチSWl
よりτだけ遅れてONされる。スイッチSW2がONす
ると、コンデンサC5の電荷はスイッチsw、 、SW
2を通して象、激に放電し、a点の電位はGNDレヘル
まで急峻に立下がる。その結果a点は高圧の矩形波パル
スとなる。
Before the trigger input signal S is applied, the switch SW
+ and S W z are both in the OFF state, and the power supply ■8 is connected to the capacitor C1 through the coil LI and resistor R1.
More charges are being charged and accumulated, reaching a voltage level of 8. Eventually, when a trigger input signal S, is applied,
When the switch SW1 is turned on, the potential at point a rises sharply to the level of voltage ②a due to a transient response, and then gradually discharges (see a in FIG. 2). In addition, the trigger input signal S
i is delayed by the delay circuit 3 by the time τ and then the switch SW
2, the switch SW2 is added to the switch SWl
It is turned on with a delay of τ. When switch SW2 is turned on, the charge in capacitor C5 is transferred to switches sw, , SW
2, a strong discharge occurs, and the potential at point a drops sharply to the GND level. As a result, point a becomes a high voltage rectangular wave pulse.

a点の矩形波パルスは、微分回路4で微分されるため、
b点の波形は第2図のbに示すように、+VH〜約−V
Hまでの正負方向のパルス波形となる。
Since the rectangular wave pulse at point a is differentiated by the differentiating circuit 4,
The waveform at point b ranges from +VH to approximately -V, as shown in Fig. 2b.
The pulse waveform is up to H in the positive and negative directions.

第3図に、具体的な実施例送信回路を示している。第1
図と同一符号は、同一のものを示している。ここで、第
1図のスイッチSWIに相当するのが、トランジスタQ
、である。また、抵抗R1、ダイオードDI%コンデン
サC5はトランジスタQ、のバイアス回路を構成してい
る。
FIG. 3 shows a specific example transmitting circuit. 1st
The same reference numerals as in the figures indicate the same parts. Here, the transistor Q corresponds to the switch SWI in FIG.
, is. Further, the resistor R1, diode DI% capacitor C5 constitutes a bias circuit for the transistor Q.

第1図のスイッチSW2に相当するのが、トランジスタ
Q、である。抵抗R1はトランジスタQ。
The transistor Q corresponds to the switch SW2 in FIG. Resistor R1 is transistor Q.

のバイアス回路であり、トランジスタQ、と92間に接
続される抵抗R4はトランジスタQtの過電流保護抵抗
である。
The resistor R4 connected between the transistor Q and 92 is an overcurrent protection resistor for the transistor Qt.

第1図の遅延回路3に相当するのが、トランジスタQ3
、コンデンサC4、C%、ダイオードD2、可変抵抗器
VR,であり、この回路例では、トランジスタQ2のト
ライバを兼ねている。
The transistor Q3 corresponds to the delay circuit 3 in FIG.
, capacitors C4 and C%, diode D2, and variable resistor VR, which also serves as a driver for transistor Q2 in this circuit example.

また、第3図において、入力部に設ける電流ブースター
5は、トランジスタQ、 、Q、のゲート容量をドライ
ブするためのものであり、第4図、第5図にその具体的
な回路例を示している。
In addition, in FIG. 3, the current booster 5 provided at the input section is for driving the gate capacitance of transistors Q, , Q, and specific circuit examples thereof are shown in FIGS. 4 and 5. ing.

第3図の回路において、遅延時間τはトランジスタQ、
のゲート入力容量C1と、コンデンサC3と可変抵抗器
VR,から定まる時定数(Cs + CI+)■□で決
まる。したがって可変抵抗器VR,の抵抗値を変化させ
ることにより、遅延時間τを変更し、出力の周波数を変
更することができる。
In the circuit of FIG. 3, the delay time τ is the transistor Q,
The time constant (Cs + CI+) is determined by the gate input capacitance C1, the capacitor C3, and the variable resistor VR. Therefore, by changing the resistance value of the variable resistor VR, the delay time τ can be changed and the output frequency can be changed.

なお、第3図の遅延回路として、コンデンサCと抵抗R
による回路例を示したが、その他に可変容量ダイオード
を用いてCRによる遅延回路を構成したり、デイレーラ
インを用いて遅延回路を構成してもよい。
In addition, as the delay circuit in Fig. 3, a capacitor C and a resistor R are used.
Although an example of the circuit has been shown, it is also possible to configure a delay circuit using a CR using a variable capacitance diode, or a delay circuit using a delay line.

(へ)発明の効果 この発明によれば、電流制限部と電源供給コンデンサか
らなる電源供給部を設けているので、出力の給電用と放
電用の第1と第2のトランジスタが同時にONL、でも
、過大電流は流れない。また、給電用の第1のトランジ
スタと放電用の第2のトランジスタが独立のためトラン
ジスタのゲート遅延による高周波化の限界がない。また
、第1と第2のトランジスタの制御タイミングを調整す
ることにより周波数調整が容易にできる。さらに、駆動
出力が微分回路を通して出力されるため正負方向のパル
ス出力となり、振動子の分極をひき起こしにくい、等積
々の利点がある。
(F) Effects of the Invention According to the present invention, since the power supply section consisting of the current limiting section and the power supply capacitor is provided, the first and second transistors for power supply and discharge of the output can be ONL at the same time. , no excessive current will flow. Furthermore, since the first transistor for power feeding and the second transistor for discharging are independent, there is no limit to increasing the frequency due to gate delay of the transistor. Further, frequency adjustment can be easily performed by adjusting the control timing of the first and second transistors. Furthermore, since the drive output is output through a differentiating circuit, it becomes a pulse output in the positive and negative directions, which has the advantage of being less likely to cause polarization of the vibrator.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、この発明の送信回路の原理的構成を示す回路
図、第2図は、同送信回路の動作を説明するための波形
タイムチャート、第3図は、実施例送信回路の具体的な
回路接続図、第4図及び第5図は、同実施例送信回路に
使用される電流ブースターの具体例を示す回路図、第6
図は、従来の超音波診断装置の送信回路の回路図である
。 1:を源供給部、  2:°駆動回路部、3:遅延回路
部、  4:微分回路部、C+:ii源供給用コンデン
サ、 R+:iti流制限抵抗、 Ql :第1のトランジスタ、 Q2 :第2のトランジスタ。 特許出願人      オムロン株式会社代理人   
弁理士  中 村 茂 信第 図
Fig. 1 is a circuit diagram showing the basic configuration of the transmitting circuit of the present invention, Fig. 2 is a waveform time chart for explaining the operation of the transmitting circuit, and Fig. 3 is a concrete diagram of the transmitting circuit according to the embodiment. 4 and 5 are circuit connection diagrams showing specific examples of the current booster used in the transmitting circuit of the same embodiment.
The figure is a circuit diagram of a transmitting circuit of a conventional ultrasonic diagnostic apparatus. 1: source supply section, 2: ° drive circuit section, 3: delay circuit section, 4: differentiation circuit section, C+: ii source supply capacitor, R+: iti current limiting resistor, Ql: first transistor, Q2: Second transistor. Patent applicant OMRON Co., Ltd. agent
Patent Attorney Shigeru Nakamura

Claims (1)

【特許請求の範囲】[Claims] (1)所定のトリガ入力信号に応じて高圧パルスを送出
する超音波診断装置の送信回路において、電源からの電
圧を充電する電源供給用コンデンサと過大電流制御部か
らなる電源供給部と、前記電源供給用コンデンサの蓄積
電荷を負荷に供給する第1のトランジスタと前記蓄積電
荷を放電する第2のトランジスタからなる駆動回路部と
、前記第1と第2のトランジスタの制御タイミングをず
らすための遅延回路部と、 前記駆動回路部の出力を微分して負荷に供給する微分回
路部と、 を備えたことを特徴とする超音波診断装置の送信回路。
(1) In a transmitting circuit of an ultrasonic diagnostic apparatus that sends out high-voltage pulses in response to a predetermined trigger input signal, a power supply section consisting of a power supply capacitor that charges voltage from the power supply and an overcurrent control section; a drive circuit section consisting of a first transistor that supplies the accumulated charge of the supply capacitor to the load and a second transistor that discharges the accumulated charge; and a delay circuit that shifts the control timing of the first and second transistors. A transmitting circuit for an ultrasonic diagnostic apparatus, comprising: a differential circuit section that differentiates the output of the drive circuit section and supplies the differentiated output to a load.
JP2132072A 1990-05-22 1990-05-22 Signal transmission circuit of ultrasonic diagnostic device Pending JPH0426416A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2132072A JPH0426416A (en) 1990-05-22 1990-05-22 Signal transmission circuit of ultrasonic diagnostic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2132072A JPH0426416A (en) 1990-05-22 1990-05-22 Signal transmission circuit of ultrasonic diagnostic device

Publications (1)

Publication Number Publication Date
JPH0426416A true JPH0426416A (en) 1992-01-29

Family

ID=15072860

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2132072A Pending JPH0426416A (en) 1990-05-22 1990-05-22 Signal transmission circuit of ultrasonic diagnostic device

Country Status (1)

Country Link
JP (1) JPH0426416A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007029259A (en) * 2005-07-25 2007-02-08 Hitachi Medical Corp Ultrasonic probe
JP2008264534A (en) * 2007-04-19 2008-11-06 General Electric Co <Ge> Transmission and receiving circuit for ultrasonic system
JP2011062295A (en) * 2009-09-16 2011-03-31 Aloka Co Ltd Transmission circuit of ultrasonic diagnostic apparatus
CN105708497B (en) * 2016-01-18 2018-11-13 深圳开立生物医疗科技股份有限公司 A kind of high frequency ultrasound exciting circuit and high frequency intravascular ultrasound system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007029259A (en) * 2005-07-25 2007-02-08 Hitachi Medical Corp Ultrasonic probe
JP2008264534A (en) * 2007-04-19 2008-11-06 General Electric Co <Ge> Transmission and receiving circuit for ultrasonic system
US8961421B2 (en) 2007-04-19 2015-02-24 General Electric Company Transmit/receive circuitry for ultrasound systems
JP2011062295A (en) * 2009-09-16 2011-03-31 Aloka Co Ltd Transmission circuit of ultrasonic diagnostic apparatus
CN105708497B (en) * 2016-01-18 2018-11-13 深圳开立生物医疗科技股份有限公司 A kind of high frequency ultrasound exciting circuit and high frequency intravascular ultrasound system

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