JPH04259006A - Address display method using pcm - Google Patents

Abstract

PURPOSE:To easily detect such mistakes as the double writing, etc., by judging easily the using states of addresses like the address using frequency, the distinctions between the read and write accesses, etc. CONSTITUTION:The using frequence is shown in the number of dots 23 in the read and write access display areas 21 and 22 respectively included in each bit address display area 24. Meanwhile, the symbols ']' are shown beside the addresses that undergo the read accesses in a byte address display area 25. Furthermore, the numbers of nets where those byte addresses are used in a ladder chart are shown beside the symbols ']'. Then the marks ']' are added under the net numbers of those byte addresses that undergo the write accesses.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for displaying used addresses in a PMC for displaying the usage status of addresses on a ladder program, and more particularly to a method for displaying used addresses in a PMC that makes it easier to confirm the usage status of addresses.

0002

2. Description of the Related Art Ladder type programs are widely used in PMC. These ladder programs are
It is expressed in relay logic format, and one logical line is called a net. Generally, after creating a ladder program, the usage status of each address is displayed on a display screen to check for errors. One way to display the usage status of this address is by cross-referencing. This lists the numbers of nets used for read access or write access for each bit address and byte address.

0003

[Problems to be Solved by the Invention] However, with the conventional method of enumerating net numbers, it takes time to check the number of times an address has been used, and it is difficult to distinguish between read access and write access. Therefore, there is a problem in that it is difficult to judge even if there is a mistake such as double writing in one signal. The present invention has been made in view of these points, and provides a method for displaying used addresses in a PMC that allows easy determination of address usage status, such as the number of times an address has been used and the distinction between read access and write access. The purpose is to provide.

0004

[Means for Solving the Problems] In order to solve the above problems, the present invention provides a method for displaying addresses in use by a PMC that displays the usage status of addresses, including the number of read accesses and write accesses to the address on a ladder program. A method for displaying used addresses of a PMC is provided, which is characterized by displaying the number of times on a display screen.

[0005]

[Operation] Since the number of read accesses and the number of write accesses to an address are displayed on the display screen, the use status of the address can be determined at a glance, and mistakes such as double writing can be easily determined.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram of a programming device for implementing the present invention. The programming device 1 is configured with a processor 2 as its center. A program memory 3 and a data memory 4 are coupled to the processor 2 via a bus 5 . A system program for operating the programming device 1 is stored in the program memory 3. A ladder program created by the programming device 1 is stored in the data memory 4. The ladder program is input from the keyboard 6 and displayed on the display device 7 as necessary. Additionally, the ladder program can be edited using the mouse 11 or edited using the printer 8.
You can also print it out. The ladder program is sent from the data memory 4 via the interface 9 to the ROM writer 10, where it is written into the ROM.

The programming device 1 is provided with an address data memory 12 . This address data memory 12 stores the use status of addresses in the created ladder program, that is, the number of read accesses and the number of write accesses in bit units and byte units. This address data is displayed on the display device 7 according to an operator's instruction.

FIG. 1 is a diagram showing an address data screen displayed on the display screen 7a of the display device 7. As shown in FIG. In FIG. 1, an internal register address data screen 20 is displayed. This address data screen 20 is an enlarged display of the portion selected by the keyboard 6 or mouse 11 on the address data selection screen 30 of FIG. Note that the address data selection screen 30 also allows the user to see the approximate address usage status.

Returning to FIG. 1, the address data screen 20 displays the address usage status of addresses R0 to R5. Each bit address display area 24 includes a read access display area 21 and a write access display area 22.
is provided. Within these areas 21 and 22,
The number of times each item has been used is indicated by the number of dots 23. For example, it can be easily seen that the bit address R0.7 has five read accesses and one write access.

The address data screen 20 is also provided with a byte address display area 25 for displaying the usage range of byte addresses. In this display area 25, a symbol 26 is to the right of the byte address being read accessed.
is displayed, and next to it, the number of the net in which that byte address is used on the ladder diagram is displayed. Further, a mark 27 is attached below the net number of the byte address being write accessed. Therefore, in FIG. 1, net 10 of the ladder diagram has byte address R0, and net 30 has byte addresses R2 to R5.
It can be seen that byte addresses R1 and R2 in net 20 are respectively read accessed, while byte addresses R1 and R2 are write accessed.

[0011] In this way, in the bit address,
A bit address display area 24 is provided to display the number of read accesses and write accesses using dots 23, while for byte addresses, a symbol 26, a net number, and a mark 27 are displayed in the byte address display area 25. This allows you to judge its usage status at a glance. Therefore, errors such as double writing can be easily determined.

0012

As described above, in the present invention, the number of read accesses and the number of write accesses of an address on a ladder program are respectively displayed on the display screen. Therefore, the use status of an address can be determined at a glance, and mistakes such as double writing can be easily determined.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an address data screen according to a method of displaying addresses used in a PMC according to the present invention.

FIG. 2 is a block diagram of a programming device for implementing the present invention.

FIG. 3 is an address data selection screen.

[Explanation of symbols]

1 Programming device 2 CPU 7 Display device 7a Display screen 12 Address data memory 20 Address data screen 21 Read access display area 22 Write access display area 23 dots 24 Bit address display area 25 Byte address display area 30 Address data selection screen

Claims (6)

[Claims] [Claim 1] PMC that displays address usage status
A method for displaying addresses used in a programmable machine controller (programmable machine controller), characterized in that the number of read accesses and the number of write accesses of the address on a ladder program are respectively displayed on a display screen.
How to display the address used by MC. 2. The display screen is characterized in that a bit address display area for displaying the usage status of each bit address and a byte address display area for displaying the usage status of byte addresses are provided. A method for displaying addresses used in a PMC according to claim 1. 3. The bit address display area is provided with a read access display area that displays the number of read accesses of the bit address and a write access display area that displays the number of write accesses. 3. The method for displaying addresses used in a PMC according to claim 2. 4. The method of displaying used addresses of a PMC according to claim 1, 2 or 3, wherein the number of read accesses and the number of write accesses are each displayed by the number of dots. 5. In the byte address display area, a range of byte addresses that are accessed for read or write access in one net on the ladder diagram is indicated by a symbol, and the number of the net is attached to the symbol. 3. The method for displaying addresses used in a PMC according to claim 2. 6. The method for displaying addresses used in a PMC according to claim 5, further comprising adding a mark to the number of the net when the byte address is write-accessed.