JPH0425128A - Formation of insulating film - Google Patents

Formation of insulating film

Info

Publication number
JPH0425128A
JPH0425128A JP13070390A JP13070390A JPH0425128A JP H0425128 A JPH0425128 A JP H0425128A JP 13070390 A JP13070390 A JP 13070390A JP 13070390 A JP13070390 A JP 13070390A JP H0425128 A JPH0425128 A JP H0425128A
Authority
JP
Japan
Prior art keywords
layer
film
power
insulating film
gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13070390A
Other languages
Japanese (ja)
Other versions
JP2819774B2 (en
Inventor
Mitsuo Sasaki
光夫 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP13070390A priority Critical patent/JP2819774B2/en
Publication of JPH0425128A publication Critical patent/JPH0425128A/en
Application granted granted Critical
Publication of JP2819774B2 publication Critical patent/JP2819774B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To enable the title insulating films in excellent step coverage and flatness to be formed by a method wherein the insulating films are to be multilayer structured i.e. the first layer is formed by feeding lower RF power while the second layer or later are formed by feeding higher RF power and the final layer is formed by additionally feeding Ar gas. CONSTITUTION:The title insulating films are to be formed of multilayer structured insulating films comprising respective insulating layers i.e. the first layer 15 is formed by feeding lower RF power to a specimen base while the second layer 16 or later are formed by feeding higher RF power and the final layer 17 is formed by additionally feeding Ar gas to a plasma production chamber. That is, the insulating films are multilayer structured while the first layer 15 is formed using relatively lower RF power so that a thin film in relatively soft film quality filling the role of relieving the stress on a wiring 22 may be formed. On the other hand, the second layer or later are formed using higher RF power to form the multilayer insulating films in high denseness while the final layer 17 is formed by additionally feeding Ar gas thereby enabling a flat film to be formed by the etching action of Ar gas. Through these procedures, in the insulating films in excellent step coverage and flatness and hardly doing damage to the wiring 22 can be formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、ECRプラズマCVD装置を用いて基板表
面のM配線等による凹凸表面を被覆するとともに凹部を
埋めて平坦な層間絶縁膜あるいは表面保護膜を形成する
際の絶縁膜の形成方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] This invention uses an ECR plasma CVD apparatus to coat the uneven surface of a substrate surface due to M wiring, etc., and fill in the depressions to form a flat interlayer insulating film or surface protection. The present invention relates to a method for forming an insulating film when forming a film.

〔従来の技術〕[Conventional technology]

通常、半導体集積回路における層間絶縁膜や表面保護膜
は、膜成分を含む原料ガスの熱分解反応を利用した熱C
VD法や、減圧下で原料ガスの高周波グロー放電を生じ
させてガスを分解させて基板上に薄膜を形成させる高周
波プラズマCVD法により形成されていたが、近年、集
積回路の微細化、高密度化が進み、配線間隔や配線幅が
ミクロンからサブミクロンへと移行し、CVD法による
絶縁膜形成にも、これに対応できる装置としてECRプ
ラズマCVD装置の開発が進んでいる。ECRプラズマ
CVD装置は、マイクロ波が導入されるとともに励磁ソ
レノイドによりほぼ同軸に包囲され、導入されたガスを
マイクロ波と励磁ソレノイドが作る磁界との共鳴効果に
よりプラズマ化するプラズマ生成室と、該プラズマ生成
室と連通し内部に基板が載置される試料台を備えた反応
室とを備えてなるものであり、近年では、以下に説明す
る膜質の向上、平坦な絶縁膜形成などのために、さらに
、試料台にRFパワー (RFは数十k tl zない
し数十旧Izの周波数を意味し、通常13.56MHz
が用いられる)を供給するRF電源を備えたものが用い
られるようになり、試料台にRFパワーを供給しつつ反
応室に導入された反応性ガスを前記プラズマ室から励磁
ソレノイドが作る磁力線に沿って反応室へ移動するプラ
ズマで活性化して、基板表面への薄膜形成が行われてい
る。さらに、前記励磁ソレノイドと同軸にかつ基板を挟
む軸方向の位置に第2の励磁ソレノイド (以下サブソ
レノイドと記す)を配置し、このサブソレノイドに前記
励磁ソレノイドと逆方向の磁界を生じさせるように電流
を流して基板近傍で双方の磁界が急激に外方へ広がる。
Normally, interlayer insulating films and surface protective films in semiconductor integrated circuits are produced using thermal
They were formed using the VD method or the high-frequency plasma CVD method, which generates a high-frequency glow discharge of raw material gas under reduced pressure to decompose the gas and form a thin film on the substrate, but in recent years, integrated circuits have become smaller and more dense. With the advancement of technology, the wiring spacing and wiring width are shifting from microns to submicrons, and ECR plasma CVD equipment is being developed as an equipment that can cope with the formation of insulating films by the CVD method. An ECR plasma CVD apparatus includes a plasma generation chamber into which microwaves are introduced and which is surrounded almost coaxially by an excitation solenoid, where the introduced gas is turned into plasma by the resonance effect of the microwaves and the magnetic field created by the excitation solenoid; It is equipped with a reaction chamber that communicates with the production chamber and is equipped with a sample stage on which a substrate is placed.In recent years, in order to improve film quality and form a flat insulating film, etc. Furthermore, the sample stage is equipped with RF power (RF means a frequency of several tens of kilometres to several tens of former Iz, usually 13.56 MHz).
A device equipped with an RF power supply that supplies RF power (used for The plasma is activated by the plasma that moves into the reaction chamber, and a thin film is formed on the surface of the substrate. Furthermore, a second excitation solenoid (hereinafter referred to as a sub-solenoid) is disposed coaxially with the excitation solenoid and at a position in the axial direction sandwiching the board, so that the sub-solenoid generates a magnetic field in a direction opposite to that of the excitation solenoid. When current is applied, both magnetic fields rapidly expand outward near the substrate.

いわゆるカスプ磁界を形成させ、基板に形成する薄膜の
膜厚分布を均一にするカスプ磁界型ECRプラズマCV
D装置の使用がさかんになりつつある。
Cusp magnetic field type ECR plasma CV that forms a so-called cusp magnetic field and makes the thickness distribution of the thin film formed on the substrate uniform.
The use of D devices is becoming more popular.

このように、ECRプラズマCVD装置では、プラズマ
生成部と反応部とが分離され、高温のプラズマ生成室か
ら低温の反応室へ移動したプラズマで反応室内に導入さ
れた反応性ガスを活性化して基板表面に薄膜が形成され
るから、低温成膜が可能であり、かつ低ガス圧で高活性
、高密度のプラズマが得られるとともに、低ガス圧に基
づく緻密性、耐酸性にすぐれた膜の形成が可能である。
In this way, in the ECR plasma CVD apparatus, the plasma generation section and the reaction section are separated, and the plasma that moves from the high temperature plasma generation chamber to the low temperature reaction chamber activates the reactive gas introduced into the reaction chamber. Since a thin film is formed on the surface, low-temperature film formation is possible, and high-activity, high-density plasma can be obtained at low gas pressure, as well as film formation with excellent density and acid resistance based on low gas pressure. is possible.

また、試料台1従って基板にRFパワーを供給すると、
基板表面に生じたRFプラズマ中の電子とイオンとの移
動度の差により基板表面に負の電位が生じ、この負電位
による基板表面へのイオン衝撃により膜がさらに緻密化
され、また配線等による凹凸表面に例えば絶縁膜として
シリコン酸化膜を形成する場合、凹凸表面の凸部頂面の
横方向に張り出した膜を0□ガスイオンでエツチング除
去しつつ凹部を開放状態として成膜して、凹凸表面に膜
厚、膜質の均一な段差被膜を得ることができる。
Also, when RF power is supplied to the sample stage 1 and therefore the substrate,
A negative potential is generated on the substrate surface due to the difference in mobility between electrons and ions in the RF plasma generated on the substrate surface, and the film is further densified due to ion bombardment on the substrate surface due to this negative potential. For example, when forming a silicon oxide film as an insulating film on an uneven surface, the film extending horizontally from the top surface of the convex portions on the uneven surface is removed by etching with 0□ gas ions, and the film is deposited with the concave portions open. A step film with uniform thickness and quality can be obtained on the surface.

さらに、プラズマ生成室に計ガスを追加供給し、生成さ
れた行ガスイオンの強いエツチング作用を利用して、表
面電界の高い凸部頂面の膜の成長速度を凹部より小さく
しながら平坦な絶縁膜を形成することができる。前述の
カスプ磁界型プラズマCVD装置の場合には、カスプ磁
界を形成する磁力線の形状から、基板に到達する電子量
が減り(イオンは電子と比べて質量が大きく、その慣性
で基板に到達する)、基板の表面電位が小さくなるため
、供給するRFパワーを増して所望の負電位が維持され
る。
Furthermore, by supplying additional metering gas to the plasma generation chamber, and utilizing the strong etching effect of the generated row gas ions, the growth rate of the film on the top surface of the convex part, where the surface electric field is high, is lower than that of the concave part, while flat insulation is achieved. A film can be formed. In the case of the above-mentioned cusp magnetic field type plasma CVD apparatus, the amount of electrons reaching the substrate is reduced due to the shape of the magnetic field lines that form the cusp magnetic field (ions have a larger mass than electrons and reach the substrate due to their inertia). Since the surface potential of the substrate becomes smaller, the supplied RF power is increased to maintain the desired negative potential.

(発明が解決しようとするR題〕 しかしながら、配線等による凹凸表面に形成する絶縁膜
が例えばシリコン窒化膜である場合には、凸部頂面の横
方向に張り出した膜に対するN2ガスイオンのエツチン
グ効果が、シリコン酸化膜における02ガスイオンはど
大きくなく、凸部頂面の横ζ 方向の張り出しが除去されないまま成膜が行われる結果
、凸部側壁の膜が緻密性に欠け、14図ta+に示すよ
うに、側壁の膜23と凹部底面の膜との間に不連続線2
4が発生し、同図(blのような平坦化への途上で空洞
が発生してしまい、エツチング時に配線22までも侵さ
れてしまうという問題があった。
(Problem to be solved by the invention) However, when the insulating film formed on the uneven surface due to wiring etc. is, for example, a silicon nitride film, the N2 gas ion etching of the film that extends in the lateral direction of the top surface of the protrusion The effect is that the 02 gas ions in the silicon oxide film are not very large, and as a result, the film is formed without removing the overhang in the lateral ζ direction on the top surface of the convexity, resulting in the film on the sidewall of the convexity lacking in density, as shown in Figure 14 ta+. As shown in FIG.
There was a problem in that a cavity was generated on the way to planarization as shown in FIG.

そこで、N2ガスイオンのエツチング効果を高めるため
にRFパワーを大きくすると、イオン衝撃によりヒロッ
クが発生したり、あるいはこのイオン衝撃により凹凸表
面の温度が上昇し、配線と絶縁膜との熱膨張係数の差に
基づく断線が生じる。また、凹凸表面の電界分布の不均
一に基づく膜厚分布や膜質分布の不均一が大きくなり、
この不均一に基づく膜のストレスが配線に伝わり、いわ
ゆるストレスマイグレーションによる断線が生じてしま
う。
Therefore, if the RF power is increased to enhance the etching effect of N2 gas ions, hillocks may occur due to ion bombardment, or the temperature of the uneven surface may increase due to the ion bombardment, resulting in a decrease in the coefficient of thermal expansion between the wiring and the insulating film. Disconnection occurs due to the difference. In addition, the unevenness of the film thickness distribution and film quality distribution due to the unevenness of the electric field distribution on the uneven surface increases.
Stress in the film due to this non-uniformity is transmitted to the wiring, resulting in disconnection due to so-called stress migration.

この発明の目的は、試料台にRFパワーを供給しながら
凹凸表面に成膜しても膜厚分布、膜質分布の均一性が得
られ、かつ配線のダメージが起こりにくい1段差被膜性
や平坦化のすぐれた絶縁膜=6 の形成方法を提供することである。
The purpose of this invention is to obtain uniformity in film thickness distribution and film quality distribution even if a film is formed on an uneven surface while supplying RF power to a sample stage, and to achieve one-step film quality and flatness that prevent damage to wiring. An object of the present invention is to provide a method for forming an excellent insulating film.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題を解決するために、この発明においては、絶縁
膜を、各層が絶縁膜からなる多層構造の絶縁膜とすると
ともに、その第1層は試料台に供給するRFパワーを小
さく、第2層以降はRFパワーをより大きくして形成し
かつ最終層はプラズマ生成室にΔrガスを追加供給して
形成する絶縁膜形成方法をとるものとする。
In order to solve the above problems, in the present invention, the insulating film has a multilayer structure in which each layer is an insulating film, and the first layer reduces the RF power supplied to the sample stage, and the second layer Thereafter, an insulating film forming method will be used in which the RF power is increased and the final layer is formed by additionally supplying Δr gas to the plasma generation chamber.

〔作用〕[Effect]

このように、絶縁膜を多層構造とし、その第1層の形成
を比較的低いFIFパワーを用いて行うことにより、膜
質が比較的柔らかな、配線に伝わろうとするストレスを
緩和する作用をもつ薄膜が形成されるとともに、膜厚が
薄いことから、第1層がシリコン窒化膜であっても、配
線頂面での膜の横方向張り出しが小さく、配線側壁の膜
質に頂面や溝の底面の膜と比べてさほど差異が生ぜず、
側壁の膜と底面の膜との間に不連続線が生しにくくなる
。また、RFパワーが小さいから、イオン衝撃によるヒ
ロックの発生が困難になる。そして、第2層以降をより
高いRFパワーを用いて形成することにより、緻密性が
第2層以降の層のそれぞれ全面にわたって高い多層絶縁
膜が形成される。
In this way, by forming the insulating film into a multilayer structure and forming the first layer using a relatively low FIF power, we can create a thin film with a relatively soft film quality that has the effect of relieving the stress that is transmitted to the wiring. is formed and the film is thin, so even if the first layer is a silicon nitride film, the lateral protrusion of the film on the top surface of the wiring is small, and the film quality on the wiring sidewalls is affected by the top surface and the bottom of the trench. There is not much difference compared to the membrane,
A discontinuous line is less likely to occur between the side wall film and the bottom film. Furthermore, since the RF power is small, it becomes difficult to generate hillocks due to ion bombardment. By forming the second and subsequent layers using higher RF power, a multilayer insulating film with high density is formed over the entire surface of each of the second and subsequent layers.

また、各層の絶縁膜は、S10膜、 SIN膜あるいは
5iON19のいずれかを任意に選択して形成すること
ができるから、これらを適宜に組み合わせることにより
所望の特性を有する多層絶縁膜を得ることができる。そ
して、最終層形成時には、プラズマ生成室内に^rガス
が追加供給されるから、計ガスイオンの強いエツチング
作用により、最終層の直前までに形成された多層膜の1
電界強度の高い凸部のエツチング速度と成膜速度の割合
と、電界強度の低い凹部のエツチング速度と成膜速度の
割合との間には差が生じ、凸部より膜成長の速い凹部が
さきに埋められながら平坦な膜が形成される。
Furthermore, since the insulating film of each layer can be formed by arbitrarily selecting any of the S10 film, SIN film, or 5iON19, it is possible to obtain a multilayer insulating film having desired characteristics by appropriately combining these films. can. When forming the final layer, ^r gas is additionally supplied into the plasma generation chamber, so the strong etching action of the metering gas ions removes one part of the multilayer film formed just before the final layer.
There is a difference between the ratio of etching rate and film formation rate in the convex part where the electric field strength is high and that in the concave part where the electric field strength is low. A flat film is formed while being buried in the pores.

このように、絶縁膜を、各層形成時のRFパワーを変え
た多層絶縁膜として形成し、かつ最終層の形成時に什ガ
スをプラズマ生成室内に追加供給する絶縁膜形成方法と
することにより、ヒロックの発生や配線の熱的9機械的
断線を防止しながら全体として緻密な膜を形成すること
ができる。そして、段差被膜では、第1Nが熱的5m械
的に配線を遮蔽していることから、第2層以降のRFパ
ワーを大きくして均一な膜厚、膜質を得ることができ、
つづく平坦化では、Arガスの追加供給作業を必要とす
るのみであり、全体としてプラズマ生成室に供給するガ
スの種類を変えるのみの簡単な作業により、配線のダメ
ージを生じさせない良質の絶縁膜を簡易に形成すること
ができる。
In this way, the insulating film is formed as a multilayer insulating film in which the RF power during the formation of each layer is changed, and additional gas is supplied into the plasma generation chamber during the formation of the final layer. It is possible to form a dense film as a whole while preventing the occurrence of thermal and mechanical disconnection of wiring. In the step film, since the first N mechanically shields the wiring by 5 m, it is possible to increase the RF power from the second layer onward to obtain a uniform film thickness and quality.
The subsequent planarization requires only the additional supply of Ar gas, and by simply changing the type of gas supplied to the plasma generation chamber, a high-quality insulating film that does not damage the wiring can be created. It can be easily formed.

〔実施例〕〔Example〕

第3図に本発明による絶縁膜形成方法が適用されるEC
RプラズマCVD装置の構成例を示す。
FIG. 3 shows an EC to which the insulating film forming method according to the present invention is applied.
An example of the configuration of an R plasma CVD apparatus is shown.

この装置は、図示されないマイクロ波源と、マイクロ波
源で発振されたマイクロ波う伝達する導波管1と、導波
管1を通ったマイクロ波が導入されるプラズマ生成室5
と、導波管1側の大気圧とプラズマ生成室5側の真空と
を隔離する。誘電体からなるマイク1フ波導入窓2と、
プラズマ生成室5をほぼ同軸に囲む励磁ソレノイド4と
、プラズマ生成室5の下端部の開口5aを介してプラズ
マ生成室5と連通ずる。内部に被成膜基板9が載置され
る試料台10を備えた反応室6と、試料台10の背面側
に前記励磁ソレノイド4と同軸に配されたサブソレノイ
ド1工と、試料台10にRFパワーを供給するRF電源
12と、試料台10に供給されるRFパワーを調整する
可変コンデンサ13とを主要構成部材として形成されて
いる。プラズマ生成室5はマイクロ波の所望共振モード
を形成させる空洞共振器として形成され、第1ガス導入
系3から0□+ NZ等、膜成分を有するガスを導入し
つつマイクロ波源からマイクロ波を導入するとともに、
励磁ソレノイド4に流す電流を調整して、プラズマ生成
室5内にマイクロ波と共鳴する磁束密度(マイクロ波の
周波数を工業的に用いられる標準周波数2.45GHz
とした場合には875ガウス)を有する磁場領域を形成
し、プラズマ生成室5内に高密度のプラズマを形成する
This device includes a microwave source (not shown), a waveguide 1 that transmits the microwaves oscillated by the microwave source, and a plasma generation chamber 5 into which the microwaves that have passed through the waveguide 1 are introduced.
The atmospheric pressure on the waveguide 1 side and the vacuum on the plasma generation chamber 5 side are isolated. A microphone 1 wave introduction window 2 made of a dielectric material,
The excitation solenoid 4 surrounds the plasma generation chamber 5 substantially coaxially and communicates with the plasma generation chamber 5 through an opening 5 a at the lower end of the plasma generation chamber 5 . A reaction chamber 6 equipped with a sample stage 10 on which a film-forming substrate 9 is placed, a sub-solenoid arranged coaxially with the excitation solenoid 4 on the back side of the sample stage 10, and a The main components are an RF power source 12 that supplies RF power, and a variable capacitor 13 that adjusts the RF power supplied to the sample stage 10. The plasma generation chamber 5 is formed as a cavity resonator that forms a desired resonance mode of microwaves, and microwaves are introduced from the microwave source while a gas having a film component such as 0□+NZ is introduced from the first gas introduction system 3. At the same time,
The current flowing through the excitation solenoid 4 is adjusted to create a magnetic flux density that resonates with the microwave in the plasma generation chamber 5 (the frequency of the microwave is set to the industrially used standard frequency of 2.45 GHz).
In this case, a magnetic field region having a magnetic field strength of 875 Gauss) is formed, and high-density plasma is formed in the plasma generation chamber 5.

このプラズマは、開口5aから、励磁ソレノイド4が形
成する磁力線に沿い、第2ガス導入系7か】0 ら反応室6内に導入された。膜成分を有する反応性ガス
S i H4(シラン)をプラズマエネルギーで分解し
ながら試料台方向へ向かい、励磁ソレノイド4とサブソ
レノイド11とにより基板9の近傍に形成されたカスブ
磁界領域でプラズマ中の電子の多くカベカスプ磁界を形
成する磁力線に沿って反応室の周壁方向へ向かい、イオ
ンの多くが電子とともにその方向を曲げながら、その大
きい慣性で基板9に到達する。カスプ磁界の形状から、
イオンの移動方向の曲がりは基板の軸線近傍はど大きく
周縁側で小さいから、基板に到達するイオン密度の面内
分布は、ザブソレノイド11のない、励磁ソレノイド4
のみによる発散磁界に沿うプラズマ移動時と比べて大き
く平均化され、基板上に均一な膜厚分布を得ることがで
きる。以下、このように構成されたECRプラズマCV
D装置を用い、配線による基板上の凹凸表面に平坦な絶
縁膜を本発明の絶縁膜形成方法により形成する際の、こ
の方法の一実施例を説明する。なお、本発明による多層
絶縁膜は、各層がそれぞれSiO膜、 SiN膜あるい
は5iNO膜のいずれかの絶縁膜として形成されるとと
もに、互いに接する2層は異なる組成であることを要し
ないものとしている。
This plasma was introduced into the reaction chamber 6 from the second gas introduction system 7 through the opening 5a along the magnetic lines of force formed by the excitation solenoid 4. The reactive gas S i H4 (silane) having a film component is decomposed by plasma energy while heading toward the sample stage, and the cuspid magnetic field region formed near the substrate 9 by the excitation solenoid 4 and the sub-solenoid 11 is used to decompose the reactive gas S i H4 (silane) in the plasma. Many of the electrons head toward the peripheral wall of the reaction chamber along the lines of magnetic force forming the wall cusp magnetic field, and many of the ions bend their direction together with the electrons until they reach the substrate 9 with their large inertia. From the shape of the cusp magnetic field,
Since the curvature in the moving direction of ions is larger near the axis of the substrate and smaller near the periphery, the in-plane distribution of ion density reaching the substrate is different from that of the excitation solenoid 4 without sub solenoid 11.
Compared to when the plasma moves along the divergent magnetic field caused by the magnetic field alone, it is averaged to a greater extent, and a uniform film thickness distribution can be obtained on the substrate. The ECR plasma CV configured in this way will be explained below.
An embodiment of this method will be described in which a flat insulating film is formed on an uneven surface of a substrate due to wiring by the insulating film forming method of the present invention using apparatus D. Note that in the multilayer insulating film according to the present invention, each layer is formed as an insulating film of either SiO film, SiN film, or 5iNO film, and two layers in contact with each other do not need to have different compositions.

第1図は本発明の第1の実施例として、本発明の絶縁膜
形成方法による絶縁膜形成の工程を、絶縁膜を構成する
各層の絶縁膜が異なる組成を有する場合に°ついて示す
ものである。絶縁膜は3層構造とし、成膜条件を次の通
りとした。
FIG. 1 shows, as a first embodiment of the present invention, the process of forming an insulating film by the insulating film forming method of the present invention in the case where the insulating films of each layer constituting the insulating film have different compositions. be. The insulating film had a three-layer structure, and the film formation conditions were as follows.

(1)第1層膜15形成時のRFパワーを0〜200W
とし、膜厚を1000人〜2000人とする。
(1) RF power when forming the first layer film 15 is 0 to 200W.
The film thickness will be 1,000 to 2,000 people.

(2)第2層膜16形成時のRFパワーを400〜75
0Wとする。
(2) RF power when forming the second layer film 16 is 400 to 75
It is assumed to be 0W.

(3)第3層膜17形成時のRFパワーを400〜75
0Wとするとともに、プラズマ生成室にArガスを10
〜11005CC(標準状態に換算したときのcc/m
1n)の流量で追加供給する。
(3) RF power when forming the third layer film 17 is 400 to 75
At the same time as setting the power to 0W, Ar gas was added to the plasma generation chamber at 10W.
~11005CC (cc/m when converted to standard condition)
Additional supply is made at a flow rate of 1n).

上記各項共通に、 (a)マイクロ波パワーを300〜1400Wとする。Common to each of the above items, (a) Microwave power is set to 300 to 1400W.

Tb)装置内ガス圧力を5 X 10−3〜I X 1
0−’Torrとする。
Tb) Increase the gas pressure inside the device to 5 x 10-3 to I x 1
0-'Torr.

(C)ガス流量比を 5itlt10□−0,3〜0.
8SiHt/NZ = 0.5 〜1.2SiH,10
□+N2=0.3 〜1.0とする。
(C) Gas flow rate ratio: 5itlt10□-0,3~0.
8SiHt/NZ = 0.5 ~ 1.2SiH, 10
□+N2=0.3 to 1.0.

上記成膜条件で絶縁膜を形成すると、第1層を構成する
絶縁膜ばO〜200Wの低RFパワーを用いて形成され
るから、0□プラズマやN2プラズマの有する配線パタ
ーン表面の活性化とクリーニング効果とを維持しつつ、
プラズマ中のイオンによるイオン衝撃に基づく配線パタ
ーン表面のヒロック形成や配線の熱的断線が防止され、
また膜質が柔らかで、ストレスマイグレーションを緩和
する作用を有し、第2層以降に形成される緻密な膜から
のストレス伝達が生じた場合にも、配線を機械的断線か
ら守ることができる。また、膜厚が薄いから、配線頂面
に堆積した膜の横方向張り出しが小さく、配線側壁の膜
は溝底面の膜とさほど差異のない膜質を有し、両者の間
には不連続線が発生しにくくなり、以後のエツチング時
の配線侵蝕が起こりにくくなる。
When the insulating film is formed under the above film forming conditions, the insulating film constituting the first layer is formed using a low RF power of 0~200W, so the activation of the wiring pattern surface that 0□ plasma or N2 plasma has While maintaining the cleaning effect,
Hillock formation on the wiring pattern surface and thermal disconnection of the wiring due to ion bombardment by ions in the plasma are prevented.
In addition, the film is soft and has the effect of mitigating stress migration, and can protect the wiring from mechanical disconnection even if stress transfer occurs from the dense film formed in the second layer or later. In addition, since the film is thin, the lateral overhang of the film deposited on the top surface of the wiring is small, and the film on the side wall of the wiring has a film quality that is not much different from the film on the bottom of the trench, and there is a discontinuous line between the two. This makes it less likely that wiring will be eroded during subsequent etching.

第2層はRFパワーを大きくして形成されるから、緻密
な、所望の特性を有する。膜厚、膜質の均一な絶縁膜と
して形成される。
Since the second layer is formed with increased RF power, it has precise and desired characteristics. It is formed as an insulating film with uniform thickness and quality.

第3層はRFパワーを大きくするとともに、プラズマ生
成室に計ガスを追加供給して形成されるから、Arプラ
ズマの強いエツチング作用により、第1図fc)のよう
に、電界強度の強い配線頂面端部に面してテーパ状に第
2層をエツチングしながら成膜が進行する。このとき溝
底面の電界強度は配線頂面より小さいから膜の成長速度
が頂面より速く、RFパワーを適宜の大きさに制御する
ことより、溝を埋めながら平坦な膜を形成することがで
きる。
The third layer is formed by increasing the RF power and supplying additional measuring gas to the plasma generation chamber, so the strong etching action of the Ar plasma etches the top of the wiring where the electric field is strong, as shown in Figure 1 fc). Film formation progresses while etching the second layer in a tapered shape facing the edge of the surface. At this time, the electric field strength at the bottom of the trench is smaller than that at the top of the wiring, so the film grows faster than at the top, and by controlling the RF power to an appropriate level, it is possible to form a flat film while filling the trench. .

第2図は、第1図の場合と同一成膜条件とし、各層を同
一組成の膜とした場合の絶縁膜の構造を示すものであり
、同図(alは2層形成後の絶縁膜20の段差被膜の断
面を、また同図(C)は段差被膜の頂面端部をエツチン
グしながら段差被膜の溝を埋めて平坦化した絶縁膜21
の断面を示す。
Figure 2 shows the structure of an insulating film when the film formation conditions are the same as in Figure 1, and each layer has the same composition. The cross-section of the step coating shown in FIG.
A cross section of is shown.

〔発明の効果〕〔Effect of the invention〕

以上に述べたように、本発明においては、基板上の配線
による凹凸表面に形成する平坦な絶縁膜を、各層が絶縁
膜からなる多層構造の絶縁膜とするとともに、その第1
層は試料台に供給するRFパワーを小さく、第2層以降
はRFパワーをより大きくして形成しかつ最終層はプラ
ズマ生成室に竹ガスを追加供給して形成する絶縁膜形成
方法で形成することとしたので、配線表面のヒロック形
成、配線の熱的1機械的な断線を防止しながら緻密な膜
を、プラズマ生成室に導入するガスの種類を順に変える
のみの単純な作業で形成させることができる。また、第
2層以降の高RFパワーにより膜厚1膜質の均一な段差
被膜が可能になるとともに、段差被膜につづく平坦化を
、プラズマ生成室にArガスを追加供給し、^rガスイ
オンの強いエツチング作用と、凹凸表面の電界の差によ
るエツチング速度の差とを利用して行うようにしたので
、能になった。
As described above, in the present invention, the flat insulating film formed on the uneven surface due to the wiring on the substrate is an insulating film with a multilayer structure in which each layer is an insulating film, and the first
The layers are formed using a low RF power supplied to the sample stage, the second and subsequent layers are formed using a higher RF power, and the final layer is formed by an insulating film formation method in which bamboo gas is additionally supplied to the plasma generation chamber. Therefore, we decided to form a dense film by simply changing the type of gas introduced into the plasma generation chamber while preventing hillock formation on the wiring surface and thermal and mechanical disconnection of the wiring. I can do it. In addition, the high RF power for the second and subsequent layers makes it possible to form a uniform step coating with a film thickness of 1, and the subsequent flattening of the step coating is achieved by additionally supplying Ar gas to the plasma generation chamber, and by increasing the amount of ^r gas ions. This method was made possible by utilizing the strong etching action and the difference in etching speed caused by the difference in electric field between the uneven surfaces.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の絶縁膜形成方法による絶縁膜形成の工
程を、絶縁膜を構成する各層絶縁膜が異なる組成を有す
る場合について示す説明図、第2図は本発明の絶縁膜形
成方法による絶縁膜形成の工程を、絶縁膜を構成する各
層絶縁膜が同一組成を有する場合につき、段差被膜完了
の段階(同図(a))と平坦化完了の段階(同図(b)
)とで示す説明図、第3図は本発明の絶縁膜形成方法が
適用されるECRプラズマCVD装置の構成例を示す縦
断面図、第4図は従来の絶縁膜形成方法を、絶縁膜をS
iN膜とした場合の段差被膜完了の段階(同図(a))
と平坦化途上の段階(同図(b))とで示す説明図であ
る。 4;励磁ソレノイド、5:プラズマ生成室、6:反応室
、9:基板、10:試料台、12:RF電源、15;第
1層膜(第1層)、16:第2層膜(第2層)、17:
第3層膜(最終層)、21:絶縁膜、第1 側 第2図
FIG. 1 is an explanatory diagram showing the process of forming an insulating film by the insulating film forming method of the present invention in the case where each layer of the insulating film constituting the insulating film has a different composition. The process of forming an insulating film is divided into the stage of completing the step coating ((a) in the same figure) and the stage of completing the flattening ((b) in the same figure) in the case where each layer of the insulating film constituting the insulating film has the same composition.
), FIG. 3 is a longitudinal sectional view showing an example of the configuration of an ECR plasma CVD apparatus to which the insulating film forming method of the present invention is applied, and FIG. 4 shows the conventional insulating film forming method. S
Stage of completion of step coating when using iN film (Figure (a))
FIG. 4 is an explanatory diagram showing a stage in the middle of planarization (FIG. 3(b)). 4: Excitation solenoid, 5: Plasma generation chamber, 6: Reaction chamber, 9: Substrate, 10: Sample stage, 12: RF power supply, 15: First layer film (first layer), 16: Second layer film (first layer). 2 layers), 17:
3rd layer film (final layer), 21: Insulating film, 1st side Fig. 2

Claims (1)

【特許請求の範囲】[Claims] 1)マイクロ波が導入されるとともに励磁ソレノイドに
よりほぼ同軸に包囲され、導入されたガスをマイクロ波
と励磁ソレノイドが作る磁界との共鳴効果によりプラズ
マ化するプラズマ生成室と、該プラズマ生成室と連通し
内部に基板が載置される試料台を備えた反応室と、該試
料台にRFパワーを供給するRF電源とを備えたECR
プラズマCVD装置を用い、試料台にRFパワーを供給
しつつ反応室に導入された反応性ガスを前記プラズマ室
から励磁ソレノイドが作る磁力線に沿って反応室へ移動
するプラズマで活性化して、基板表面の配線等による凹
凸表面に平坦な絶縁膜を形成する際の該絶縁膜の形成方
法であって、該絶縁膜を、各層が絶縁膜からなる多層構
造の絶縁膜とするとともに、その第1層は試料台に供給
するRFパワーを小さく、第2層以降はRFパワーをよ
り大きくして形成しかつ最終層はプラズマ生成室にAr
ガスを追加供給して形成することを特徴とする絶縁膜の
形成方法。
1) A plasma generation chamber into which microwaves are introduced and surrounded almost coaxially by an excitation solenoid, and where the introduced gas is turned into plasma by the resonance effect of the microwaves and the magnetic field created by the excitation solenoid, which communicates with the plasma generation chamber. An ECR equipped with a reaction chamber equipped with a sample stage on which a substrate is placed, and an RF power source that supplies RF power to the sample stage.
Using a plasma CVD device, while supplying RF power to the sample stage, the reactive gas introduced into the reaction chamber is activated by plasma that moves from the plasma chamber to the reaction chamber along the magnetic field lines created by the excitation solenoid, and the substrate surface is A method for forming a flat insulating film on an uneven surface due to wiring, etc., wherein the insulating film is a multilayered insulating film in which each layer is an insulating film, and the first layer is The RF power supplied to the sample stage is small, the second and subsequent layers are formed with a larger RF power, and the final layer is formed using Ar in the plasma generation chamber.
A method for forming an insulating film, the method comprising forming an insulating film by additionally supplying a gas.
JP13070390A 1990-05-21 1990-05-21 Method of forming insulating film Expired - Fee Related JP2819774B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13070390A JP2819774B2 (en) 1990-05-21 1990-05-21 Method of forming insulating film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13070390A JP2819774B2 (en) 1990-05-21 1990-05-21 Method of forming insulating film

Publications (2)

Publication Number Publication Date
JPH0425128A true JPH0425128A (en) 1992-01-28
JP2819774B2 JP2819774B2 (en) 1998-11-05

Family

ID=15040603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13070390A Expired - Fee Related JP2819774B2 (en) 1990-05-21 1990-05-21 Method of forming insulating film

Country Status (1)

Country Link
JP (1) JP2819774B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05299581A (en) * 1992-04-20 1993-11-12 Nippon Telegr & Teleph Corp <Ntt> Manufacture of capacitor element
JPH05299582A (en) * 1992-04-20 1993-11-12 Nippon Telegr & Teleph Corp <Ntt> Capacitor element

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4887802B2 (en) 2006-01-26 2012-02-29 富士通セミコンダクター株式会社 Semiconductor device and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05299581A (en) * 1992-04-20 1993-11-12 Nippon Telegr & Teleph Corp <Ntt> Manufacture of capacitor element
JPH05299582A (en) * 1992-04-20 1993-11-12 Nippon Telegr & Teleph Corp <Ntt> Capacitor element

Also Published As

Publication number Publication date
JP2819774B2 (en) 1998-11-05

Similar Documents

Publication Publication Date Title
JP3141827B2 (en) Method for manufacturing semiconductor device
EP0478174B1 (en) Silicon dioxide deposition method
US20030008492A1 (en) Method for fabricating semiconductor device and forming interlayer dielectric film using high-density plasma
US20020052119A1 (en) In-situ flowing bpsg gap fill process using hdp
US6982207B2 (en) Methods for filling high aspect ratio trenches in semiconductor layers
TW201826388A (en) Deposition apparatus and deposition method
KR100433727B1 (en) Semiconductor device and its production method
JP3527474B2 (en) Method of forming silicon dioxide layer and method of forming trench isolation region
JP2803304B2 (en) Method for manufacturing semiconductor device having insulating film
JPH0425128A (en) Formation of insulating film
JP2003059918A (en) Method and apparatus for plasma treatment and manufacturing method for semiconductor device
JPH06232113A (en) Method for depositing insulating film for semiconductor device
KR102426960B1 (en) Method for forming silicon oxide film using plasmas
US6468603B1 (en) Plasma film forming method utilizing varying bias electric power
JPH03247767A (en) Formation of insulating film
JPH01194325A (en) Dry-etching
JPH05129276A (en) Manufacture of insulating film
JP2913672B2 (en) Insulating film formation method
JP2916119B2 (en) Thin film formation method
US6806165B1 (en) Isolation trench fill process
JPH08330293A (en) Formation method of insulation film and plasma chemical vapor deposition device used for the method
JPH11220024A (en) Method and device for manufacturing semiconductor integrated circuit
KR19990055156A (en) Method of forming device isolation film in semiconductor device
JPH04329637A (en) Manufacture of insulating film
KR20000074692A (en) Method of forming interlayer dielectric layer using high density plasma oxide in semiconductor device

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees