JPH03247767A - Formation of insulating film - Google Patents

Formation of insulating film

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Publication number
JPH03247767A
JPH03247767A JP4501290A JP4501290A JPH03247767A JP H03247767 A JPH03247767 A JP H03247767A JP 4501290 A JP4501290 A JP 4501290A JP 4501290 A JP4501290 A JP 4501290A JP H03247767 A JPH03247767 A JP H03247767A
Authority
JP
Japan
Prior art keywords
film
gas
microwave
insulating film
plasma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4501290A
Other languages
Japanese (ja)
Inventor
Akio Shimizu
清水 明夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP4501290A priority Critical patent/JPH03247767A/en
Publication of JPH03247767A publication Critical patent/JPH03247767A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE:To efficiently form an insulating film on the surface of a substrate having steep level-difference parts, in an ECR plasma CVD apparatus, by introducing a plasma raw material gas, a reactive gas and an inert gas into a vacuum vessel and specifying the frequency and power of an RF bias. CONSTITUTION:An SiO film having about 2000Angstrom thickness is formed on an Si substrate, on which a pattern with an Al step structure is formed. Next, an N2 gas and silane are fed to the inside of a vacuum vessel of an ECR plasma CVD apparatus, and by using a microwave and RF power of about <=200W with about 13.56MHz frequency, an SiN film having about 1000Angstrom thickness is formed (b). Then, N2, silane and an Ar gas are fed thereto, and by using a microwave and RF (of about 50W and about 40.68MHz), an Si film having about 1mu thickness is formed and the space is filled up (c). After that, only an Ar gas is fed thereto, and by using a low power micro wave and high power RF of about 500W, projected parts are cut to flatten (d). Furthermore, N2 and silane are fed thereto, and by using microwave and RF (of about 13.56MHz and about <=200W), an SiN film having a desired thickness is formed (e).

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、LSI(大規模集積回路)製造装置に代表
される半導体製造装置のなかで、特に低温成膜を必要と
する超LSI半導体素子1例えばDRAMの製造に用い
られるECRプラズマc■D装置を用い、配線側面など
のように急峻な段差部を有する半導体基板の表面に絶縁
膜、特にシリコン窒化膜を効率よく形成する方法に関す
る。
[Detailed Description of the Invention] [Field of Industrial Application] This invention is particularly applicable to semiconductor manufacturing equipment such as LSI (Large Scale Integrated Circuit) manufacturing equipment, especially for ultra-LSI semiconductor devices that require low-temperature film formation. 1. This invention relates to a method for efficiently forming an insulating film, particularly a silicon nitride film, on the surface of a semiconductor substrate having a steep step, such as a side surface of a wiring, using an ECR plasma cD device used, for example, in the manufacture of DRAM.

〔従来の技術〕[Conventional technology]

まず、超LSI半導体素子の製造に用いられるECRプ
ラズマCVD装置の構成につきその概要を説明する。
First, an outline of the configuration of an ECR plasma CVD apparatus used for manufacturing VLSI semiconductor devices will be explained.

第8図に従来から用いられているECRプラズマCVD
装置の構成例を示す。図示されないマイクロ波発生手段
により発生された2周波数が2.45GHzのマイクロ
波がマイクロ波の伝達手段である導波管11の内側を通
り、誘電体板からなるマイクロ波窓12を介して真空に
保たれたプラズマチャンバ13a内に導入され、この導
入されたマイクロ波と、プラズマチャンバ13aを同軸
に包囲する主ソレノイド14が発生する磁力線との電子
サイクロトロン共鳴効果により、ガス供給手段17を介
して送入されたAr、 O□、 N2などのプラズマ原
料ガスが高効率でプラズマ化され、プラズマチャンバ1
3a内に低真空度で高密度のプラズマが生成される。こ
のプラズマは、主ソレノイドが発生する磁力線の低磁束
密度方向へ磁力線に沿い開口13cを通って薄膜が形成
される基板20へ向かう。一方、基板20が配される処
理室13b内には、周方向に間隔をおいて複数のガス放
出口が形成された。断面円形の中空部材からなる円環状
のガスリング22aが配され、このガスリング22a内
へ処理室13bの外部から導入管路22bを介してSi
H,等の反応性ガスが送入される。この送入された反応
性ガスはガスリング22aのガス放出口からプラズマの
移送路へ放出されてプラズマにより活性化され、基板の
加熱を必要と廿ず良質の薄膜が高速度に基板表面に生成
される。しかし、この薄膜は、基板の直径が大きくなる
と膜厚分布の均一性が悪くなるため、処理室13bの底
面近傍に補助ソレノイド18を基板と同軸に配し、この
補助ソレノイド18が発生ずる磁力線を主ソレノイド1
4の磁力線に重畳させ、合成された磁力線に沿ってプラ
ズマが移送されるようにして基板面のプラズマ密度が均
一になるようにしている。また、基板20には、表面に
形成される薄膜の膜質を向上させるため、周波数が50
kHz〜数十M Hz 、通常は13.56MHzの高
周波電源いわゆるRF電源23から、プラズマと基板の
RF電源側とのインピーダンス整合を行うマツチング回
路を内蔵したマツチングボックス24を介し、RFバイ
アスが印加される。
Figure 8 shows the conventionally used ECR plasma CVD
An example of the configuration of the device is shown. Microwaves with two frequencies of 2.45 GHz generated by a microwave generation means (not shown) pass through the inside of a waveguide 11 which is a microwave transmission means, and enter a vacuum through a microwave window 12 made of a dielectric plate. The microwave is introduced into the maintained plasma chamber 13a, and is sent through the gas supply means 17 due to the electron cyclotron resonance effect between the introduced microwave and the magnetic field lines generated by the main solenoid 14 coaxially surrounding the plasma chamber 13a. The plasma source gases such as Ar, O□, and N2 introduced into the plasma chamber 1 are converted into plasma with high efficiency.
A high-density plasma is generated within the chamber 3a at a low degree of vacuum. This plasma passes through the opening 13c along the magnetic lines of force in the direction of low magnetic flux density of the lines of magnetic force generated by the main solenoid, and heads towards the substrate 20 on which the thin film is to be formed. On the other hand, a plurality of gas discharge ports were formed at intervals in the circumferential direction in the processing chamber 13b in which the substrate 20 was placed. An annular gas ring 22a made of a hollow member with a circular cross section is disposed, and Si is introduced into the gas ring 22a from the outside of the processing chamber 13b via an introduction pipe 22b.
A reactive gas such as H, etc. is introduced. The supplied reactive gas is discharged from the gas discharge port of the gas ring 22a to the plasma transfer path and is activated by the plasma, forming a high-quality thin film on the substrate surface at high speed without requiring heating of the substrate. be done. However, the uniformity of the film thickness distribution of this thin film deteriorates as the diameter of the substrate increases. Therefore, an auxiliary solenoid 18 is disposed coaxially with the substrate near the bottom of the processing chamber 13b, and the lines of magnetic force generated by this auxiliary solenoid 18 are Main solenoid 1
4, and the plasma is transported along the combined lines of magnetic force to make the plasma density on the substrate surface uniform. In addition, the substrate 20 has a frequency of 50 MHz to improve the quality of the thin film formed on the surface.
RF bias is applied from a high frequency power source (so-called RF power source) 23 of kHz to several tens of MHz, usually 13.56 MHz, via a matching box 24 containing a matching circuit that performs impedance matching between the plasma and the RF power source side of the substrate. be done.

このように構成されるECRプラズマCVD装置を用い
て配線側面などのようにステップ状の急峻な段差部を有
する基板表面に、絶縁膜としてシリコン窒化膜(以下で
はSiN膜と記す)を形成する場合の従来の成膜方法の
一例を以下に説明する。
When forming a silicon nitride film (hereinafter referred to as a SiN film) as an insulating film on the surface of a substrate having a steep stepped portion such as the side surface of a wiring using an ECR plasma CVD apparatus configured as described above. An example of a conventional film forming method will be described below.

なお、超LSI半導体素子における絶縁膜の形成にEC
RプラズマCVD装置のような、基板温度が200℃以
下での低温成膜が可能な装置を用いる理由は、それぞれ
絶縁膜の組成成分を有するプラズマ原料ガスと反応性ガ
スとを用いて基板表面に成膜を行う場合、基板表面に配
線側面のようなステップ状の段差があると、側面への成
膜が十分に行われないため、従来から行われているよう
に、基板自体を400℃程度まで加熱するなどの方法を
講した場合、配線用材料である金属薄膜との熱膨脹係数
の相違により、成膜後基板を室温に戻した時点で内部に
応力などを発生しやすく、これにより配線が断線するな
どの恐れが生じるためである。
Note that EC is used to form insulating films in VLSI semiconductor devices.
The reason for using a device capable of low-temperature film formation with a substrate temperature of 200°C or less, such as an R plasma CVD device, is to use a plasma raw material gas and a reactive gas, each of which has the compositional components of an insulating film, to form a film on the substrate surface. When forming a film, if there is a step-like difference in the surface of the substrate such as the side surface of the wiring, the film cannot be formed sufficiently on the side surface. If a method such as heating the substrate to a temperature of This is because there is a risk of wire breakage.

しかし、一方、ECRプラズマCVD装置を用いて絶縁
膜の低温成膜を行った場合、基板にはRFバイアスが印
加されているため、第4図(blに示すように、配線2
の頂面の絶縁膜が横方向へ張り出し、SiN膜形成のた
めにプラズマ原料ガスとして用いたN2ガスもしくはN
l+、ガスがプラズマ化されて生じた窒素イオンN“に
よるこの張出し部へのスパッタ除去効果が、従来広く用
いられているシリコン酸化膜 (SiO□膜、以下では
SiO膜と記す)に対する酸素イオンO゛のように大き
くないことから、このまま成膜をつづけると、絶縁膜が
第5図のように成長し、超LSIの製造において最も避
けなければならない現象の1つである。いわゆるボイド
を生ずることになる。
However, when an insulating film is formed at a low temperature using an ECR plasma CVD apparatus, an RF bias is applied to the substrate, so as shown in FIG.
The insulating film on the top surface of the SiN film protrudes laterally, and the N2 gas or N gas used as the plasma source gas to form the SiN film
The sputter removal effect of the nitrogen ions N'' generated by the plasma formation of the gas into plasma is the effect of the sputtering removal effect on the overhanging portion, which causes oxygen ions O to be removed from the silicon oxide film (SiO If the film continues to be formed as it is, the insulating film will grow as shown in Figure 5, which is one of the most important phenomena to avoid in the manufacturing of VLSIs. become.

て、さきに本発明者は以下のような方法を提案した (
特願平1−188194号参照)  この方法は、EC
RプラズマCVD装置の通常の操作により、それぞれ絶
縁膜の組成成分を有するプラズマ原料ガスと反応性ガス
とを用いて成膜を行い、段差部上端表面1例えば配線頂
面の絶縁膜が所定の膜厚に達した時点で成膜操作を停止
し、真空容器内のガスを計ガスなどの不活性ガスと入れ
替え、不活性ガスをプラズマ化して生じた陽イオンでス
パッタして、成膜された絶縁膜を段差部上端表面が露出
されない程度まで除去し、かつ前記絶縁膜が所定膜厚に
達する度毎にこのスパッタ工程を繰り返して、段差部、
特にサブミクロンオーダ幅の溝を十分開放状態として成
膜することにより、段差部に良好な膜質の絶縁膜を形成
させるものである。この成膜工程を第4図に示す。図に
おいて、+8+は段差部の形状例として高さ1幅1間隔
ともに約1nlの配線の断面を示し、(b)は陽イオン
でスパッタされる時点まで配線表面に成膜されたSiN
膜の付着状態を示す。また、同図(C)は、陽イオンで
スパッタされて配線頂面の横方向の張出しが除去される
とともに基板1の上面に堆積した絶縁膜3bもスパッタ
されて平坦化され、このスパッタによる絶縁膜物質が配
線側面に付着した状態を示す。
Therefore, the inventor proposed the following method (
(See Japanese Patent Application No. 1-188194) This method is
By normal operation of the R plasma CVD apparatus, film formation is performed using a plasma raw material gas and a reactive gas each having compositional components of an insulating film, and the insulating film on the upper end surface 1 of the stepped portion, for example, the top surface of the wiring, is formed into a predetermined film. When the thickness is reached, the film deposition operation is stopped, the gas in the vacuum container is replaced with an inert gas such as a metering gas, and the inert gas is turned into plasma and sputtered with positive ions, resulting in a thin film of insulation. The film is removed to such an extent that the upper surface of the stepped portion is not exposed, and this sputtering step is repeated each time the insulating film reaches a predetermined thickness, thereby removing the stepped portion,
In particular, by forming the film with grooves of submicron order width sufficiently open, an insulating film of good quality can be formed in the step portion. This film forming process is shown in FIG. In the figure, +8+ indicates a cross section of a wiring with a height and width of 1 interval as an example of the shape of the stepped portion, and (b) shows a SiN film formed on the wiring surface up to the point where it is sputtered with cations.
Shows the adhesion state of the film. In addition, in the same figure (C), the lateral overhang of the top surface of the wiring is removed by sputtering with positive ions, and the insulating film 3b deposited on the top surface of the substrate 1 is also sputtered and flattened, and the insulation film 3b by this sputtering is This shows a state in which the film material is attached to the side surface of the wiring.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

このように、段差部表面への絶縁膜形成に際し、成膜工
程と陽イオンのスパッタによる段差部上端表面の絶縁膜
除去工程とを交互に繰返しつつ段差部全面に絶縁膜を形
成して行く方法では、両工程の切換えの度毎に真空容器
内のガスを入れ替える必要があり、プロセス時間が長く
なり、成膜プロセスのスループットが低いという問題が
あった。
In this way, when forming an insulating film on the surface of the stepped portion, the insulating film is formed over the entire surface of the stepped portion by alternately repeating the film formation process and the step of removing the insulating film on the top surface of the stepped portion by sputtering cations. In this case, it is necessary to replace the gas in the vacuum container each time the two steps are switched, which increases the process time and reduces the throughput of the film forming process.

そこで、陽イオン生成のための不活性ガスを、プラズマ
原料ガスと反応性ガスとからなる成膜原料ガスとともに
真空容器内に供給し、ステップ状段差の側壁と比べて膜
成長の速い段差部上端表面の絶縁膜を除去しつつ膜形成
を行う成膜方法をとろうとすると、不活性ガスとして通
常用いられる計ガスの場合、スパッタ効果が顕著になる
200〜500WのRFパワーを投入する必要があった
。一方、RFバイアスを印加したSiN膜形成のプロセ
スでは、RFパワーとともに成膜されたSiN膜内の応
力 (圧縮応力)が増加し、この応力が1010dyn
/cJ程度になると、膜が剥離したり、この応力でアル
ミ配線が切断したりするようになる。このような大きな
力を発生させるRFパワーは100〜200W以上であ
る。このため、成膜過程とArガスイオンAr”による
スパッタとを並行させつつ段差部を覆う平坦な絶縁膜を
形成することは不可能であった。
Therefore, an inert gas for cation generation is supplied into the vacuum container together with a film forming raw material gas consisting of a plasma raw material gas and a reactive gas. When attempting to use a film formation method that forms a film while removing the surface insulating film, it is necessary to input an RF power of 200 to 500 W, which causes a noticeable sputtering effect, if the metering gas is normally used as an inert gas. Ta. On the other hand, in the SiN film formation process with RF bias applied, the stress (compressive stress) in the formed SiN film increases with the RF power, and this stress increases to 1010 dyn.
/cJ, the film may peel off or the aluminum wiring may break due to this stress. The RF power that generates such a large force is 100 to 200 W or more. For this reason, it has been impossible to form a flat insulating film covering the stepped portion while performing the film formation process and the sputtering using Ar gas ions Ar'' in parallel.

この発明の目的は、RF電源を備えたECRプラズマC
VD装置を用いて基板表面の急峻な段差部に絶縁膜を形
成するに際し、段差部にダメージを与えることなく、か
つ形成される絶縁膜の所要膜質を保持しつつ大幅に成膜
時間が短縮される成膜方法を提供することである。
The purpose of this invention is to provide an ECR plasma C equipped with an RF power source.
When forming an insulating film on steep steps on the surface of a substrate using a VD system, the film formation time can be significantly shortened without damaging the steps and maintaining the required quality of the insulating film. An object of the present invention is to provide a film forming method that allows

〔課題を解決するための手段〕[Means to solve the problem]

上記課題を解決するために、この発明においては、RF
電源を備えたECRプラズマCVD装置を用いた絶縁膜
形成の方法を、それぞれ絶縁膜の組成成分を有するプラ
ズマ原料ガスと反応性ガスと、および不活性ガスとを前
記ECRプラズマCVD装置の真空容器内に導入すると
ともにRFバイアスの周波数を40MHz以上、RFバ
イアスのバワーを200 W以下として絶縁膜を形成す
る方法とするか、それぞれ絶縁膜の組成成分を有するプ
ラズマ原料ガスと反応性ガスとを前記ECRプラズマC
VD装置の真空容器内に導入するとともにRFバイアス
の周波数をI MHz以下、RFバイアスのパワーを2
00W以下として絶縁膜を形成する方法とするものとす
る。
In order to solve the above problems, in this invention, RF
A method for forming an insulating film using an ECR plasma CVD apparatus equipped with a power source is described in which a plasma raw material gas, a reactive gas, and an inert gas each having compositional components of an insulating film are introduced into a vacuum chamber of the ECR plasma CVD apparatus. Alternatively, the plasma raw material gas and the reactive gas each having the composition of the insulating film may be formed using the ECR method. Plasma C
Introduced into the vacuum chamber of the VD device, the frequency of the RF bias was set to 1 MHz or less, and the power of the RF bias was set to 2 MHz.
The method is to form an insulating film with a power of 00W or less.

〔作用〕[Effect]

陽イオンによるスパッタ効率はスパッタレート5R(S
R:単位時間当りのスパッタ量)で表される。SRはR
Fバイアス電位をVDCI絶縁膜に入射される陽イオン
A゛によるイオン電流を1.とすると、陽イオンA+を
ArガスイオンAr+とした場合にはVnc”1000
 (v)の領域で、第3図に示すように、 S R” (VDCVth)”X I Aの関係がある
。ここでVthはスパッタ開始電圧であり、Ar”の場
合約20(V)である。この電圧以下のバイアス電位で
はスパッタは行われない。−方、膜の内部応力はRFパ
ワーvxI  (v:RF電源の出力電圧、I:RF電
源出力電流)に依存することが分っている。そこで、本
発明により、RFの周波数を40MHz以上とすると、
陽イオンの移動度の周波数特性により、RFバイアス電
位VOCが通常のRF周波数13.56M1(zの場合
と比較して有意差を示す大きさとなり、スパッタレート
SRが−F式に従って大きくなる。すなわち、RFパワ
ー(vxBを一定に保持した状態で (VDCVth)
2×IAを大きくすることができるから、膜の応力を大
きくすることなく効果的に陽イオンによるスパッタが行
われ、第2図fb)に示すように、配線頂面に成長した
絶縁膜の横方向張出しの除去と下地層 (SiO膜)に
堆積した絶縁膜のスパッタによる配線側面への付着とが
同時に進行し、配線間の溝が埋まるまで同図(alのよ
うな状態、すなわち配線間の溝が常時開放された状態で
成膜が進行する。
The sputtering efficiency using cations is the sputtering rate 5R (S
R: amount of sputtering per unit time). SR is R
The ion current due to positive ions A' incident on the VDCI insulating film is set to 1. Then, when the cation A+ is Ar gas ion Ar+, Vnc"1000
In the region (v), as shown in FIG. 3, there is a relationship of SR"(VDCVth)"XIA. Here, Vth is the sputtering starting voltage, which is approximately 20 (V) in the case of Ar''. Sputtering is not performed at a bias potential below this voltage. It is known that it depends on the output voltage of the power supply (I: RF power supply output current).Therefore, according to the present invention, if the RF frequency is set to 40MHz or more,
Due to the frequency characteristics of cation mobility, the RF bias potential VOC has a significant difference compared to the normal RF frequency of 13.56M1 (z), and the sputtering rate SR increases according to the -F equation. , RF power (with vxB held constant (VDCVth)
Since 2×IA can be increased, cation sputtering can be performed effectively without increasing stress on the film, and as shown in Figure 2fb), the lateral side of the insulating film grown on the top surface of the wiring The removal of the directional overhang and the adhesion of the insulating film deposited on the underlying layer (SiO film) to the side surfaces of the wiring by sputtering proceed simultaneously, until the grooves between the wirings are filled (in the state shown in the figure (al), i.e., the state between the wirings is Film formation progresses with the grooves always open.

また、一方、本発明により、RFバイアスの周波数をI
 MHz以下に低下させると、プラズマ原料ガスとして
用いられたN2ガスあるいはNH,ガスのプラズマ化に
より生じた窒素イオンN1の移動度の周波数特性により
、N゛によるイオン電流が大きくなり、第7図(1))
に示すよ・うに、基板表面に低エネルギーのN′が従来
(同図(a))と比べより多く降り注ぎ、従来不十分で
あった1段差部側壁へのN゛の入射量が多くなり、側壁
および段差部下端表面への膜の付着が増して第6図のよ
うな状態で絶縁膜の形成が進行するようになる。そして
、側壁や段差部下端表面に付着した膜に対してもイオン
衝撃効果が十分に発揮されて膜が緻密になる。
On the other hand, according to the present invention, the frequency of the RF bias can be changed to I
When the frequency is lowered to below MHz, the ion current due to N increases due to the frequency characteristics of the mobility of nitrogen ions N1 generated by plasma generation of N2 gas or NH gas used as plasma source gas, and as shown in Fig. 7 ( 1))
As shown in Figure 2, more low-energy N' falls on the substrate surface compared to the conventional method ((a) in the same figure), and the amount of N' incident on the side wall of the first step, which was insufficient in the past, increases. The adhesion of the film to the side walls and the bottom surface of the step increases, and the formation of the insulating film progresses as shown in FIG. Further, the ion bombardment effect is sufficiently exerted on the film attached to the side wall and the lower end surface of the step, and the film becomes dense.

すなわち、RFの周波数をI MHz以下とすることに
より、RFパワーを増すことなく、従って膜の応力を増
すことなく、段差部を緻密な膜で被覆することができる
That is, by setting the RF frequency to I MHz or less, the stepped portion can be covered with a dense film without increasing the RF power and therefore without increasing the stress of the film.

〔実施例〕〔Example〕

本発明の第1の実施例として、RFの周波数を40MH
z以上とする場合の実施例を以下に示す。
As a first embodiment of the present invention, the RF frequency is set to 40MHz.
An example in which it is set to z or more will be shown below.

(1)ステップ状の段差をもつ半導体基板として、第1
図falのように、シリコン基板上に厚さ2000人に
SiO膜を積み、この上にアルミのステップ構造をもつ
テストパターンを形成する。このテストパターンのスケ
ールは、幅、高さ1間隔ともに約】IMである。
(1) As a semiconductor substrate with step-like steps, the first
As shown in Figure fal, a SiO film is deposited on a silicon substrate to a thickness of 2,000 mm, and a test pattern with an aluminum step structure is formed on this film. The scale of this test pattern is approximately 1 IM in width and height.

(2)最初の成膜段である第1成膜として、窒素ガスと
シランとをECRプラズマCVD装置の真空容器内に供
給し、マイクロ波と2周波数を通常用いられる13.5
6MHzとした。 200 W以下のRFパワーとを用
いて第1図(b)のように厚さ1000人程度にSiN
膜を形成する。 (最初から不活性ガスを導入するとア
ルミがスパッタされ基板にダメージを与えるからである
。) (3)第2成膜として、窒素とシランとArガスとを装
置の真空容器内に供給し、マイクロ波とRF(50W 
、 40.68MHz)とを用いて第1図(C) (7
)ように厚さ1−程度のSiN膜を成膜して間隔を埋め
る。
(2) For the first film formation, which is the first stage of film formation, nitrogen gas and silane are supplied into the vacuum chamber of the ECR plasma CVD apparatus, and microwaves and two frequencies of 13.5
The frequency was set to 6MHz. Using an RF power of 200 W or less, SiN is deposited to a thickness of approximately 1000 mm as shown in Figure 1 (b).
Forms a film. (If an inert gas is introduced from the beginning, aluminum will be sputtered and the substrate will be damaged.) (3) For the second film formation, nitrogen, silane, and Ar gas are supplied into the vacuum chamber of the device, and the micro Waves and RF (50W
, 40.68MHz) in Figure 1(C) (7
), a SiN film with a thickness of about 1-100 mm is formed to fill the gap.

なお、図の■、■、■はSiN膜の成長状態を示す、適
宜の時点ごとの絶縁膜表面の形状を示す線である。
Note that ■, ■, and ■ in the figure are lines that indicate the growth state of the SiN film and indicate the shape of the insulating film surface at appropriate times.

(4)第3成膜として、Arガスのみを真空容器内に供
給し、低パワーのマイクロ波と500Wの高パワーRF
とを用いてAr”によるスパッタのみを行い、第1図+
81のように突起部分を削り平坦化する。
(4) For the third film formation, only Ar gas is supplied into the vacuum chamber, and low power microwave and 500W high power RF are used.
Sputtering only with Ar'' was performed using
The protruding portion is shaved and flattened as shown in 81.

(5)最終成膜として窒素とシランとを真空容器内に供
給し、マイクロ波と2周波数が13.56MHzでパワ
ーが200W以下のRFとを用いて第1図(e)のよう
に所望の膜厚までSiN膜を成膜する。
(5) For the final film formation, nitrogen and silane are supplied into a vacuum container, and the desired film is formed using microwaves and RF with two frequencies of 13.56 MHz and a power of 200 W or less as shown in Figure 1(e). A SiN film is formed to a certain thickness.

本発明の第2の実施例として、RFの周波数をI MH
z以下とする場合の実施例を以下に示す。
As a second embodiment of the present invention, the RF frequency is set to I MH
An example in which it is less than or equal to z is shown below.

(1)ステップ状の段差をもつ半導体基板として、第1
図+81のように、シリコン基板上に厚さ2000人に
SfO膜を積み、この上にアルミのステップ構造をもつ
テストパターンを形成する。このテストパターンのスケ
ールは、幅、高さ1間隔ともに約1−である。
(1) As a semiconductor substrate with step-like steps, the first
As shown in Figure 81, an SfO film with a thickness of 2000 mm is deposited on a silicon substrate, and a test pattern with an aluminum step structure is formed on this film. The scale of this test pattern is approximately 1- in both width and height.

(2)窒素ガ、7.  (30SCCM、 SCCMは
標準状態:o’c。
(2) Nitrogen moth, 7. (30SCCM, SCCM is standard condition: o'c.

大気圧に換算したガスの流量(cm3/m1n))とシ
ラ7 (283CCM)とをECRプラズ7CVD装置
の真空容器内に供給し、マイクロ波(800W、2.4
5GHz)とRF  (50W、200kHz)とをか
けてSiN膜を形成する。
Gas flow rate (cm3/m1n) converted to atmospheric pressure) and Shira 7 (283 CCM) were supplied into the vacuum container of the ECR Plas 7 CVD equipment, and microwaves (800 W, 2.4
5 GHz) and RF (50 W, 200 kHz) to form a SiN film.

〔発明の効果〕〔Effect of the invention〕

以上に述べたように、本発明においては、RF電源を備
えたECRプラズマCVD装置を用いた絶縁膜形成の方
法を、それぞれ絶縁膜の組成成分を有するプラズマ原料
ガスと反応性ガスと、および不活性ガスとを前記ECR
プラズマCVD装置の真空容器内に導入するとともにR
Fバイアスの周波数を40MHz以上、RFバイアスの
パワーを200W以下として絶縁膜を形成する方法とす
るか、それぞれ絶縁膜の組成成分を有するプラズマ原料
ガスと反応性ガスとを前記ECRプラズマCVD装置の
真空容器内に導入するとともにRFバイアスの周波数を
1旧12以下、RFバイアスのパワーを200W以下と
して絶縁膜を形成する方法とすることとしたので、RF
バイアスの周波数を40MHz以上とする前者の方法に
よる場合には、成膜過程とスパッタ過程とを並行して進
行させることができ、絶縁膜形成に要する時間が大幅に
短縮される。
As described above, in the present invention, a method for forming an insulating film using an ECR plasma CVD apparatus equipped with an RF power supply is performed using a plasma raw material gas, a reactive gas, and a non-containing gas, each having a compositional component of an insulating film. The active gas and the ECR
Introduced into the vacuum chamber of plasma CVD equipment and R
Either the insulating film is formed using an F bias frequency of 40 MHz or more and an RF bias power of 200 W or less, or a plasma source gas and a reactive gas each having a composition of an insulating film are placed in the vacuum of the ECR plasma CVD apparatus. We decided to form an insulating film by introducing the RF into the container, setting the frequency of the RF bias to 1 to 12 or less, and the power of the RF bias to 200 W or less.
In the case of the former method in which the bias frequency is set to 40 MHz or more, the film formation process and the sputtering process can proceed in parallel, and the time required to form the insulating film is significantly shortened.

また、このSiN膜の平坦化プロセスが実用可能となり
、従来DRAM製造過程で特にLSIの眉間絶縁膜とし
て使用されていたSiO膜あるいはPSG膜(燐ガラス
膜)を、耐湿性、絶縁性のすぐれたSiN膜に置き換え
ることができるようになった。
In addition, this SiN film planarization process has become practical, and the SiO film or PSG film (phosphorous glass film), which was previously used as an insulating film between the eyebrows of LSI in the DRAM manufacturing process, has been improved with excellent moisture resistance and insulation properties. It is now possible to replace it with a SiN film.

これによってLSIの信顧性を従来と比べて向上させる
ことができる。
As a result, the reliability of LSI can be improved compared to the past.

また、RFバイアスの周波数をI MHz以下とする後
者の方法による場合には、従来LSIの最終保護膜とし
てSiN膜を用いる場合、このSiN膜の形成を高温処
理か、複数のプロセスの組合わせにより行っていたのが
低温でしかも単一プロセスで容易にかつ短時間で可能と
なる。従ってこの方法によりSiN膜を形成することに
より、デバイスを水分の侵入や不純物から守り、デバイ
スの信較性向上、長寿命化1電気特性の安定化を図るこ
とが容易に可能になった。
In addition, in the case of the latter method in which the frequency of the RF bias is set to I MHz or less, when a SiN film is conventionally used as the final protective film of an LSI, the formation of this SiN film is performed by high-temperature treatment or by a combination of multiple processes. This can now be done easily and in a short time using a single process at low temperatures. Therefore, by forming a SiN film using this method, it has become possible to easily protect the device from moisture intrusion and impurities, improve the reliability of the device, extend its lifespan, and stabilize its electrical characteristics.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第1の絶縁膜形成方法の実施例による
成膜プロセスの各ステップを示す説明図、第2図は本発
明の第1の絶縁膜形成方法の原理を説明する図であって
、同図(blはArガスイオンのスパッタ作用を示す説
明図、同図(a)はArガスイオンのスパック効果を示
す説明図、第3図はRFバイアス電位(Vnc)と1原
子当りのスパッタ率(SR)との関係を示す線図、第4
図は従来の絶縁膜形成方法の一例を、成膜プロセスの各
ステップで示す説明図、第5図はシリコン窒化膜をシリ
コン酸化膜と同様の方法で形成したときに生じるボイド
の発生理由を説明する断面図、第6図は本発明の第2の
絶縁膜形成方法によって形成される絶縁膜の状態を示す
断面図、第7図は本発明の第2の絶縁膜形成方法の原理
を従来方法の原理と対比して説明する図であって、同図
(al、0)lはそれぞれ従来および本発明の絶縁膜形
成方法の原理を示す説明図、第8図は本発明の絶縁膜形
成方法による絶縁膜形成に用いられるECRプラズマC
VD装置の構成例を示す断面図である。 1:基板(半導体基板) 2:配線、3.103:シリ
コン窒化膜、11:導波管(マイクロ波伝達手段)、1
3:真空容器、14:主ソレノイド、17:ガス供給手
段、1日:補助ソレノイド、20:基板、22 : ガス供給手段、 23 : RF電源。 9 八乙 (0) (b) 第2図
FIG. 1 is an explanatory diagram showing each step of the film forming process according to an embodiment of the first insulating film forming method of the present invention, and FIG. 2 is a diagram explaining the principle of the first insulating film forming method of the present invention. In the same figure (bl is an explanatory diagram showing the sputtering effect of Ar gas ions, Figure (a) is an explanatory diagram showing the spuck effect of Ar gas ions, and Figure 3 is an explanatory diagram showing the sputtering effect of Ar gas ions. Figure 3 shows the relationship between RF bias potential (Vnc) and per atom 4th diagram showing the relationship between sputtering rate (SR) and sputtering rate (SR)
The figure is an explanatory diagram showing an example of a conventional insulating film forming method, showing each step of the film forming process. Figure 5 explains the reason why voids occur when a silicon nitride film is formed using the same method as a silicon oxide film. 6 is a cross-sectional view showing the state of an insulating film formed by the second insulating film forming method of the present invention, and FIG. 7 is a sectional view showing the principle of the second insulating film forming method of the present invention compared to the conventional method. FIG. 8 is an explanatory diagram showing the principle of the conventional insulating film forming method and the present invention, respectively, and FIG. 8 is an explanatory diagram showing the principle of the insulating film forming method of the present invention, respectively. ECR plasma C used for insulating film formation by
FIG. 2 is a cross-sectional view showing a configuration example of a VD device. 1: Substrate (semiconductor substrate) 2: Wiring, 3.103: Silicon nitride film, 11: Waveguide (microwave transmission means), 1
3: Vacuum vessel, 14: Main solenoid, 17: Gas supply means, 1st: Auxiliary solenoid, 20: Board, 22: Gas supply means, 23: RF power supply. 9 Yaotsu (0) (b) Figure 2

Claims (1)

【特許請求の範囲】 1)マイクロ波発生手段と、このマイクロ波を伝達する
手段と、このマイクロ波伝達手段と結合されてマイクロ
波が導入されかつガス供給手段を介して送入されたプラ
ズマ原料ガスを該マイクロ波との共鳴効果によりプラズ
マ化する磁力線を発生する主ソレノイドにより同軸に包
囲されるとともに該主ソレノイドが発生した磁力線の低
磁束密度方向へ磁力線に沿って移送されるプラズマによ
り該移送路に導入された反応性ガスが活性化されて表面
に薄膜が形成される基板が配される真空容器と、この真
空容器と同軸に配され前記移送路を構成する主ソレノイ
ドの磁力線に作用して基板位置でプラズマ密度が均一と
なるように移送路を制御する磁力線を発生する補助ソレ
ノイドと、前記基板にRFバイアスを印加するためのR
F電源と、を備えたECRプラズマCVD装置を用いて
急峻な段差部を有する半導体基板の表面にシリコン窒化
膜などの絶縁膜を形成する方法において、それぞれ絶縁
膜の組成成分を有するプラズマ原料ガスと反応性ガスと
、および不活性ガスとを前記ECRプラズマCVD装置
の真空容器内に導入するとともにRFバイアスの周波数
を40MHz以上,RFバイアスのパワーを200W以
下として絶縁膜を形成することを特徴とする絶縁膜形成
方法。 2)マイクロ波発生手段と、このマイクロ波を伝達する
手段と、このマイクロ波伝達手段と結合されてマイクロ
波が導入されかつガス供給手段を介して送入されたプラ
ズマ原料ガスを該マイクロ波との共鳴効果によりプラズ
マ化する磁力線を発生する主ソレノイドにより同軸に包
囲されるとともに該主ソレノイドが発生した磁力線の低
磁束密度方向へ磁力線に沿って移送されるプラズマによ
り該移送路に導入された反応性ガスが活性化されて表面
に薄膜が形成される基板が配される真空容器と、この真
空容器と同軸に配され前記移送路を構成する主ソレノイ
ドの磁力線に作用して基板位置でプラズマ密度が均一と
なるように移送路を制御する磁力線を発生する補助ソレ
ノイドと、前記基板にRFバイアスを印加するためのR
F電源と、を備えたECRプラズマCVD装置を用いて
急峻な段差部を有する半導体基板の表面にシリコン窒化
膜などの絶縁膜を形成する方法において、それぞれ絶縁
膜の組成成分を有するプラズマ原料ガスと反応性ガスと
を前記ECRプラズマCVD装置の真空容器内に導入す
るとともにRFバイアスの周波数を1MHz以下,RF
バイアスのパワーを200W以下として絶縁膜を形成す
ることを特徴とする絶縁膜形成方法。
[Claims] 1) A microwave generating means, a means for transmitting the microwave, and a plasma raw material coupled to the microwave transmitting means to which the microwave is introduced and fed via the gas supply means. The main solenoid is coaxially surrounded by a main solenoid that generates magnetic lines of force that turn gas into plasma due to the resonance effect with the microwave, and the plasma is transferred along the lines of magnetic force in the direction of low magnetic flux density of the lines of magnetic force generated by the main solenoid. The reactive gas introduced into the passageway is activated and acts on the magnetic lines of force of a vacuum vessel in which a substrate is placed, on which a thin film is formed, and a main solenoid that is arranged coaxially with the vacuum vessel and constitutes the transfer passageway. an auxiliary solenoid that generates magnetic lines of force to control the transfer path so that the plasma density is uniform at the substrate position, and an R for applying an RF bias to the substrate.
In a method of forming an insulating film such as a silicon nitride film on the surface of a semiconductor substrate having a steep step using an ECR plasma CVD apparatus equipped with an F power source and A reactive gas and an inert gas are introduced into the vacuum chamber of the ECR plasma CVD apparatus, and an insulating film is formed by setting the frequency of the RF bias to 40 MHz or more and the power of the RF bias to 200 W or less. Insulating film formation method. 2) A microwave generating means, a means for transmitting the microwave, and a plasma source gas coupled to the microwave transmitting means to which the microwave is introduced and fed through the gas supply means with the microwave. The reaction introduced into the transfer path by the plasma coaxially surrounded by the main solenoid that generates magnetic lines of force that turn into plasma due to the resonance effect of Plasma is generated at the substrate position by acting on the magnetic field lines of the main solenoid, which is arranged coaxially with the vacuum container and which constitutes the transfer path. an auxiliary solenoid that generates magnetic lines of force to control the transfer path so that the density is uniform, and an R for applying an RF bias to the substrate.
In a method of forming an insulating film such as a silicon nitride film on the surface of a semiconductor substrate having a steep step using an ECR plasma CVD apparatus equipped with an F power source and A reactive gas is introduced into the vacuum chamber of the ECR plasma CVD apparatus, and the frequency of the RF bias is set to 1 MHz or less.
A method for forming an insulating film, characterized in that the insulating film is formed with a bias power of 200 W or less.
JP4501290A 1990-02-26 1990-02-26 Formation of insulating film Pending JPH03247767A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4501290A JPH03247767A (en) 1990-02-26 1990-02-26 Formation of insulating film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4501290A JPH03247767A (en) 1990-02-26 1990-02-26 Formation of insulating film

Publications (1)

Publication Number Publication Date
JPH03247767A true JPH03247767A (en) 1991-11-05

Family

ID=12707450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4501290A Pending JPH03247767A (en) 1990-02-26 1990-02-26 Formation of insulating film

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Country Link
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100421767B1 (en) * 1999-12-27 2004-03-11 세이코 엡슨 가부시키가이샤 A method to fabricate thin insulating films
KR100440264B1 (en) * 1997-12-30 2004-09-18 주식회사 하이닉스반도체 Method for fabricating semiconductor device to prevent lower metal interconnection from being physically etched when interlayer dielectric is deposited by high density plasma method
KR100547242B1 (en) * 1999-12-22 2006-02-01 주식회사 하이닉스반도체 A method of forming intermetal dielectric layer for preventing void
JP2006041589A (en) * 2004-07-22 2006-02-09 Matsushita Electric Ind Co Ltd Surface acoustic wave device and manufacturing method thereof
JP2006517343A (en) * 2003-01-17 2006-07-20 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド MOSFET device having tensile strained substrate and method of making the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100440264B1 (en) * 1997-12-30 2004-09-18 주식회사 하이닉스반도체 Method for fabricating semiconductor device to prevent lower metal interconnection from being physically etched when interlayer dielectric is deposited by high density plasma method
KR100547242B1 (en) * 1999-12-22 2006-02-01 주식회사 하이닉스반도체 A method of forming intermetal dielectric layer for preventing void
KR100421767B1 (en) * 1999-12-27 2004-03-11 세이코 엡슨 가부시키가이샤 A method to fabricate thin insulating films
JP2006517343A (en) * 2003-01-17 2006-07-20 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド MOSFET device having tensile strained substrate and method of making the same
JP2006041589A (en) * 2004-07-22 2006-02-09 Matsushita Electric Ind Co Ltd Surface acoustic wave device and manufacturing method thereof

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