JPH04248470A - Trigger signal generation circuit - Google Patents

Abstract

PURPOSE:To enable a trigger signal to be extracted from an input signal. CONSTITUTION:An input signal and a signal of a reference voltage generation circuit 4 are compared by a comparator 2 and a trigger signal is generated. The generated trigger signal is used to generate a one-shot pulse by a one-shot circuit 6 and it is delayed for a specified amount of time by a delay circuit 7. On the other hand, a comparator 3 compares the input signal using a reference voltage generation circuit 5 and generates a level detection signal. A trigger signal is extracted by controlling a signal from the delay circuit 7 and that from the comparator 3 using a gate circuit 8.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit for electronic measurement, and more particularly to a trigger signal generating circuit used in an oscilloscope or the like.

0002

2. Description of the Related Art In a conventional trigger signal generation circuit used in an oscilloscope, the output signal of a comparator at one level is used as the trigger signal.

0003

In the conventional trigger signal generating circuit described above, the output signal of one level comparator is used as the trigger signal. For this reason, for example, from a signal formed by a plurality of signals with different amplitudes, the level c
When extracting a smaller trigger signal, level b
When set to , there was a problem in that a trigger signal containing an extra signal affected by a large amplitude signal was generated.

An object of the present invention is to eliminate such drawbacks and to provide a trigger signal generation system capable of extracting a trigger signal of a small amplitude signal from among a plurality of signals of different amplitudes without being affected by a signal of a large amplitude. The purpose is to provide circuits.

[0005]

[Means for Solving the Problems] A trigger signal generation circuit of the present invention includes a first comparator that compares an input signal with a first reference voltage and sends out a trigger signal, and a minute a one-shot circuit that sends out a one-shot pulse of time; a delay circuit that delays an output signal of the one-shot circuit; and a delay circuit that delays the output signal of the one-shot circuit; a second comparator that sends out a level detection signal when the level detection signal exceeds the level detection signal; and a gate circuit that controls the output signal of the delay circuit using the level detection signal and extracts a trigger signal.

[0006]

[Embodiment] Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 shows signal waveforms at each point a to g in FIG. This trigger signal generation circuit consists of comparators 2 and 3.
, reference voltage generation circuits 4 and 5, a one-shot circuit 6, a delay circuit 7, and a gate circuit 8. The signal input terminal 1 is connected to one end of the input terminal of the comparators 2 and 3, and the positive sides of the reference voltage generation circuits 4 and 5 are connected to the other ends of the input terminals of the comparators 2 and 3. The negative side of is grounded. The output terminal of the comparator 2 is connected to one end of the input terminal of the gate circuit 8 via the one-shot circuit 6 and the delay circuit 7, and the output terminal of the comparator 3 is directly connected to the other end of the input terminal of the gate circuit 8. , an output terminal of the gate circuit 8 is connected to a signal output terminal 9. In addition, in these circuits, one end of the input terminal of comparators 2 and 3 is point a,
The signal has a waveform as shown in a of FIG. With respect to this signal, the positive side of the reference voltage generation circuits 4 and 5, and
The other ends of the input terminals of the comparators 2 and 3 are points b and c, and the signals are as shown in b and c in FIG. 2. Similarly, point e is between the one-shot circuit 6 and delay circuit 7, point d is between the output terminal of comparator 3 and the input terminal of gate circuit 8, and point g is the output of gate circuit 8. The signal waveforms at each of these points are shown in e, d, and g of FIG.

Next, the operation of this embodiment will be explained with reference to FIGS. 1 and 2.
Explain with reference to. Let us assume that the signal input to terminal 1 is a, and from this signal a, a trigger signal synchronized with event x and event y is extracted. At this time, a comparison level signal b for detecting events x and y is set in the comparator 2 by the reference voltage generation circuit 4. Also, in order to differentiate other events from events x and y,
A comparison level signal c is set for the comparator 3 by the reference voltage generation circuit 5. The signal is then supplied to the respective comparators 2 and 3. The comparator 2 compares the input signal a and the reference signal b, outputs a comparison signal, and outputs the signal as a signal e shaped into a pulse with a minute time width by the one-shot circuit 6. Also, comparator 3
compares the reference signal c and the input signal a and outputs the level detection signal d.
Output. Here, the delay circuit 7 receives the above-mentioned signal e and delays the signal f by an appropriate time t so that the phase of the extra pulse of the signal e and the level detection signal match.
Output. The gate circuit 8 is controlled by the level detection signal d, and outputs a trigger signal g obtained by removing extra pulses from the signal f.

[0008]

[Effects of the Invention] As explained above, the present invention makes it possible to extract a trigger signal of a small amplitude signal from a signal composed of a plurality of signals of different amplitudes without being affected by a signal of large amplitude. There is an effect.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

FIG. 2 is a signal waveform diagram showing signal waveforms at each point in FIG. 1;

[Explanation of symbols]

2, 3 Comparator 4, 5 Reference voltage generation circuit 6 One-shot circuit 7 Delay circuit 8 Gate circuit

Claims (1)

[Claims] 1. A first comparator that compares an input signal with a first reference voltage and sends out a trigger signal; and a one-shot circuit that sends out a minute-time one-shot pulse in synchronization with the trigger signal. a delay circuit that delays the output signal of the one-shot circuit; and a second delay circuit that compares the input signal with a second reference voltage and sends out a level detection signal when the input signal exceeds the second reference voltage. A trigger signal generation circuit comprising a comparator and a gate circuit that controls an output signal of the delay circuit using the level detection signal and extracts a trigger signal.