JPH04225177A - Measuring apparatus for slew rate of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a slew rate-measuring apparatus cheap and without an individual difference, possible to measure correctly the slew rate of a semiconductor device including analog device. CONSTITUTION:An output signal S1 of a semiconductor device 3 to be tested is compared with high and low threshold levels Lh, Ll, in comparators 4a, 4b. The delay time (t) of a second variable delay circuit 6b is increased till the rise time point of the output signal S3 of a second comparator 4b agrees with the rise time point of the output signal S2 of a first comparator 4a and the output signal S4 of a flip-flop 7 changes from LO to HI. This delay time increased is the rise time T of the output signal S1 of the semiconductor device 3. The slew rate of the semiconductor device 3 is found if an operation of V/T is made from the rise time T and the potential difference V between the high and low threshold levels Lh, Ll previously set to two power sources 5a, 5b.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for measuring the slew rate of a semiconductor device including an analog device, that is, the rise and fall characteristics of an output signal.

0002

2. Description of the Related Art As shown in the block diagram of FIG. 3, a conventional slew rate measuring device consists of a pulse generator (1) and a time measuring device (2).

In the above configuration, when a pulse signal is input from the pulse generator (1) to the semiconductor device under test (3), the semiconductor device under test (3) produces an output as shown in the waveform diagram of FIG. A signal S is output. This output signal S is input to a time measuring device (2). Time measuring device (
In 2), a low threshold level Ll and a high threshold level Lh with a potential difference of V are set in advance. The time measurement device (2) measures the rise time T until the level of the output signal S of the semiconductor device under test (3) reaches the high threshold level Lh from the low threshold level Ll.

The ratio of the potential difference V to the rise time T, that is, the slope of the waveform of the output signal S is the slew rate. Therefore, by calculating V/T, the semiconductor device under test (
The slew rate of 3) is required.

[0005]

However, in the conventional slew rate measuring device, when the rise time T becomes extremely short, the measurement error of the time T by the time measuring device (2) becomes large, and the time measuring device (2) 2) individual differences also become apparent. A time measurement device with high measurement accuracy and no individual differences is extremely expensive. That is, the conventional slew rate measuring device has a problem in that it becomes very expensive if configured to accurately measure the slew rate.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a slew rate measuring device that can accurately measure slew rate, is inexpensive, and has no individual differences.

[0007]

[Means for Solving the Problems] A slew rate measuring device according to the present invention includes a pulse generator that inputs a pulse signal to a semiconductor device under test, and a voltage that corresponds to a preset low threshold level and a high threshold level. Two power supplies to output, two comparators that compare the level of the output signal of the semiconductor device under test with the respective output voltages of the two power supplies, and each output signal of the two comparators for an arbitrary period of time. Measure the level of the two variable delay circuits that can be delayed, the flip-flop that takes in the output signals of the two comparators as data and trigger, respectively, through the two variable delay circuits, and the level of the output signal of the flip-flop. It is equipped with a voltage measuring device.

[0008]

[Operation] In the above configuration, the output signal of one of the comparators is in the HI (high) state when the output signal of the semiconductor device under test is equal to or higher than the high threshold level, and is in the LO (low) state when it is below that level. The output signal of the other comparator is in the HI state when the output signal of the semiconductor device under test is equal to or higher than the low threshold level, and is in the LO state when it is less than the low threshold level. Furthermore, the output signal of the flip-flop switches from LO to HI when the trigger input instant coincides with the data input instant. Therefore, if the delay time of one of the variable delay circuits is increased until the output signal of the flip-flop switches from LO to HI, the increased delay time becomes the rise time of the output signal of the semiconductor device under test.

[0009] The rise time measured in this way,
The slew rate of the semiconductor device under test can be determined from the potential difference between high and low threshold levels set in advance for the two power supplies.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a slew rate measuring device according to the present invention, and FIG. 2 is a waveform diagram in this slew rate measuring device.

As shown in FIG. 1, this slew rate measuring device includes, in addition to a pulse generator (1), two first and second pulse generators connected in parallel to the output side of a semiconductor device under test (3). Comparators (4a), (4b) and their respective comparators (4a),
Two power supplies (5a), the first and second, connected to (4b)
, (5b) and the first and second variable delay circuits (6
a), (6b) and their two variable delay circuits (6a),
(6b) and one DC voltage measuring device (8) connected to the flip-flop (7).

The output voltages of the two power supplies (5a) and (5b) can be set arbitrarily, and the first power supply (5a) and (5b)
An output voltage corresponding to the high threshold level Lh is set in advance for a), and an output voltage corresponding to the low threshold level Ll is set for the second power supply (5b), respectively. The potential difference between the high threshold level Lh and the low threshold level Ll is V. In addition, the above two variable delay circuits (6a), (6
In b), the delay time can be changed arbitrarily.

In the above configuration, when a pulse signal is input from the pulse generator (1) to the semiconductor device under test (3), the semiconductor device under test (3) outputs an output signal S1 as shown in FIG. Output. This output signal S1 is input to two comparators (4a) and (4b), and the level of the output signal S1 is set to the high threshold level Lh and the low threshold level set to the above two power supplies (5a) and (5b). Let them compare each other with Ll. Then, the output signal S2 is output from the first comparator (4a) compared to the high threshold level Lh, and the output signal S3 is output from the second comparator (4b) compared to the low threshold level Lh. Ru. The output signal S2 of the first comparator (4a) is in the HI (high) state when the output signal S1 of the semiconductor device under test (3) is equal to or higher than the high threshold level Lh, and is in the HI (high) state when it is lower than the high threshold level Lh.
The output signal S3 of the second comparator (4b) is in the O (low) state, and the output signal S3 of the second comparator (4b) is in the HI state when the output signal S1 of the semiconductor device under test (3) is equal to or higher than the low threshold level Ll, and is in the HI state when it is lower than that. It becomes LO state. Furthermore, the output signals S2 and S3 of the two comparators (4a) and (4b) are passed through variable delay circuits (6a) and (6b), respectively, and then inputted as data and triggers to the flip-flop (7). let Then, the output signal S4 is output from the flip-flop (7).
is output. The output signal S4 of this flip-flop (7) is generated when the trigger input time, that is, the time when the output signal S3 switches from LO to HI, coincides with the data input time, that is, the time when the output signal S2 switches from LO to HI. , it switches from LO to HI. Then, the output signal S4 of this flip-flop (7) is inputted to the DC voltage measuring device (8).

Next, a method of measuring the slew rate of the semiconductor device to be measured (3) using the slew rate measuring device having the above configuration will be explained.

First, two variable delay circuits (6a), (6
With both the delay times of b) set to 0, the pulse generator (
Measurement is started by inputting a pulse signal from 1) to the semiconductor device under test (3).

Next, the delay time t of the second variable delay circuit (6b) is gradually increased to delay the output signal S3 of the second comparator (4b).

Then, while measuring the level of the output signal S4 of the flip-flop (7) with the DC voltage measuring device (8), the second Increase the delay time t of the variable delay circuit (6b). The delay time t of the variable delay circuit (6b) until this switching point is the semiconductor device under test (3
) is equal to the rise time T until the level of the output signal S1 reaches the high threshold level Lh from the low threshold level Ll. That is, by measuring the delay time t, the rise time T of the output signal S1 can be determined.

The rise time T obtained in this way,
By calculating V/T from the potential difference V between the high and low threshold levels Lh and Ll, the slew rate of the semiconductor device under test (3) can be determined.

As described above, in this slew rate measuring device, the rise time T of the output signal S1 of the semiconductor device under test (3) is determined by the delay time of one of the variable delay circuits, or in the case of the second variable delay circuit in this embodiment. It is determined from the delay time t of the variable delay circuit (6b). As a result, even when the rise time T is very short, it is possible to obtain the rise time T with high accuracy.As a result, the slew rate of the semiconductor device under test (3) can be accurately measured, and the slew rate of the semiconductor device under test (3) can be accurately measured. Individual differences in rate measuring devices can also be removed.

Furthermore, this slew rate measuring device can be constructed using very common and inexpensive parts.

[0022]

[Effects of the Invention] As explained above, according to the present invention,
An inexpensive slew rate measuring device that can accurately measure slew rates and has no individual differences can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram in an embodiment of the present invention.

FIG. 2 is a waveform diagram in an embodiment of the present invention.

FIG. 3 is a block diagram in a conventional example.

FIG. 4 is a waveform diagram in a conventional example.

[Explanation of symbols]

(1) Pulse generator (3) Semiconductor device under test (4a), (4b) Comparator (5a), (5b) Power supply (6a), (6b) Variable delay circuit (7) Flip-flop (8) DC voltage measuring device

Claims (1)

[Claims] Claim 1: Measuring the rise time until the level of the output signal of a semiconductor device, including an analog device, reaches a preset low threshold level to a high threshold level when a pulse signal is input to the semiconductor device. A device for measuring the slew rate of a semiconductor device, comprising: a pulse generator that inputs a pulse signal to the semiconductor device under test; and two power supplies that output voltages corresponding to a preset low threshold level and a high threshold level;
Two comparators that compare the level of the output signal of the semiconductor device under test with the respective output voltages of the two power supplies, and two variable delays that can delay each output signal of the two comparators by an arbitrary amount of time. circuit, a flip-flop that receives each output signal of the two comparators through the two variable delay circuits as data and a trigger, and a voltage measuring device that measures the level of the output signal of the flip-flop. A slew rate measuring device for a semiconductor device, characterized in that: