SU1594461A1 - Installation for checking instrument four-terminal networks - Google Patents

Abstract

The invention relates to instrumentation technology and can be used when checking measuring quadrupoles in a dynamic mode. The aim of the invention is to improve the accuracy and noise immunity, which is achieved by averaging the results of multiple measurements. The setup for testing a quadrupole contains a random signal generator 1, an exemplary 2 and a verifiable 3 quadrupole, Start circuit 4, OR circuit 5, driver 6, triggers 7 and 8, reversible counter 9, level setpoint 10, sources 11 and 12 of the reference voltage the digital adder 13, the adder 14 modulo two, the inverters 15 and 16, the elements And 17 and 18, block 19 registration. 1 il.

Description

The invention relates to control- | but-measuring technique and can be used when checking measuring quadripoles in dynamic mode.

The aim of the invention is to improve the accuracy and noise immunity by averaging the results of repeatedly repeated measurements (verification). *

The drawing shows a block diagram of an installation for calibration of a four-terminal network.

Installation for checking a four-terminal, contains a random signal generator 1, model 2 and verification ^A New 3 four-terminal, start-up circuit 4, OR circuit 5, former 6, first 7 and second 8 triggers, reverse counter 9, level adjuster 10 ', first 11 and the second 12 sources of reference voltage, a digital adder 13, an adder 14 then 8 2, the first 15 and second 16 inverters, the first 17 and second 18 circuit And, block 19 registration. The output of the generator 1 is connected to the first inputs of model 2 and the verified 3 quadrupole, whose output is connected to the 8-input of trigger 8 and the first input of the OR circuit 5, the second input of which is connected to the output of the model four-terminal 2 and δ-input of trigger 7, the third input is with the output of the Start circuit 4 and the K-input of the reversible counter 9, the first outputs of which are connected to the inputs of the registration unit 19, and the second outputs are connected to the first inputs of the digital adder 13, the second inputs of which are connected to the outputs of the level 10 master and inputs of the first source 11 the reference voltage, the output of which is connected to the second input of the exemplary four-terminal 2, the outputs of the digital adder 13 are connected to the inputs of the second reference voltage source 12, the output of which is connected to the second input of the verified four-terminal 3, the output of the OR circuit 5 is connected to the input of the shaper 6, the output of which is connected to K-input of triggers 7 and 8, respectively, the first outputs of which are connected to the first and second inputs of the adder, respectively, then 82 14, the output of which is connected to the second inputs of circuits And 17 and 18, respectively, the first passages are connected to the outputs of the first 15 and second 16 inverters, respectively, inputs of which are connected to second outputs of flip-flops and 8 respectively, the output of AND gate 17 is connected to the first input of the reversible counter 9, a second input coupled to an output of the AND circuit 18.

Installation works as follows.

From the output of generator 1, the test signal randomly changing up to the Gaussian law of distribution with a uniform frequency spectrum is fed simultaneously to the inputs of model 2 and calibrated 3 four-terminal devices. At the time of start-up, Start-up circuit 4 produces a single signal, which resets through the OR 5 circuit and former 6, the first 7 and second 8 triggers and directly resets the reverse-reset. counter 9. At the level adjuster 10, a code is set corresponding to the selected initial restriction level P _о , which is generated by the voltage sources 11 and 12, i.e. digital-to-analog converters (DAC) according to the code arriving at their inputs from the outputs of the level 10 master and the digital adder -13 connected to it, respectively. Due to the non-identity of model 2 and verified 3 · four-terminal networks, the signal appears at their outputs at the same time, but with a time shift, which is determined by the degree of non-identity of model 2 and verified 3 three-terminal devices. Since the four-terminal circuits are identical in principle, they differ only in the discrepancy between the parameters included in their frequency transfer functions (frequency characteristics).

The output signals of an exemplary 2 and verified 3 quadripole in the form of rectangular pulses with durations equal to the time exceeding the input random voltage of a predetermined level П _о , are supplied to the uncountable inputs of the first 7 and second triggers and to the first and second inputs of the OR circuit 5. In this case, the leading edges of the output signals of exemplary 2 and verified 3 quadripoles correspond to the intersection from bottom to top of the input random processes of a given level and _about . The first 7 and second 8 triggers on the leading edges of the mentioned output signals are overturned into the opposite state and change the levels of the potentials at the inputs of the adder 14 for that of 2, the first 15 and second 16 inverters in accordance with the logic of operation of these circuits.

Since the inputs of the adder 14 along that 2 signals vary at the same time due to the non-identity of the reference 2 and verified 3 four-terminal devices, then a signal appears on its output that passes through the first 17 or second 18 of the AND circuit, depending on which of the output signals of the reference 2 or verifiable 3 four-terminal appears at their outputs earlier. If an exemplary four-terminal device is triggered earlier in time, then the signal passes through the first circuit And 17 to the subtraction bus of the reverse counter 9. In the opposite case, the signal passes through the second circuit And 18 to the bus of tracking of the same counter. Suppose that the verified quadrupole 3 operates with a delay compared to the standard quadrupole 2, which means that the linear part of the verified quadrupole has a narrower bandwidth than the linear part of the reference quadrupole.

To compensate for the deviation in the passband, the subtractor 8 receives more often signals for subtraction and the code of the reverse counter 9 decreases on average by the value of the DC. Since the parallel outputs of the reversing counter 9, starting from the Kth least digit to the highest digit are connected to the second inputs of the digital adder, the DK code is counted starting from the (K + 1) th lowest digit of the reversing counter 9. From the same digit to the highest bit of the reversible counter 9 are also connected to the output bus from which the measurement result is read. The presence of unused K-1 low order bits of the reverse counter 9 leads; to reduce the fluctuation of the code recorded on it, due to the fluctuation of the moments of operation of model 2,

T £ _ verified 3 four-terminal.

The variance of the code fluctuation, which determines the random component of the measurement error of the quantity A and is determined from the expression ϋ [ΔΌ] =, where ό is the mean square value of the input signal;

ϋ - the value determined by the dispersion of the average number of crossings by a random process of the levels established on the reference 2 and verified 3 quadrupole, as well as the density value of the distribution of the number of intersections at a steady level on the verified quadrupole 3;

N is the number of bits of the source 12 of the reference voltage.

For a fixed value of N, the variance of the error can be e. be arbitrarily small by choosing the corresponding value of K.

After a certain finite number of measurement clocks, which can be counted in time from the start of the start, the value of the desired code Δ and is set on the reverse counter 9. This code value unambiguously determines the deviation of the frequency response of the verified quadrupole 3 from the reference 2. Moreover, the invention allows not only to record the fact of the deviation of these quadrupoles, but to measure the deviation.

After each measurement clock, the first 7 and second 8 triggers are set to their initial state by a signal coming from the output of the driver 6. onto the reset buses. In this case, the reset signals are generated along the trailing edge of the most delayed signal from the outputs of the exemplary 2 or verified 3 quadrupole. If the response time of the circuit: reversible counter 9, digital adder 13, DAC 23 exceeds the total duration of the output signals of the four-terminal 2 and 3, then the necessary delay is introduced in the shaper 6 to generate the reset signal of the first 7 and second 8 triggers.

Calibration of the four-terminal network in dynamics is carried out thanks to the measurement of the deviations of the frequency characteristics of model 2 and the verified 3 four-terminal devices in a given frequency band, while a randomly varying signal is fed to their inputs.

The noise immunity of the device is directly ensured by the construction scheme of the device, | θ in which the desired deviation is found by averaging the deviation value by using probabilistic negative feedback generated by the reversible counter 15 by the meter 9, the digital adder 13 and: 11АП 12, as well as the differential switching circuit verified and exemplary four-terminal.

When monitoring and measuring the non-identity of the frequency characteristics of non-linear four-terminal devices, for example, monitoring devices, the measurement method remains unchanged. The schematic quadrupole 2 25 consists of a reference comparator, and the circuit of the verified quadrupole 3 consists of a calibrated comparator. Moreover, the input signal of the Generator of a randomly varying voltage is supplied simultaneously to the inputs of the reference and verified comparators.

Claims (1)

Claim Installation for verification of measuring four-port networks, containing a test signal source, the output of which is connected to the first inputs of an exemplary and verified 40 four-port network, a first reference voltage source, a reversible counter and a recording unit, characterized in that, in order to increase the noise immunity 45 and the accuracy of the installation, introduced scheme OR, shaper, first! second triggers, adder, feathers ... and second inverters, first and second matching circuits, digital adder, second voltage reference source, level switch, Start circuit, the second inputs of the reference and calibrated measuring four-port devices are connected to the outputs of the first and second voltage source, respectively , the inputs of the first reference voltage source are connected to the outputs of the level adjuster, which are connected to the first inputs of the digital adder, the outputs of which are connected to the inputs of the second reference voltage source zheniya, model outputs and verified measuring quadripoles connected to first and second inputs of the OR circuit and, respectively, with the 3-inputs of the first and second. flip-flops whose inputs are connected by the former to the output of the OR circuit, the first outputs of the first and second triggers are connected to the first and second inputs of the adder, and their second outputs are connected through the first and second inverters to the first inputs of the first and second AND circuits, the second inputs of which are connected with the output of the adder, the output of the first circuit And is connected to the subtraction bus of the reversible counter, and the output of the second circuit And is connected to the input of addition of the reversible counter, the first outputs of the reverse counter from the Kth least bit to the senior bit with unified with the second inputs of a digital adder circuit Start connected to the third input of the OR circuit and the reset input of down counter, whose second inputs are connected to the recording unit.