JPH04248222A - Manufacture of chip type fuse - Google Patents

Manufacture of chip type fuse

Info

Publication number
JPH04248222A
JPH04248222A JP625391A JP625391A JPH04248222A JP H04248222 A JPH04248222 A JP H04248222A JP 625391 A JP625391 A JP 625391A JP 625391 A JP625391 A JP 625391A JP H04248222 A JPH04248222 A JP H04248222A
Authority
JP
Japan
Prior art keywords
coat
chip
plating
film
ceramic substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP625391A
Other languages
Japanese (ja)
Inventor
Yukihisa Hiroyama
幸久 廣山
Masayoshi Ikeda
正義 池田
Tetsuya Okishima
沖島 哲哉
Kikuo Yamamoto
山本 菊男
Seiji Mimori
三森 誠司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP625391A priority Critical patent/JPH04248222A/en
Publication of JPH04248222A publication Critical patent/JPH04248222A/en
Pending legal-status Critical Current

Links

Landscapes

  • Fuses (AREA)

Abstract

PURPOSE:To quickly find a fused place by utilizing a Cu coat formed through a process of plating with the aid of a photo-etching process to form electrodes and conductor circuits respectively, and thereafter utilizing a printing process to form a protective coat being discolored with a rise in temperature. CONSTITUTION:The surface of a ceramic substrate 2 formed collectively with a plurality of chip type fuses is roughed to form a Cu coat through a process of electroless plating. A resist coat is formed on the top face of the Cu coat to go through processes of exposure, development, etching and peeling the resist coat, and thereafter only the required part of the Cu coat is left to form each of conductor circuits 3 and each of electrodes 4 respectively. A protective coat 9 which can be discolored with a rise in temperature to detect the presence or absence of a fused place is formed on the top face of the circuit 3 and the top disclosed face of the substrate 2 respectively. Furthermore, Ni plating 7 and Au plating 8 are given to the top face of the electrode 4 and thereafter the substrate 2 is divided into separate pieces to be each formed in the shape of a chip.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、チップ型ヒューズの製
造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a chip fuse.

【0002】0002

【従来の技術】一般に電子回路部品などにおいては、過
電流が流れないようにヒューズを設け破損等を防止する
ようにしている。該ヒューズとしては、近年プリント基
板等に直接実装するためにチップ型のものが開発されて
いる。
2. Description of the Related Art Generally, electronic circuit components are provided with fuses to prevent overcurrent from flowing and damage. In recent years, chip-type fuses have been developed for direct mounting on printed circuit boards and the like.

【0003】従来セラミック基板を用いたチップ型ヒュ
ーズの製造法としては、特開昭62−172626号公
報に示されるような方法がある。このチップ型ヒューズ
は、チップの両端部に電極を設け、この電極間にヒュー
ズ用金属線を接続し、このヒューズ用金属線の上面に透
明樹脂を用いて保護膜がレンズ状に湾曲して形成されて
いる。このため内部のヒューズ用金属線は、前記の凸レ
ンズ状保護膜を通して見ることになる。この結果、保護
膜の光屈折作用により、内部のヒューズ用金属線の像が
拡大された状態となり、透視確認効果が倍加する。
As a conventional method for manufacturing a chip type fuse using a ceramic substrate, there is a method as disclosed in Japanese Patent Application Laid-open No. 172626/1983. This chip type fuse has electrodes on both ends of the chip, a metal wire for the fuse is connected between these electrodes, and a protective film is formed on the top surface of the metal wire for the fuse by using transparent resin and curved into a lens shape. has been done. Therefore, the internal fuse metal wire is seen through the convex lens-shaped protective film. As a result, the image of the internal fuse metal wire is enlarged due to the light refraction effect of the protective film, thereby doubling the effect of seeing through.

【0004】一般的な構造のチップ型ヒューズにおいて
は外部からチップ型ヒューズの正、異常状態が一見して
確認することができ、過電流による熱で溶融した金属線
の溶断状態を発見することが出来る。
[0004] In chip-type fuses with a general structure, the positive and abnormal states of the chip-type fuse can be confirmed from the outside at a glance, and it is possible to discover the blown state of the metal wire melted by heat caused by overcurrent. I can do it.

【0005】[0005]

【発明が解決しようとする課題】しかしながら上記のチ
ップ型ヒューズは、チップの両端部に電極を設け、この
電極間にヒューズ用金属線を接続し、さらにこのヒュー
ズ用金属線上面に透明樹脂を凸レンズ状に形成するため
歩留りが低下し量産化を阻害していた。またチップ型ヒ
ューズが極めて小型で、かつヒューズとなる部分の構造
が微細で複雑な場合、過電流が流れ、金属線が溶断した
際、その確認が一見して出来ず、チップ型ヒューズの迅
速な交換作業が行えないという欠点が生じていた。
[Problems to be Solved by the Invention] However, the above-mentioned chip type fuse has electrodes provided at both ends of the chip, a metal wire for the fuse is connected between these electrodes, and a transparent resin is further coated on the top surface of the metal wire for the fuse with a convex lens. The yield was lowered due to the formation of a shape, which hindered mass production. In addition, if a chip type fuse is extremely small and the structure of the part that becomes the fuse is minute and complicated, when an overcurrent flows and the metal wire melts, it cannot be confirmed at first glance. There was a drawback that replacement work could not be performed.

【0006】本発明は、上記の欠点のないチップ型ヒュ
ーズの製造方法を提供することを目的とするものである
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a chip-type fuse that does not have the above-mentioned drawbacks.

【0007】[0007]

【課題を解決するための手段】本発明者らは、上記の欠
点について種々検討した結果、フォト、エッチング法を
用いて、めっき法で形成したCuの被膜を利用して電極
及び導体回路を形成し、印刷法を用いて温度上昇により
変色し、かつ溶断の有無が検出可能な保護膜を形成すれ
ば、過電流により溶断した場所が迅速に発見出来、しか
も自動実装に優れたチップ型ヒューズが製造出来ること
を見出した。
[Means for Solving the Problems] As a result of various studies on the above-mentioned drawbacks, the present inventors formed electrodes and conductive circuits using a Cu film formed by a plating method using a photo-etching method. However, if we use a printing method to form a protective film that changes color as the temperature rises and allows us to detect whether or not it has blown out, we can quickly find the location where it has blown out due to overcurrent, and we can also create a chip-type fuse that has excellent automatic mounting. I discovered that it can be manufactured.

【0008】本発明は、複数個のチップ型ヒューズを一
括して形成するセラミック基板の表面を粗化し、無電解
めっき法でCuの被膜を形成し、ついでCuの被膜の上
面にレジスト膜を形成し、しかる後露光、現像、エッチ
ング、レジスト膜の剥離をし、Cuの被膜の必要な部分
のみを残して導体回路及び電極を形成した後、導体回路
の上面及びセラミック基板の上部露出面に温度上昇によ
り変色して溶断の有無が検出可能な保護膜を形成し、さ
らに電極の上面にNiめっき及びAuめっきを施した後
、前記セラミック基板を個々に分割してチップ状に成形
するチップ型ヒューズの製造方法に関する。
The present invention roughens the surface of a ceramic substrate on which a plurality of chip-type fuses are to be formed at once, forms a Cu film by electroless plating, and then forms a resist film on the top surface of the Cu film. After that, exposure, development, etching, and peeling off of the resist film were performed to form a conductor circuit and electrodes, leaving only the necessary portions of the Cu film, and then the upper surface of the conductor circuit and the upper exposed surface of the ceramic substrate were heated to A chip-type fuse in which a protective film is formed that changes color as it rises and can detect the presence or absence of fusing, and further Ni plating and Au plating are applied to the upper surface of the electrode, and then the ceramic substrate is individually divided and formed into chips. Relating to a manufacturing method.

【0009】本発明においてセラミック基板の材質とし
ては、アルミナ、PZT(鉛、ジルコニア及びチタンを
主成分としたもの)、ムライト、チッ化アルミニウム等
が用いられる。
In the present invention, the materials used for the ceramic substrate include alumina, PZT (based on lead, zirconia, and titanium), mullite, aluminum nitride, and the like.

【0010】セラミック基板の表面を粗化する方法につ
いては特に制限はないが、セラミック基板を融点以上の
温度に加熱したアルカリ融液中に30秒以上浸漬して粗
化すれば作業性に優れ、またばらつきが少なく、均一に
粗化することができるので好ましい。
[0010] There are no particular restrictions on the method of roughening the surface of the ceramic substrate, but if the ceramic substrate is roughened by immersing it in an alkaline melt heated to a temperature above its melting point for 30 seconds or more, the workability is excellent. Further, it is preferable because there is little variation and uniform roughening can be achieved.

【0011】Cuの被膜は、無電解めっき法で形成する
ものとし、電気めっき法ではリード端子を必要とするた
め工程が煩雑となり、まためっきの厚さにばらつきが生
じ、他の蒸着法、スパッタ法では特殊な装置を必要とす
るため高価になるという欠点が生じる。
[0011] The Cu film is formed by electroless plating, and electroplating requires lead terminals, which makes the process complicated and causes variations in the thickness of the plating. The disadvantage of this method is that it requires special equipment and is therefore expensive.

【0012】保護膜としては、温度上昇により変色して
溶断の有無が検出可能な材料を用いて形成できれば特に
制限はないが、フタロシアングリーン(C32Cl16
N8Cu)、ハンサイエロ−(C17H16N4O4)
等の顔料を含有した材料を用いれば変色のばらつきが少
なく、溶断場所が迅速に発見できるので好ましい。
The protective film is not particularly limited as long as it can be formed using a material that changes color due to temperature rise and can detect the presence or absence of fusing, but phthalocyan green (C32Cl16
N8Cu), Hansaiero (C17H16N4O4)
It is preferable to use a material containing pigments such as the following, since there is less variation in discoloration and the location of fusing can be quickly discovered.

【0013】[0013]

【実施例】以下本発明の実施例を説明する。 実施例1 図3の(a)に示すように複数個のチップ型ヒューズを
一括して形成する直径が0.8mm(φ)のスルーホー
ル5を形成したアルミナセラミック基板(日立化成工業
製、商品名ハロックス552、寸法80×80×厚さ0
.635mm)2を脱脂液(日立化成工業製、商品名H
CR−201)で洗浄し、乾燥後NH4F10g(40
.5重量%)、(NH4)2SO41g(4.1重量%
)、濃H2SO42ml(14.9重量%)及びH2O
10ml(40.5重量%)の混合溶液(液温70℃)
中に10分間浸漬して粗化を行った。なお図3の(a)
において11は基板分割部である。
[Examples] Examples of the present invention will be described below. Example 1 As shown in FIG. 3(a), an alumina ceramic substrate (manufactured by Hitachi Chemical Co., Ltd., product Name Harox 552, dimensions 80 x 80 x thickness 0
.. 635mm) 2 with degreasing liquid (manufactured by Hitachi Chemical, trade name H
After washing with CR-201) and drying, add 10 g of NH4F (40
.. 5% by weight), (NH4)2SO41g (4.1% by weight
), 42 ml of concentrated H2SO (14.9% by weight) and H2O
10ml (40.5% by weight) mixed solution (liquid temperature 70°C)
Roughening was performed by immersing the sample in the water for 10 minutes. Note that (a) in Figure 3
11 is a board dividing section.

【0014】次に流水中で十分に水洗し、乾燥後380
℃に加熱したNaOH融液中に3分間浸漬して再粗化を
行った。この後、濃度10重量%のH2SO4溶液中に
3分間浸漬し、超音波(出力300W)による振動エネ
ルギーを付与し、アルミナセラミック基板2の表面を中
和し、ついで水洗を行い無電解Cuめっきを4時間行っ
て図3の(b)に示すように厚さ9μmのCuの被膜6
を形成した。なお、無電解Cuめっき液はpH12.4
で表1に示す組成のものを用いた。
[0014] Next, wash thoroughly under running water, dry and dry at 380℃.
Re-roughening was performed by immersing the sample in a NaOH melt heated to ℃ for 3 minutes. Thereafter, the surface of the alumina ceramic substrate 2 is immersed in a H2SO4 solution with a concentration of 10% by weight for 3 minutes, and vibration energy is applied by ultrasonic waves (output 300W) to neutralize the surface. Then, the surface of the alumina ceramic substrate 2 is washed with water to perform electroless Cu plating. After 4 hours, as shown in FIG. 3(b), a Cu coating 6 with a thickness of 9 μm was formed.
was formed. In addition, the electroless Cu plating solution has a pH of 12.4.
The composition shown in Table 1 was used.

【0015】[0015]

【表1】[Table 1]

【0016】Cuめっき後感光性レジストフィルム(日
立化成工業製、商品名PHT−862AF−25)を前
記Cuの被膜6上に全面貼付し、さらにその上面に、得
られる導体回路と同形状に透明な部分を形成したネガフ
ィルム(図示せず)を貼付した後、露光してネガフィル
ムの透明な部分の下面に配設した感光性レジストフィル
ムを硬化させた。ついでネガフィルムを取り除き、さら
に現像して硬化していない部分、詳しくは露光していな
い部分の感光性レジストフィルムを除去し、図3の(c
)に示すようなレジスト膜10を形成した。しかる後濃
度25重量%の過硫酸アンモニウムの溶液でエッチング
を行い、図3の(d)に示すように導体回路として不必
要な部分のCuの被膜6をを除去した。
After Cu plating, a photosensitive resist film (manufactured by Hitachi Chemical Co., Ltd., trade name PHT-862AF-25) is pasted on the entire surface of the Cu film 6, and a transparent resist film in the same shape as the conductor circuit to be obtained is further applied on the upper surface. After attaching a negative film (not shown) on which a transparent portion was formed, the photosensitive resist film disposed on the lower surface of the transparent portion of the negative film was cured by exposure. Next, the negative film is removed, and the photosensitive resist film in the areas that have not been developed and cured, specifically, the areas that are not exposed, is removed, and the photosensitive resist film is removed as shown in Figure 3 (c).
A resist film 10 as shown in ) was formed. Thereafter, etching was carried out using a solution of ammonium persulfate having a concentration of 25% by weight to remove portions of the Cu film 6 which were unnecessary as conductor circuits, as shown in FIG. 3(d).

【0017】この後濃度5重量%のNaOH溶液で硬化
している感光性レジストフィルムを剥離し、図3の(e
)に示すように導体回路3及び電極4を同時に形成した
セラミック配線板を得た。
After that, the photosensitive resist film cured with a 5% by weight NaOH solution was peeled off, and the photoresist film (e) in FIG. 3 was peeled off.
), a ceramic wiring board was obtained in which conductor circuits 3 and electrodes 4 were formed simultaneously.

【0018】次に該セラミック配線板を水洗し、乾燥後
印刷法で導体回路3の上面及びアルミナセラミック基板
2の上部露出面に温度上昇により変色して溶断の有無が
検出可能な保護材料(日立化成工業製、商品名HPD−
4)を60μmの厚さに塗布し、オーブン中で180℃
で30分間硬化させ、図3の(f)に示すように保護膜
9を形成した。
Next, the ceramic wiring board is washed with water, and after drying, a protective material (Hitachi Manufactured by Kasei Kogyo, product name HPD-
4) was applied to a thickness of 60 μm and heated in an oven at 180°C.
This was cured for 30 minutes to form a protective film 9 as shown in FIG. 3(f).

【0019】ついで脱脂液(日立化成工業製、商品名H
CR−201)で洗浄し、水洗後濃度10重量%のH2
SO4溶液中に1分間浸漬し、再度水洗後、従来公知の
無電解Ni及びAuめっきを施し、図3の(g)に示す
ようにそれぞれ厚さ2.0μm及び0.1μmのNiの
被膜7及びAuの被膜8を形成したチップ型ヒューズ基
板を得た。なお無電解Niめっき液は、日本カニゼン製
の商品名S−680を用い、浴温70℃で10分間行い
、無電解Auめっき液は、EEJA製の商品名レクトロ
レスプレップを用い浴温90℃で10分間行った。
[0019] Next, a degreasing liquid (manufactured by Hitachi Chemical Co., Ltd., trade name H
CR-201) and after washing with water, H2 with a concentration of 10% by weight
After being immersed in SO4 solution for 1 minute and washed with water again, conventionally known electroless Ni and Au plating was applied to form Ni coatings 7 with thicknesses of 2.0 μm and 0.1 μm, respectively, as shown in FIG. 3(g). A chip type fuse substrate on which a coating 8 of Au was formed was obtained. The electroless Ni plating solution used was S-680 (trade name, manufactured by Nippon Kanigen Co., Ltd.) at a bath temperature of 70°C for 10 minutes, and the electroless Au plating solution was Lectroreprep (trade name, manufactured by EEJA), and the bath temperature was 90°C. I went there for 10 minutes.

【0020】このようにして得られたチップ型ヒューズ
基板をスライシングマシーン(ディスコ製、商品名DA
D−2H−6)を用いて基板分割部11で個々に分割し
て個々の寸法が3.2×1.6mmとした図1及び図2
に示すチップ型ヒューズ(定格電流300mA品、導体
回路部分の抵抗0.8Ω、導体回路の厚さ9.0μm、
導体回路の幅50μm、導体回路の長さ18mm)1を
得た。
The chip-type fuse board thus obtained was processed using a slicing machine (manufactured by DISCO, product name: DA).
D-2H-6), the board was divided into individual parts at the board dividing part 11, and the individual dimensions were 3.2 x 1.6 mm in Figures 1 and 2.
Chip type fuse shown in (rated current 300mA product, resistance of conductor circuit part 0.8Ω, conductor circuit thickness 9.0μm,
A conductor circuit width of 50 μm and conductor circuit length of 18 mm) 1 was obtained.

【0021】次に上記で得たチップ型ヒューズ1を10
ヶ用い溶断後の外観を観察した。測定方法は、定電流3
A(定格電流の10倍に相当する直流電流)をチップ型
ヒューズ1の電極両端部に通電してヒューズ(導体回路
3の部分)を溶断させ、このときの外観を観察した。そ
の結果溶断場所の保護膜は、緑色から褐色に変色し、1
0ヶのヒューズすべての異常状態が一見して確認できた
Next, the chip type fuse 1 obtained above was
The appearance after fusing was observed. The measurement method is constant current 3
A (direct current equivalent to 10 times the rated current) was applied to both ends of the electrode of the chip type fuse 1 to blow out the fuse (conductor circuit 3), and the appearance at this time was observed. As a result, the protective film at the melting point changed color from green to brown, and
Abnormal states of all 0 fuses could be confirmed at a glance.

【0022】比較例1 透明樹脂(東レ・ダウコーニング製、商品名SE−17
00)を用いて凸レンズ状の保護膜を形成した以外は、
実施例1と同様の工程を経てチップ型ヒューズを得た。 ついで得られたチップ型ヒューズを10ヶ用いて実施例
1と同様の溶断試験を行い、溶断後の外観を調べた。そ
の結果、溶断場所を確認することが困難であった。
Comparative Example 1 Transparent resin (manufactured by Toray Dow Corning, trade name SE-17)
00) was used to form a convex lens-shaped protective film.
A chip type fuse was obtained through the same steps as in Example 1. Then, a fusing test similar to that in Example 1 was conducted using ten of the obtained chip-type fuses, and the appearance after fusing was examined. As a result, it was difficult to confirm the location of the melt.

【0023】実施例2 温度上昇により変色して溶断の有無が検出可能な保護材
料(日立化成工業製、商品名HPD−3)を用いて保護
膜を形成した以外は、実施例1と同様の工程を経てチッ
プ型ヒューズを得た。ついで得られたチップ型ヒューズ
を10ヶ用いて実施例1と同様の溶断試験を行い溶断後
の外観を調べた。その結果、溶断場所の保護膜は、黄色
から褐色に変色し、10ヶのヒューズすべての異常状態
が一見して確認できた。
Example 2 The same process as in Example 1 was carried out, except that a protective film was formed using a protective material (manufactured by Hitachi Chemical, trade name HPD-3) that changes color due to temperature rise and can detect the presence or absence of fusing. A chip-type fuse was obtained through the process. Then, a fusing test similar to that in Example 1 was conducted using ten of the obtained chip-type fuses, and the appearance after fusing was examined. As a result, the protective film at the melted location changed color from yellow to brown, and the abnormal conditions of all 10 fuses could be confirmed at a glance.

【0024】[0024]

【発明の効果】本発明の製造方法によって得られるチッ
プ型ヒューズは、過電流による熱で溶断した場所が迅速
に発見出来るため修復処理が簡易に実行出来、また歩留
りが向上し、量産化に優れ、工業的に極めて好適なチッ
プ型ヒューズである。
[Effects of the Invention] The chip-type fuse obtained by the manufacturing method of the present invention can quickly find the location where it has blown due to heat caused by overcurrent, so repair processing can be easily carried out, and the yield is improved, making it suitable for mass production. This is an industrially very suitable chip type fuse.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の実施例になるチップ型ヒューズの斜視
図である。
FIG. 1 is a perspective view of a chip-type fuse according to an embodiment of the present invention.

【図2】図1のA−A線断面図である。FIG. 2 is a sectional view taken along the line AA in FIG. 1;

【図3】本発明の実施例になるチップ型ヒューズの製造
作業状態を示す断面図である。
FIG. 3 is a cross-sectional view showing a manufacturing process of a chip-type fuse according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1    チップ型ヒューズ 2    アルミナセラミック基板 3    導体回路 4    電極 5    スルーホール 6    Cuの被膜 7    Niの被膜 8    Auの被膜 9    保護膜 10  レジスト膜 11  基板分割部 1 Chip type fuse 2 Alumina ceramic substrate 3 Conductor circuit 4 Electrode 5 Through hole 6 Cu coating 7 Ni coating 8 Au coating 9 Protective film 10 Resist film 11 Board division part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  複数個のチップ型ヒューズを一括して
形成するセラミック基板の表面を粗化し、無電解めっき
法でCuの被膜を形成し、ついでCuの被膜の上面にレ
ジスト膜を形成し、しかる後露光、現像、エッチング、
レジスト膜の剥離をし、Cuの被膜の必要な部分のみを
残して導体回路及び電極を形成した後、導体回路の上面
及びセラミック基板の上部露出面に温度上昇により変色
して溶断の有無が検出可能な保護膜を形成し、さらに電
極の上面にNiめっき及びAuめっきを施した後、前記
セラミック基板を個々に分割してチップ状に成形するこ
とを特徴とするチップ型ヒューズの製造方法。
1. Roughening the surface of a ceramic substrate on which a plurality of chip fuses are to be formed at once, forming a Cu film by electroless plating, and then forming a resist film on the top surface of the Cu film, After that, exposure, development, etching,
After removing the resist film and forming a conductor circuit and electrodes by leaving only the necessary parts of the Cu film, the upper surface of the conductor circuit and the upper exposed surface of the ceramic substrate change color due to temperature rise, and the presence or absence of fusing is detected. 1. A method for manufacturing a chip-type fuse, which comprises forming a protective film and further plating the upper surface of the electrode with Ni and Au, and then dividing the ceramic substrate into individual pieces and forming them into chips.
JP625391A 1991-01-23 1991-01-23 Manufacture of chip type fuse Pending JPH04248222A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP625391A JPH04248222A (en) 1991-01-23 1991-01-23 Manufacture of chip type fuse

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP625391A JPH04248222A (en) 1991-01-23 1991-01-23 Manufacture of chip type fuse

Publications (1)

Publication Number Publication Date
JPH04248222A true JPH04248222A (en) 1992-09-03

Family

ID=11633325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP625391A Pending JPH04248222A (en) 1991-01-23 1991-01-23 Manufacture of chip type fuse

Country Status (1)

Country Link
JP (1) JPH04248222A (en)

Similar Documents

Publication Publication Date Title
JPS58139493A (en) Method of producing printed circuit
US4649338A (en) Fine line circuitry probes and method of manufacture
US5739055A (en) Method for preparing a substrate for a semiconductor package
JPH05166454A (en) Chip type fuse
JPH04242036A (en) Manufacture of chip type fuse
US4647851A (en) Fine line circuitry probes and method of manufacture
JPH01260886A (en) Manufacture of printed board
JPH04248221A (en) Manufacture of chip type fuse
JPH04248222A (en) Manufacture of chip type fuse
JPH0536341A (en) Manufacture of chip type fuse
JPH04255627A (en) Manufacture of chip-type fuse
US4374708A (en) Fine line circuitry probes and method of manufacture
JPH05198245A (en) Chip type fuse and manufacture thereof
US4374003A (en) Fine line circuitry probes and method of manufacture
JPH0696654A (en) Manufacture of chip type fuse
JP3568249B2 (en) Semiconductor device and method for manufacturing chip carrier used therein
JPH0964264A (en) Partial plating method for lead frame
JPH05144368A (en) Chip type fuse and manufacture thereof
CN117153631B (en) Preparation method of fuse element of fuse link current
JPH03270193A (en) Method of manufacturing printed board
JPH0348489A (en) Manufacture of printed circuit board
JP2001035962A (en) Manufacture of substrate for semiconductor package
CN116981183A (en) Manufacturing method of PCB (printed circuit board) based on nichrome coating substrate
JP3045697U (en) Package substrate for chip mounting
JP2022122426A (en) Manufacturing method of aluminum-ceramic circuit board