JPH04255627A - Manufacture of chip-type fuse - Google Patents

Manufacture of chip-type fuse

Info

Publication number
JPH04255627A
JPH04255627A JP1731691A JP1731691A JPH04255627A JP H04255627 A JPH04255627 A JP H04255627A JP 1731691 A JP1731691 A JP 1731691A JP 1731691 A JP1731691 A JP 1731691A JP H04255627 A JPH04255627 A JP H04255627A
Authority
JP
Japan
Prior art keywords
chip
ceramic substrate
type fuse
conductor circuit
resist film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1731691A
Other languages
Japanese (ja)
Inventor
Yukihisa Hiroyama
幸久 廣山
Masayoshi Ikeda
正義 池田
Kikuo Yamamoto
山本 菊男
Seiji Mimori
三森 誠司
Hideaki Uehara
秀秋 上原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP1731691A priority Critical patent/JPH04255627A/en
Publication of JPH04255627A publication Critical patent/JPH04255627A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To provide a chip-type fuse with excellent contact strength of its electrode part, excellent uniformity in characteristics and instant break property after the meltable body is melted, and excellent in mass production. CONSTITUTION:The surface of a ceramic base 2 is processed to have a roughness of 2-6mumRmax, thereafter, a metallic (copper) coat 6 is formed on the surface of the substrate 2, then, a resist film 10 is formed on the metallic coat 6, then, exposure, development, etching, separation of resist film 10 are performed, only the necessary part of the metallic coat 6 is left to form a conductor circuit 3 and an electrode 4, then, a protective film 9 is formed on the upper surface of the conductor circuit 3 and the upper exposed surface of the ceramic substrate 2 and thereafter to be formed in a chip shape.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、チップ型ヒューズの製
造法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip type fuse.

【0002】0002

【従来の技術】従来、電子機器の誤動作、短絡等の故障
により生じた過電流による電子機器の発熱、火災等の事
故を防止するために、ガラス管の端子間に金属の可溶材
料を接続した管ヒューズがあった。しかし、電子機器が
小型化するにつれ、前記管ヒューズでは大き過ぎる、量
産性に劣る、配線板に表面実装しくにい、などの問題が
生じた。これを解決するために小型化が容易で量産性に
優れ、配線板に表面実装しやすいチップ型のヒューズが
提案された。これらのチップ型ヒューズは、ヒューズが
切断されるときに発生する熱を考慮してセラミック基板
上に形成するものである。通常、セラミック基板として
は、アルミナセラミック基板が用いられ、該アルミナセ
ラミック基板の上面に厚膜法、めっき法等により電極や
可溶体が形成されるものが、一般的である。
[Background Art] Conventionally, a metal fusible material was connected between the terminals of a glass tube in order to prevent accidents such as overheating of electronic equipment and fire due to overcurrent caused by failures such as malfunctions and short circuits in electronic equipment. There was a tube fuse. However, as electronic devices have become smaller, problems have arisen with the tubular fuses, such as being too large, poor in mass production, and difficult to surface mount on wiring boards. To solve this problem, a chip-type fuse was proposed that is easy to miniaturize, has excellent mass production, and is easy to surface-mount on wiring boards. These chip type fuses are formed on a ceramic substrate in consideration of the heat generated when the fuse is cut. Generally, an alumina ceramic substrate is used as the ceramic substrate, and electrodes and a fusible material are generally formed on the upper surface of the alumina ceramic substrate by a thick film method, a plating method, or the like.

【0003】0003

【発明が解決しようとする課題】しかしながら厚膜法に
より可溶体を形成する場合、可溶体を形成する部分(セ
ラミック基板)の表面粗さが0.2〜2.0μmRma
x未満であると、溶融した後の可溶体がその場に残存し
速断性が低下し、また可溶体にガラスペーストを用いる
ため金属銅(めっき法)に比べ導体抵抗が高く、ヒュー
ズの抵抗値が高いなどの欠点が生じる。
However, when forming a fusible body by the thick film method, the surface roughness of the part (ceramic substrate) on which the fusible body is formed is 0.2 to 2.0 μmRma.
If it is less than There are disadvantages such as high

【0004】一方めっき法により可溶体を形成する場合
、セラミック基板を粗化してからめっきする必要があり
、可溶体を形成する部分の表面粗さが例えば1〜2μm
  Rmax未満の場合、溶融後の可溶体がその場に残
り速断性が低下し、また8μmRmax以上の場合、可
溶体及び電極部分の密着強度が弱くなり、さらに表面粗
さが大きいため可溶体の幅や厚みが一定にならず、ヒュ
ーズの抵抗値が一定しないなどの欠点が生じる。
On the other hand, when forming a fusible body by a plating method, it is necessary to roughen the ceramic substrate before plating, and the surface roughness of the part where the fusible body is to be formed is, for example, 1 to 2 μm.
If it is less than Rmax, the fusible material will remain in place after melting and the fast cutting performance will be reduced, and if it is more than 8μmRmax, the adhesion strength between the fusible material and the electrode part will be weak, and the width of the fusible material will be reduced due to the large surface roughness. This results in drawbacks such as the fact that the thickness and resistance of the fuse are not constant, and the resistance value of the fuse is not constant.

【0005】本発明はかかる欠点を解消し、電極部分の
密着強度が優れ、可溶体が溶融した後の速断性と特性の
均一性に優れ、量産性に優れたチップ型ヒューズの製造
法を提供するものである。
The present invention eliminates these drawbacks and provides a method for manufacturing a chip-type fuse that has excellent adhesion strength in the electrode portion, excellent fast-acting properties and uniformity of characteristics after the fusible material is melted, and is excellent in mass production. It is something to do.

【0006】[0006]

【課題を解決するための手段】本発明は、表面粗さが2
〜6μm  Rmaxとなるようにセラミック基板の表
面を粗化した後、該セラミック基板の表面に金属被膜を
形成し、ついで金属被膜の上面にレジスト膜を形成し、
しかる後露光、現像、エッチング、レジスト膜を剥離し
、金属被膜の必要な部分のみを残して導体回路及び電極
を形成し、導体回路の上面及びセラミック基板の上部露
出面に保護膜を形成後、チップ状に成形するチップ型ヒ
ューズの製造法に関する。
[Means for Solving the Problems] The present invention has a surface roughness of 2.
After roughening the surface of the ceramic substrate so that Rmax is ~6 μm, a metal coating is formed on the surface of the ceramic substrate, and then a resist film is formed on the top surface of the metal coating,
After that, the resist film is removed by exposure, development, and etching, leaving only the necessary parts of the metal coating to form a conductor circuit and electrodes. After forming a protective film on the upper surface of the conductor circuit and the upper exposed surface of the ceramic substrate, This invention relates to a method for manufacturing a chip-type fuse that is molded into a chip.

【0007】本発明で用いるセラミック基板は、特に制
限はないが、アルミナ基板を用いることが好ましい。セ
ラミック基板の表面を粗化する方法については特に制限
はないが、NaOH、KOH等のアルカリ溶融塩(粗化
液)を用いて粗化することが好ましく、これらの粗化液
を用いて粗化すればセラミック基板の表面粗さを2.0
〜6.0μm  Rmaxにすることができる。本発明
においては粗化後の表面粗さは、2〜6μm  Rma
xの範囲とされ、6μm  Rmaxを越えると金属被
膜を形成してからパターンエッチングして形成する可溶
体部分(導体回路の部分)の厚み精度及び幅精度が低下
し、ヒューズとしての抵抗値が一定しなくなる。また基
板の表面粗さが2μm  Rmax未満であると、溶融
した後の可溶体金属が移動しにくくなり、速断性が低下
する。
The ceramic substrate used in the present invention is not particularly limited, but it is preferable to use an alumina substrate. There are no particular restrictions on the method of roughening the surface of the ceramic substrate, but it is preferable to use an alkali molten salt (roughening liquid) such as NaOH or KOH to roughen the surface. Then, the surface roughness of the ceramic substrate will be 2.0.
~6.0 μm Rmax. In the present invention, the surface roughness after roughening is 2 to 6 μm Rma
x, and if it exceeds 6μm Rmax, the thickness and width accuracy of the fusible part (conductor circuit part) formed by forming a metal film and pattern etching will decrease, and the resistance value as a fuse will remain constant. I won't. Furthermore, if the surface roughness of the substrate is less than 2 μm Rmax, it becomes difficult for the fusible metal to move after melting, resulting in a decrease in fast cutting performance.

【0008】金属被膜の形成方法については特に制限は
ないが、めっき法で形成することが好ましい。金属被膜
としては、可溶体の金属であれば特に制限はないが、C
u、Zn、Sn等の低融点金属を用いることが好ましい
。一方電極を形成する金属被膜としては、半田付けが容
易な、Cu、Au、Zn、Sn等の金属を用いることが
好ましい。さらに保護膜については、難燃性が必要とさ
れるため、シリコーンを用いることが好ましい。
[0008] There are no particular restrictions on the method of forming the metal coating, but it is preferable to use a plating method. There are no particular restrictions on the metal coating as long as it is a soluble metal, but C
It is preferable to use a low melting point metal such as u, Zn, or Sn. On the other hand, as the metal film forming the electrode, it is preferable to use a metal such as Cu, Au, Zn, or Sn, which is easy to solder. Furthermore, since flame retardancy is required for the protective film, it is preferable to use silicone.

【0009】[0009]

【実施例】以下本発明の実施例を説明する。 実施例1 両端に直径が0.8mm(φ)のスルーホールを形成し
たアルミナセラミック基板(日立化成工業製、商品名ハ
ロックス552、寸法3.2×1.6×厚さ0.635
mm)を脱脂液(日立化成工業製、商品名HCR−20
1)で洗浄し、乾燥後350℃に加熱したNaOH融液
中に10分間浸漬して粗化を行い、図3の(a)に示す
ように表面粗さが3.2μm  Rmaxのアルミナセ
ラミック基板2を得た。粗化後、濃度10重量%のH2
SO4溶液中に5分間浸漬し、アルミナセラミック基板
2の表面を中和し、ついで水洗後無電解銅めっきを2時
間行い図3の(b)に示すように厚さ4μmの銅の被膜
6を形成した。なお無電解銅めっき液は、日立化成工業
製の商品名L−59を用いた。
[Examples] Examples of the present invention will be described below. Example 1 An alumina ceramic substrate (manufactured by Hitachi Chemical, trade name Halox 552, dimensions 3.2 x 1.6 x thickness 0.635) with through holes with a diameter of 0.8 mm (φ) formed at both ends.
mm) with a degreasing solution (manufactured by Hitachi Chemical, trade name: HCR-20
1), and after drying, the alumina ceramic substrate was roughened by immersing it in a NaOH melt heated to 350°C for 10 minutes, and the surface roughness was 3.2 μm Rmax as shown in Figure 3 (a). I got 2. After roughening, H2 with a concentration of 10% by weight
The surface of the alumina ceramic substrate 2 was immersed in SO4 solution for 5 minutes to neutralize it, and then washed with water and subjected to electroless copper plating for 2 hours to form a 4 μm thick copper coating 6 as shown in FIG. 3(b). Formed. As the electroless copper plating solution, L-59 (trade name, manufactured by Hitachi Chemical Co., Ltd.) was used.

【0010】銅めっき後、感光性レジストフィルム(日
立化成工業製、商品名PHT−862AF−25)を前
記銅の被膜6の全表面に貼付し、さらにその上面に、得
られる導体回路と同形状に透明な部分を形成したネガフ
ィルム(図示せず)を貼付し、露光してネガフィルムの
透明な部分の下面に配設した感光性レジストフィルムを
硬化させた。ついでネガフィルムを取り除き、さらに現
像して硬化していない部分、詳しくは露光していない部
分の感光性レジストフィルムを除去して図3の(c)に
示すようなレジスト膜10を形成した。しかる後濃度2
5重量%の過硫酸アンモニウムの溶液でエッチングを行
い、図3の(d)に示すように導体回路として不必要な
部分の銅の被膜6を除去した。この後濃度5重量%のN
aOH溶液で硬化している感光性レジストフィルムを剥
離し、図3の(e)に示すように導体回路(可溶体部)
3及び電極4を形成したセラミック配線板を得た。
After copper plating, a photosensitive resist film (manufactured by Hitachi Chemical Co., Ltd., trade name PHT-862AF-25) is attached to the entire surface of the copper coating 6, and a pattern having the same shape as the conductor circuit to be obtained is further applied to the upper surface of the copper coating 6. A negative film (not shown) on which a transparent portion was formed was attached to the substrate, and the photosensitive resist film provided under the transparent portion of the negative film was cured by exposure. Next, the negative film was removed, and the photosensitive resist film was removed from the areas that had not been developed and cured, specifically, the areas that had not been exposed, to form a resist film 10 as shown in FIG. 3(c). Then concentration 2
Etching was performed using a 5% by weight ammonium persulfate solution to remove the copper coating 6 from unnecessary portions of the conductor circuit, as shown in FIG. 3(d). After this, N with a concentration of 5% by weight
The photosensitive resist film cured with the aOH solution is peeled off, and a conductor circuit (fusible part) is formed as shown in FIG. 3(e).
A ceramic wiring board on which electrodes 3 and 4 were formed was obtained.

【0011】次に該セラミック配線板を水洗、乾燥後印
刷法で導体回路3の上面及びアルミナセラミック基板2
の上部露出面にシリコーン樹脂(東レ・ダウ・コーニン
グ製、商品名SE−1700)を60μmの厚さに塗布
し、オーブン中で130℃で15分間硬化させ、図3の
(f)に示すようにシリコーン保護膜9を形成した。つ
いで脱脂液(日立化成工業製、商品名HCR−201)
で洗浄し、水洗後濃度10重量%のH2SO4溶液中に
1分間浸漬し、再水洗後、従来公知の方法で無電解ニッ
ケルめっき及び金めっきを施し、図3の(g)に示すよ
うにそれぞれ2.0μm及び0.1μmのニッケルの被
膜7及び金の被膜8を形成したチップ型ヒューズ基板を
得た。なお無電解ニッケルめっき液は、日本カニゼン製
の商品名S−680を用い、浴温70℃で10分間めっ
きを行い、無電解金めっき液は、EEJA製の商品名レ
クトロレスプレップを用い、浴温90℃で10分間めっ
きを行った。このようにして得られたチップ型ヒューズ
基板をスライングマシーン(ディスコ製、商品名DAD
−2H−6)を用いて両端部を切断し、図1及び図2に
示すチップ型ヒューズ1を得た。なお図1及び図2にお
いて5はスルーホールである。得られたチップ型ヒュー
ズの可溶体部分である導体回路3の幅は60μm、厚さ
は4μm及び長さは18mmであった。
Next, the ceramic wiring board is washed with water, dried, and then printed on the upper surface of the conductor circuit 3 and the alumina ceramic substrate 2.
A silicone resin (manufactured by Toray Dow Corning, trade name SE-1700) was applied to a thickness of 60 μm on the upper exposed surface of the film, and cured in an oven at 130°C for 15 minutes, as shown in Figure 3(f). A silicone protective film 9 was formed thereon. Next, degreasing liquid (manufactured by Hitachi Chemical, trade name HCR-201)
After washing with water, it was immersed in an H2SO4 solution with a concentration of 10% by weight for 1 minute, and after washing again with water, electroless nickel plating and gold plating were applied by conventionally known methods, as shown in FIG. 3 (g), respectively. A chip type fuse substrate was obtained in which a nickel film 7 and a gold film 8 of 2.0 μm and 0.1 μm were formed. The electroless nickel plating solution used was S-680 (trade name, manufactured by Nippon Kanigen Co., Ltd.), and plating was carried out at a bath temperature of 70°C for 10 minutes. Plating was performed at a temperature of 90°C for 10 minutes. The chip-type fuse board thus obtained was processed using a sling machine (manufactured by DISCO, product name: DAD).
-2H-6) was used to cut both ends to obtain the chip type fuse 1 shown in FIGS. 1 and 2. Note that in FIGS. 1 and 2, 5 is a through hole. The conductor circuit 3, which is the fusible portion of the obtained chip-type fuse, had a width of 60 μm, a thickness of 4 μm, and a length of 18 mm.

【0012】比較例1 実施例1と同様のアルミナセラミック基板を実施例1と
同様の方法で粗化して表面粗さが1.5μm  Rma
xのアルミナセラミック基板を得た。以下実施例1と同
様の工程を経てチップ型ヒューズを得た。得られたチッ
プ型ヒューズの導体回路の幅は60μm、厚さは4μm
及び長さは18mmであった。
Comparative Example 1 An alumina ceramic substrate similar to that in Example 1 was roughened in the same manner as in Example 1 to obtain a surface roughness of 1.5 μm Rma.
An alumina ceramic substrate of x was obtained. Thereafter, a chip type fuse was obtained through the same steps as in Example 1. The conductor circuit of the obtained chip type fuse has a width of 60 μm and a thickness of 4 μm.
and the length was 18 mm.

【0013】比較例2 実施例1と同様のアルミナセラミック基板を用い粗化液
としてKOH融液中に30分間浸漬した以外は実施例1
と同様の工程を経て表面粗さが8.5  Rmaxのア
ルミナセラミック基板を用いたチップ型ヒューズを得た
。 得られたチップ型ヒューズの導体回路の幅は60μm、
厚さは4μm及び長さは18mmであった。
Comparative Example 2 The same alumina ceramic substrate as in Example 1 was used, except that it was immersed in KOH melt as a roughening solution for 30 minutes.
A chip type fuse using an alumina ceramic substrate with a surface roughness of 8.5 Rmax was obtained through the same process as above. The width of the conductor circuit of the obtained chip type fuse was 60 μm,
The thickness was 4 μm and the length was 18 mm.

【0014】次に実施例及び各比較例で得られたチップ
型ヒューズを20ヶ用い導体回路部分の抵抗値、電極部
分の密着強度及び2Aの電流を流したときの溶断時間を
求めた。その結果を表1に示す。
Next, using 20 chip-type fuses obtained in Examples and Comparative Examples, the resistance value of the conductor circuit portion, the adhesion strength of the electrode portion, and the fusing time when a current of 2 A was applied were determined. The results are shown in Table 1.

【0015】[0015]

【表1】[Table 1]

【0016】表1から明らかなように本発明の実施例に
なるチップ型ヒューズは比較例のチップ型ヒューズに比
較して電極部分の密着強度及び速断性に優れることがわ
かる。
As is clear from Table 1, the chip type fuse according to the example of the present invention is superior to the chip type fuse of the comparative example in the adhesion strength and fast-acting property of the electrode portion.

【0017】[0017]

【発明の効果】本発明によれば電子機器の誤動作、短絡
等の故障により生じた過電流による電子機器の発熱、火
災等の事故を防止するためのチップ型ヒューズにおいて
、量産性を維持したまま電極部分の密着強度に優れ、か
つ速断性等を向上させ、特性の安定性も向上させた電子
機器保護用として好適なチップ型ヒューズを提供するこ
とができる。
[Effects of the Invention] According to the present invention, a chip type fuse for preventing accidents such as overheating of electronic equipment and fire due to overcurrent caused by failures such as malfunctions and short circuits of electronic equipment can be manufactured while maintaining mass productivity. It is possible to provide a chip-type fuse suitable for protecting electronic equipment, which has excellent adhesion strength of electrode portions, improved fast-acting properties, and improved stability of characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の実施例になるチップ型ヒューズの傾斜
図である。
FIG. 1 is a slanted view of a chip-type fuse according to an embodiment of the present invention.

【図2】図1のA−A線断面図である。FIG. 2 is a sectional view taken along the line AA in FIG. 1;

【図3】本発明の実施例になるチップ型ヒューズの製造
作業状態を示す断面図である。
FIG. 3 is a cross-sectional view showing a manufacturing process of a chip-type fuse according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1  チップ型ヒューズ 2  アルミナセラミック基板 3  導体回路 4  電極 5  スルーホール 6  銅の被膜 7  ニッケルの被膜 8  金の被膜 9  シリコーン保護膜 10  レジスト膜 1 Chip type fuse 2 Alumina ceramic substrate 3 Conductor circuit 4 Electrode 5 Through hole 6 Copper coating 7 Nickel coating 8 Gold coating 9 Silicone protective film 10 Resist film

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  表面粗さが2〜6μm  Rmaxと
なるようにセラミック基板の表面を粗化した後、該セラ
ミック基板の表面に金属被膜を形成し、ついで金属被膜
の上面にレジスト膜を形成し、しかる後露光、現像、エ
ッチング、レジスト膜を剥離し、金属被膜の必要な部分
のみを残して導体回路及び電極を形成し、導体回路の上
面及びセラミック基板の上部露出面に保護膜を形成後、
チップ状に成形することを特徴とするチップ型ヒューズ
の製造法。
1. After roughening the surface of a ceramic substrate so that the surface roughness is 2 to 6 μm Rmax, a metal coating is formed on the surface of the ceramic substrate, and then a resist film is formed on the top surface of the metal coating. After that, the resist film is peeled off by exposure, development, etching, and a conductor circuit and electrodes are formed leaving only the necessary parts of the metal coating, and a protective film is formed on the upper surface of the conductor circuit and the upper exposed surface of the ceramic substrate. ,
A method for manufacturing a chip-type fuse, which is characterized by molding it into a chip.
JP1731691A 1991-02-08 1991-02-08 Manufacture of chip-type fuse Pending JPH04255627A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1731691A JPH04255627A (en) 1991-02-08 1991-02-08 Manufacture of chip-type fuse

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1731691A JPH04255627A (en) 1991-02-08 1991-02-08 Manufacture of chip-type fuse

Publications (1)

Publication Number Publication Date
JPH04255627A true JPH04255627A (en) 1992-09-10

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ID=11940615

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1731691A Pending JPH04255627A (en) 1991-02-08 1991-02-08 Manufacture of chip-type fuse

Country Status (1)

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JP (1) JPH04255627A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996041359A1 (en) * 1995-06-07 1996-12-19 Littelfuse, Inc. Improved method and apparatus for a surface-mounted fuse device
US5790008A (en) * 1994-05-27 1998-08-04 Littlefuse, Inc. Surface-mounted fuse device with conductive terminal pad layers and groove on side surfaces
US5844477A (en) * 1994-05-27 1998-12-01 Littelfuse, Inc. Method of protecting a surface-mount fuse device
US5974661A (en) * 1994-05-27 1999-11-02 Littelfuse, Inc. Method of manufacturing a surface-mountable device for protection against electrostatic damage to electronic components
US6878004B2 (en) 2002-03-04 2005-04-12 Littelfuse, Inc. Multi-element fuse array

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5790008A (en) * 1994-05-27 1998-08-04 Littlefuse, Inc. Surface-mounted fuse device with conductive terminal pad layers and groove on side surfaces
US5844477A (en) * 1994-05-27 1998-12-01 Littelfuse, Inc. Method of protecting a surface-mount fuse device
US5943764A (en) * 1994-05-27 1999-08-31 Littelfuse, Inc. Method of manufacturing a surface-mounted fuse device
US5974661A (en) * 1994-05-27 1999-11-02 Littelfuse, Inc. Method of manufacturing a surface-mountable device for protection against electrostatic damage to electronic components
US6023028A (en) * 1994-05-27 2000-02-08 Littelfuse, Inc. Surface-mountable device having a voltage variable polgmeric material for protection against electrostatic damage to electronic components
WO1996041359A1 (en) * 1995-06-07 1996-12-19 Littelfuse, Inc. Improved method and apparatus for a surface-mounted fuse device
US6878004B2 (en) 2002-03-04 2005-04-12 Littelfuse, Inc. Multi-element fuse array

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