JPH04245868A - Generation method for vertical synchronizing signal in video processing - Google Patents

Abstract

PURPOSE:To continuously obtain a vertical synchronizing signal which is completely synchronized with an output video signal and which can certainly secure a period requested in a bus. CONSTITUTION:A generation part 22 for vertical synchronizing signal generation information judges whether the vertical synchronizing signal exists within the recognition range of the prescribed period or not from vertical synchronizing timing information Stm or pseudo vertical synchronizing signal generation information Stv extracted from an input video signal. When the vertical synchronizing signal exists within the recognition range of the prescribed period, the vertical synchronizing signal of the prescribed period is generated and sent in a vertical synchronizing signal generation circuit 30. When the vertical synchronizing signal does not exist within the recognition range, the vertical synchronizing signal is generated and sent at the other prescribed period.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical synchronization signal generation method for video processing, which is suitable for generating vertical synchronization signals for video signal processing in a video tape recorder.

0002

[Prior Art] Conventionally, in a video tape recorder (hereinafter referred to as VTR as necessary), a vertical synchronizing signal formed in a video signal (composite signal) is extracted using a well-known vertical signal separator circuit. , video signal processing is performed in synchronization with the obtained vertical synchronization signal. for example,
It is used as a reference signal for communication latch processing in digital signal processing circuits or character generators. Furthermore, video processing, etc. is performed by multiple microcomputers (
It is also used for the communication timing on the internal bus when configured using a multi-microcontroller (multi-microcontroller) and the communication timing on the external bus connected to the editing machine.

0003

[Problem to be Solved by the Invention] However, when the vertical synchronization signal extracted using a separator circuit etc. is used as is as in the conventional example, when the level etc. of the input video signal changes, the extracted vertical synchronization signal The signal also fluctuates, and for example, characters such as date and time may flicker on the screen during variable speed playback of a VTR. Also,
When the editing machine is connected, the communication timing and the video signal cannot be synchronized, making it difficult to operate the editing machine normally. Furthermore, there is a drawback that a normal screen may not be obtained due to a lag in bus and communication latch timing.

The present invention was made in view of the above-mentioned problems, and by processing the timing information of the vertical synchronization signal with one microcomputer, it is possible to completely synchronize with the output video signal and ensure the cycle required by the bus. It is an object of the present invention to provide an excellent vertical synchronization signal generation method in video processing that can continuously obtain a guaranteed vertical synchronization signal.

[0005]

[Means for Solving the Problems] The present invention provides, for example, FIG.
Like the vertical synchronization signal creation method in video processing shown in FIG. 22), a first vertical synchronization signal generation means (22, 30) that generates and sends out a vertical synchronization signal of a predetermined period when the vertical synchronization signal exists within a confirmation range of a predetermined period; and a determination section (22). a second vertical synchronization signal generation for generating and transmitting a vertical synchronization signal with a predetermined cycle different from a predetermined cycle when the vertical synchronization signal exists within the confirmation range when the vertical synchronization signal does not exist within the confirmation range; Means (22, 30
).

[0006]

[Operation] In the vertical synchronization signal creation method in video processing of the present invention, the supplied vertical synchronization signal, for example, the vertical synchronization signal extracted from the input video signal, or the pseudo vertical synchronization signal for variable speed playback of a VTR, etc. is predetermined. Determine whether the vertical synchronization signal exists within the confirmation range of the period, generate and send a vertical synchronization signal of the predetermined period if the vertical synchronization signal exists within the confirmation range of the predetermined period, and if the vertical synchronization signal exists within the confirmation range of the predetermined period. If the vertical synchronization signal does not exist within the confirmation range of the predetermined cycle, a vertical synchronization signal is generated and transmitted at a predetermined cycle that is different from the predetermined cycle when the vertical synchronization signal is present within the confirmation range of the predetermined cycle. In this way, by processing the timing information of the vertical synchronization signal with one microcomputer, it can be completely synchronized with the output video signal.
In addition, a vertical synchronization signal that can reliably maintain the cycle required by the bus can be obtained continuously.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the vertical synchronization signal generation method in video processing according to the present invention will be described in detail below with reference to the drawings. FIG. 1 shows the configuration of an embodiment. In Figure 1, 1
0 is a composite synchronization signal separation circuit, which separates the video signal,
For example, a video signal output from a television camera is input. The output signal here is input to the vertical synchronization signal period measuring circuit 12, where vertical synchronization signal timing information (signal) Stm is obtained by calculating the period of the continuous vertical synchronization signal. This vertical synchronization signal timing information Stm is supplied to the system controller 20. The system controller 20 receives the vertical synchronization signal timing information Stm from the vertical synchronization signal period measuring circuit 12, and has a vertical synchronization signal creation information generation section 22 for creating vertical synchronization signal creation information Sda, and a vertical synchronization signal creation information generation section 22 for use during variable speed playback. a pseudo vertical synchronization signal generation information generation unit 24 that generates a pseudo vertical synchronization signal;
It is composed of a communication information generating section 26 that generates upper and lower limits of the communication cycle, that is, cycle information required by the internal bus or the external bus. Furthermore, the vertical synchronization signal generation information Sda generated by the vertical synchronization signal generation information generation section 22 of the system controller 20 is inputted, and the vertical synchronization signal Sa (hereinafter referred to as output vertical synchronization signal) outputted from this is subjected to video signal processing. A vertical synchronizing signal generating circuit 30 is provided for sending out to a commercial IC or the like. Further, a pseudo vertical synchronization signal generation circuit 32 receives pseudo vertical synchronization signal generation information (signal) Str generated by the pseudo vertical synchronization signal generation information generation section 24, and generates and sends out a pseudo vertical synchronization signal Sb. have.

Next, the operation of this configuration will be explained. Figure 2 shows the system controller 20 outputting vertical synchronization signal S.
FIG. 3 is a timing chart related to signal processing when obtaining a, and FIG. 3 is a flowchart thereof. In Figure 2,
Here, vertical synchronization signal timing information Stm from the vertical synchronization signal period measuring circuit 12 or pseudo vertical synchronization signal creation information S from the pseudo vertical synchronization signal creation information generation section 24 is used.
Let TVin be the input vertical synchronization signal timing which is tr. Furthermore, the output timing between the going edges of the output vertical synchronization signal Sa from the vertical synchronization signal generation circuit 30 is set as TVout, and the information created by the communication information generation unit 26, that is, the lower limit of the communication cycle of the internal bus or external bus is set as TVout. Let Tmin be Tmin, and the upper limit be Tmax. Furthermore, Txa is the predetermined value when the input video signal is supplied at the period Tx of the vertical synchronization signal, and Txa is the predetermined value when the input video signal is not supplied at the period Tx of the vertical synchronization signal.
min ≦Tx ≦Tmax ], and when the value excluding the vicinity of Txa is set as Txb, as shown in FIG. 3,
It is determined whether the input vertical synchronization signal timing TVin exists within a check window that is a confirmation range of a predetermined period (step 101). This check window is [TVout+Tmin ≦TVin +Txa≦T
Vout+Tmax]. This range ensures the upper and lower limits of the communication cycle, that is, the cycle required by the internal bus or external bus, and also complies with the vertical synchronization signal timing information Stm or the pseudo vertical synchronization signal creation information Str. In this decision (step 101), if the input vertical synchronization signal (hereinafter referred to as input vertical synchronization signal) is Yes, the vertical synchronization signal generation information generation section 22 determines that the period of the vertical synchronization signal is [TVout=TVin +Txa] is created (step 10).
2). That is, it matches the vertical synchronization signal timing information Stm or the pseudo vertical synchronization signal creation information Str. If the input vertical synchronization signal does not exist (No), the vertical synchronization signal creation information generation unit 22 sets the period of the vertical synchronization signal to [TVout=previous value TVout+Txb]
Vertical synchronization signal creation information Sda determined by is created (step 103). That is, even when the vertical synchronization signal timing information Stm or the pseudo vertical synchronization signal generation information Str is not supplied when there is no input vertical synchronization signal, the output vertical synchronization signal Sa can be obtained without interruption.

In this way, it has become possible to process the timing information of the vertical synchronization signal using a single microcomputer and continuously obtain a vertical synchronization signal that is completely synchronized with the output video signal. Characters on the display screen no longer flicker during variable speed playback. Furthermore, the communication cycle of the bus when the editing machine is connected can be synchronized with the video signal, eliminating the possibility of the editing machine becoming inoperable. In addition, since the vertical synchronization signal is created using a microcomputer program, it is easy to change the period of the vertical synchronization signal, making it easy to change the period of the vertical synchronization signal when processing other television broadcasting systems. become able to.

0010

As can be understood from the above explanation, the vertical synchronization signal generation method in video processing of the present invention can be applied to a vertical synchronization signal that is supplied, for example, a vertical synchronization signal extracted from an input video signal, or It is determined whether a pseudo vertical synchronization signal for variable speed playback of a VTR, etc. exists within a predetermined cycle confirmation range, and if the vertical synchronization signal exists within a predetermined cycle confirmation range, a predetermined cycle vertical synchronization signal is detected. and transmits the vertical synchronization signal at a predetermined period that is different from the predetermined period when the vertical synchronization signal exists within the confirmation range of the predetermined period when the vertical synchronization signal does not exist within the confirmation range. Since the timing information of the vertical synchronization signal is processed by a single microcomputer, the vertical synchronization signal can be completely synchronized with the output video signal and ensure the cycle required by the bus. It has the advantage that the signal can be obtained continuously.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a vertical synchronization signal generation method in video processing of the present invention.

FIG. 2 is a timing chart related to output vertical synchronization signal generation processing, used to explain the operation of the embodiment shown in FIG. 1;

FIG. 3 is a flowchart used to explain the operation of the embodiment shown in FIG. 1 and showing the content of vertical synchronization signal creation processing.

[Explanation of symbols]

10 Composite synchronization signal separation circuit 12 Vertical synchronization signal period measurement circuit 20 System controller 22 Vertical synchronization signal creation information generation section 24 Pseudo vertical synchronization signal creation information generation section 26 Communication information generation section 30 Vertical synchronization signal creation circuit 32 Pseudo vertical synchronization signal creation Circuit Sa Output vertical synchronization signal Sb Pseudo vertical synchronization signal Stm Vertical synchronization signal timing information Str Pseudo vertical synchronization signal creation information Sda Vertical synchronization signal creation information

Claims (2)

[Claims] Claim 1: A determination unit that determines whether a supplied vertical synchronization signal exists within a confirmation range of a predetermined cycle; a first vertical synchronization signal generating means for generating and transmitting a vertical synchronization signal with a predetermined cycle; and a first vertical synchronization signal generation means for generating and transmitting a vertical synchronization signal of a predetermined period; 1. A vertical synchronization signal generation method for video processing, comprising: second vertical synchronization signal generation means for generating and transmitting a vertical synchronization signal at a predetermined cycle different from a predetermined cycle of the video processing. [Claim 2] The input vertical synchronization signal timing is TVi.
n, the output vertical synchronization signal timing is TVout, the lower limit of the bus communication cycle is Tmin, the upper limit of the bus communication cycle is Tmax, the cycle of the vertical synchronization signal is a predetermined value when an input video signal is supplied, Txa, vertical This is the period of the synchronization signal, and when the input video signal is not supplied, Tmin ≦
When Tx ≦Tmax and Txb is the value excluding the vicinity of Txa, the confirmation range of the predetermined period is TVout+Tmin ≦TVin +Txa≦TV
The period of the vertical synchronization signal generated by the first vertical synchronization signal generation means is determined by out+Tmax, and the period of the vertical synchronization signal generated by the second vertical synchronization signal generation means is determined by TVout=TVin +Txa. = A vertical synchronization signal creation method in video processing characterized by determining the previous value of TVout+Txb.