JPH04245680A - Photoelectron integrated circuit - Google Patents

Abstract

PURPOSE:To provide a circuit architecture and structure for an optical input/ output SR flip flop which shows a stabilized bistable characteristic and provides a large extinction ratio of ON/OFF. CONSTITUTION:A first light emitting device 6 and a first phototransistor 7 are connected with each other in parallel to which a first load resistor 8 is connected in serial, thereby forming a first optical inversion circuit 9. A second optical inversion circuit 13 is also formed in the same architecture. The optical inversion circuit allows output light to come to a halt when incident light enters. The two optical inversion circuits are connected with each other in such a fashion that their output lights are the input lights of their respective counterpart. As a result, two stabilized states are available wherein the first optical inversion circuit emits light while the second optical inversion circuit fails to emit light and the second optical inversion circuit emits light while the first optical inversion circuit fails to emit light.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the circuit configuration and structure of a set-reset (SR) flip-flop that performs input and output using optical signals.

0002

2. Description of the Related Art An example of a bistable device that performs input and output using optical signals is an image storage device disclosed in Japanese Patent Application No. 60-184047. This device includes an optical bistable element 5 in which a light emitting element 48 and a phototransistor 47 capable of receiving light emitted from the light emitting element are connected in series as shown in FIG.
5 are arranged in an array on a substrate. electrode 50,
When a voltage is applied to the phototransistor 51 and the input light 50 enters the phototransistor 47, the phototransistor 47 is turned on. As a result, the light emitting element 48 is turned on and its feedback light 49 is input to the phototransistor 47, and the optical bistable element 55 is activated to maintain the on state and continue to emit output light even if the input light is stopped. have characteristics. In order to turn off the above-mentioned optical bistable device, it is necessary to temporarily reduce the power supply voltage to 0, but this point was improved so that the optical bistable device could be turned off by an optical signal. 15
This is an optical storage device disclosed in Japanese Patent No. 1578. This is shown in FIG. In this device, a light emitting element 61 and a first phototransistor 62 are connected in series to form an optical bistable element 6.
3, and a second phototransistor 64 is connected in parallel thereto. This circuit uses the characteristics of an optical bistable element, which turns on when light is input and emits light by itself, and even when the input light is stopped, it remains on and continues to emit output light. Phototransistor 6
When light is input to 2, a current flows and the light emitting element 61 emits light.
Even if the input light is stopped, the light from the light emitting element 61 is input to the first phototransistor 62, so the optical bistable element continues to maintain the on state. Next, the second phototransistor 6
When light is input to the phototransistor 4, a current flows through the second phototransistor 64, and a voltage drop due to the external resistor 65 turns off the optical bistable element. In this way, it can be turned on by the first phototransistor and turned off by the second phototransistor.

[0003] The above device was further developed in a cascade connection in which optical signals were input/output perpendicular to the substrate surface in the patent application filed in 1983-27.
This is an optoelectronic integrated circuit disclosed in Japanese Patent No. 8698. A circuit diagram of this circuit is shown in FIG. This is the first light emitting element 7
A second transistor 74 and a second light emitting element 75 are connected in parallel to a photostable element 73 composed of a phototransistor 1 and a first phototransistor 72. The operation of this circuit will be explained below. The series connection circuit of the first light emitting element 71 and the first phototransistor 72 functions as an optical bistable element 73 as in the case of FIG. That is, when a write signal light equal to or less than the longest receivable wavelength is input to the base of the first phototransistor 72, a collector current flows.
The first light emitting element 71 emits an output signal light having a wavelength equal to that of the base layer of the first phototransistor 72 . Even if the input of the write signal light is stopped here, the first phototransistor 72 receives the feedback light from the first light emitting element 71, thereby maintaining the on state. Furthermore, when an erasing signal light having a wavelength equal to that of the base layer or less than the longest receivable wavelength is inputted to the second phototransistor 74, current no longer flows to the first light emitting element 71, so that the circuit returns to the off state.

In this optoelectronic integrated circuit, a second light emitting element is added that emits light when the optical bistable element is off, so that the output light from the circuit becomes the input light to the next circuit. First light emitting element 1 and first phototransistor 2
A second phototransistor 4 and a second light emitting element 5 are connected in parallel to the optical bistable element 3, which is connected in series. By making the rising voltage of the second light emitting element larger than the rising voltage of the optical bistable element, the second light emitting element does not emit light when the optical bistable element is in the on state.

[0005]An example of an optical bistable circuit that enables cascade connection using optical signals is also presented at the 7th International Conference on Integrated Optical and Optical Fiber Communications (IOOC, IOOC'89 In
tegrated optics and optic
Al Fiber Communication) Technical Digest Paper No. 20C3-4 (K. Har
a and others: “A differential optica
l switching device using
Parallelly connected AlGa
This is shown in Figure 8. This is shown in Figure 8. This is a system that connects two optical bistable devices with a pnpn structure in parallel and connects them to a common load resistor to perform differential operation. Of the two optical bistable elements, only the one with the stronger input light (PA, PB) turns on and operates.In other words, since both the input light and the output light are differential signals, It functions as an SR flip-flop that performs input and output using optical signals.

[0006]

[Problem to be solved by the invention] Japanese Patent Application No. 63-2786
Optoelectronic integrated circuit or IO shown in Publication No. 98
According to the differential optical switch shown in the OC'89 Technology Digest, it is possible to connect optical bistable circuits in cascade using only optical signals. However, in the former circuit, the second light emitting element stops emitting light due to the difference in rising voltage between the optical bistable element and the second light emitting element, so the on/off extinction ratio of the second light emitting element is It doesn't get too big. In addition, in the latter type of differential optical switch, two optical bistable elements, which themselves are bistable, are connected in parallel and operated differentially, so depending on the operating conditions, both optical bistable elements may be turned on. or both may turn off. An object of the present invention is to provide a circuit configuration and structure of an optical input/output SR flip-flop that exhibits stable bistable characteristics and has a large on/off extinction ratio.

[0007]

[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention provides a first light emitting element, a first phototransistor connected in parallel to the first light emitting element, and a first phototransistor connected in parallel to the first light emitting element.
a first optical inversion circuit including a first load resistor connected in series to a light emitting element; a second phototransistor connected in parallel to a second light emitting element; and a second phototransistor connected in parallel to the second light emitting element; a second optical inversion circuit including a second load resistor connected in series to a second light emitting element, the second phototransistor receives light emitted from the first light emitting element;
An optoelectronic integrated circuit is configured by a circuit in which the first phototransistor receives light emitted from the second light emitting element. Further, a semiconductor substrate, first and second mesas formed by a collector layer, a base layer, an emitter layer, an active layer, and a cladding layer sequentially stacked on the semiconductor substrate, and the cladding layer of the first mesa. a first wiring electrically connecting the layer and the collector layer of the second mesa;
An optoelectronic integrated circuit is configured with a structure including a second wiring electrically connecting the cladding layer of the second mesa and the collector layer of the first mesa.

[0008]

[Operation] The basic element of this optoelectronic integrated circuit is an optical inversion circuit in which a light emitting element and a phototransistor are connected in parallel, and a load resistor is connected in series with this. In this optical inversion circuit, when no input light enters the phototransistor, current flows through the light emitting element and outputs light, but when input light enters the phototransistor, no current flows through the light emitting element and the output is output. Light will no longer be emitted. That is,
This is an inverter that performs input and output using optical signals. This optoelectronic integrated circuit includes two of these optical inversion circuits, and the output light of each becomes the input light of the other. Therefore, there are two stable states: a state in which the first light inversion circuit emits light and the second light inversion circuit does not emit light, and a state in which the second light inversion circuit emits light and the first light inversion circuit does not emit light. exists. In order to make a transition between these two stable states, it is sufficient to input signal light from the outside to the phototransistor included in the light inverting circuit that is emitting light. Furthermore, the light emitted from the light emitting element not only serves as input light to the other optical inversion circuit, but also is output to the outside as signal light.

There are various methods for making the output light of each optical inverting circuit the input light of the other, but there is a method in which the first light emitting element and the second optical inverting circuit constituting the first optical inverting circuit are connected to each other. If the second phototransistor constituting the component has a laminated structure, and the second light emitting element constituting the second optical inversion circuit and the first phototransistor constituting the first photoinversion circuit have a laminated structure, high efficiency can be achieved. Optical connection is possible. Here, electrical connection between the first light emitting element and the first phototransistor and between the second light emitting element and the second phototransistor can be easily realized by wiring on the semiconductor substrate.

As is clear from the operating principle of the present optoelectronic integrated circuit, only one of the optical inverting circuits always emits light, and the other optical inverting circuit does not emit light at all. Furthermore, which optical inversion circuit emits light can be easily controlled by external signal light, and the output light can be easily extracted. Furthermore, cascade connection is also possible in which this output light is used as input light for the next stage.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a circuit diagram of an optoelectronic integrated circuit according to an embodiment of the present invention. A first light emitting element 6 and a first phototransistor 7 are connected in parallel, and a first load resistor 8 is connected in series to form a first optical inversion circuit 9. Similarly, a second light emitting element 10 and a second phototransistor 11 are connected in parallel, and a second load resistor 12 is connected thereto.
are connected in series to form a second optical inversion circuit 13. Light emission from the first light emitting element 6 is incident on the second phototransistor 11, and light emission from the second light emitting element 10 is incident on the first phototransistor 7.

First, the operation of the first optical inversion circuit 9 will be explained. The first light inverting circuit 9 connects the first light emitting element 6 when input light is not input to the first phototransistor 7.
A current flows through the first phototransistor 7 and output light is emitted.However, when input light enters the first phototransistor 7, no current flows through the first light emitting element 6 and no output light is emitted. Quantitatively, the relationship between the input light and the output light has a characteristic as shown by the solid line in FIG. As long as the input light is small, the gain of the phototransistor is small, so the decrease in output light as the input light increases is gradual; however, as the input light increases further, the gain of the phototransistor increases and the output light decreases rapidly. . In a phototransistor, current flows when the voltage between the collector and emitter is almost 0, but in a light emitting element, current does not flow unless a voltage higher than the rising voltage of the diode is applied, so when the input light exceeds a certain value, the current flows from the light emitting element. The output light of becomes completely 0. Furthermore, since the phototransistor has a gain, the input optical power Pin required to reduce the output light to 0 is sufficiently smaller than the original output optical power Pout. That is, the present optical inversion circuit has ideal characteristics as an inverter.

The present embodiment includes this first optical inverting circuit and a second optical inverting circuit which operates in exactly the same manner as the first optical inverting circuit, and the output light of each circuit becomes the input light of the other circuit. Therefore, the characteristics of the second optical inversion circuit are as shown by the broken line in FIG. As is clear from FIG. 2, this circuit has two states: a first state A in which the first light inverting circuit emits light and a second light inverting circuit does not emit light, and a second state A in which the second light inverting circuit emits light and the first light inverting circuit emits light. The inverting circuit takes two stable states, a second state B in which no light is emitted. In order to make a transition between these two stable states, it is sufficient to input signal light from the outside to the phototransistor included in the light inverting circuit that is emitting light. In addition, the light emitted from the light emitting element not only becomes input light to the other optical inverting circuit, but also
It is also output to the outside as signal light.

An optoelectronic integrated circuit according to a second embodiment of the present invention is shown in FIGS. 3 and 4. 3 is an overall plan view, and FIG. 4 is a sectional view taken along the dashed line X-Y in FIG. 3. As shown in FIG.
InP type collector layer 15, p type InGaAsP base layer 16, n type InP emitter layer 17, n type InGaAsP
A first mesa 20 shown in FIG. 3 is formed by the active layer 18 and the p-type InP cladding layer 19. The cladding layer 19, the active layer 18, and the emitter layer 17 function as a light emitting element, and the collector layer 15, the base layer 16, and the emitter layer 17 function as a phototransistor. In the first mesa 20, the emitter layer 17 or the collector layer 15 is partially exposed, with the first anode electrode 21 on the cladding layer 19, the first emitter electrode 22 on the emitter layer 17, and the collector layer 15. A first collector electrode 23 is formed thereon. Further, in the collector layer 15, a portion between the first collector electrode 23 and the first resistance electrode 24 is used as a load resistor. The second mesa 25 also has exactly the same structure as this first mesa 20, and has a second anode electrode 26.
, second emitter electrode 27, second collector electrode 28,
A second resistance electrode 29 is formed.

First anode electrode 21 of first mesa 20
and the second collector electrode 28 of the second mesa 25 are connected by the first wiring 30, and the second anode electrode 26 of the second mesa 25 and the first collector electrode 2 of the first mesa 20 are connected to each other by the first wiring 30.
3 are connected by a second wiring 31. Further, the first resistance electrode 24 and the second resistance electrode 29 are connected to the power supply wiring 32.
The first emitter electrode 22 and the second emitter electrode 27 are connected to a ground wiring 33 . The equivalent circuit of this embodiment is shown in FIG. 1, which will be explained below. If the phototransistor and load resistor included in the first mesa are the first phototransistor and the first load resistor, and the light emitting element included in the second mesa is the first light emitting element, then these An optical inversion circuit is constructed. That is, between the first resistance electrode 24 and the first collector electrode 23 is the first load resistance, between the first collector electrode 23 and the first emitter electrode 22 is the first phototransistor, and the second anode. Since the first light emitting element is located between the electrode 26 and the second emitter electrode 27, the first light emitting element and the first phototransistor are connected in parallel.
A collector of the first phototransistor is connected to a power supply wiring via a first load resistor, and an emitter is connected to a ground wiring. Similarly, a second optical inversion circuit is configured by the phototransistor and load resistor included in the second mesa and the light emitting element included in the first mesa.

The circuit shown in FIG. 1 can be realized by a structure other than that shown in FIG. 3, but in the structure shown in FIG. The second light emitting element has a laminated structure as the first mesa, and the second phototransistor forming the second light inversion circuit and the first light emitting element forming the first light inversion circuit form the second light inversion circuit. It has a laminated structure as a mesa. Therefore, highly efficient optical connection can be made between the input and output of the first optical inversion circuit and the second optical inversion circuit. Further, input light from the outside is inputted to the first or second phototransistor from the back surface of the semiconductor substrate, and output light to the outside is emitted from the front surface of the semiconductor substrate. Therefore, not only is cascade connection based on optical signals possible in principle, but also cascade connection can be easily achieved by stacking semiconductor substrates on which the present optoelectronic integrated circuits are formed.

[0017]

Effects of the Invention This optoelectronic integrated circuit functions as an SR flip-flop that performs input/output using optical signals. Due to its operating principle, only one of the light inversion circuits emits light, and the other light inversion circuit does not emit light at all. Furthermore, which optical inversion circuit emits light can be easily controlled by external signal light, and the output light can be easily extracted. Furthermore, cascade connection is also possible in which this output light is used as input light for the next stage.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an optoelectronic integrated circuit according to an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing the relationship between input optical power and output optical power of the optical inversion circuit included in the embodiment shown in FIG. 1;

FIG. 3 is a plan view of an optoelectronic integrated circuit according to a second embodiment of the present invention.

FIG. 4 is a cross-sectional view of the optoelectronic integrated circuit of the second embodiment shown in FIG. 3;

FIG. 5 is an optical bistable element of a conventional image storage device.

FIG. 6 is a circuit diagram of a conventional optical storage device.

FIG. 7 is a circuit diagram of a conventional optoelectronic integrated circuit.

FIG. 8 shows an optical bistable device with a conventional pnpn structure.

[Explanation of symbols]

6 First light emitting element 7 First phototransistor 8 First load resistance 9 First optical inversion circuit 10 Second light emitting element 11 Second phototransistor 12 Second load resistance 13 Second optical inversion circuit 14 Semiconductor substrate 15 Collector layer 16 Base layer 17 Emitter layer 18 Active layer 19 Cladding layer 20 First Mesa 25 Second Mesa 30 First wiring 31 Second wiring

Claims (2)

[Claims] 1. A first light emitting device including a first light emitting element, a first phototransistor connected in parallel to the first light emitting element, and a first load resistor connected in series to the first light emitting element. a second light-emitting element, a second phototransistor connected in parallel to the second light-emitting element, and a second load resistor connected in series to the second light-emitting element; the second phototransistor receives light emitted from the first light emitting element, and the first phototransistor receives light emitted from the second light emitting element. An optoelectronic integrated circuit characterized by: 2. First and second semiconductor substrates formed by a semiconductor substrate, a collector layer, a base layer, an emitter layer, an active layer, and a cladding layer sequentially stacked on the semiconductor substrate.
a mesa, the cladding layer of the first mesa and the second mesa.
a first wiring that electrically connects the collector layer of the mesa, and a second wiring that electrically connects the cladding layer of the second mesa and the collector layer of the first mesa. An optoelectronic integrated circuit characterized by: