JPS6130089A - Optical logic circuit - Google Patents

Optical logic circuit

Info

Publication number
JPS6130089A
JPS6130089A JP15058784A JP15058784A JPS6130089A JP S6130089 A JPS6130089 A JP S6130089A JP 15058784 A JP15058784 A JP 15058784A JP 15058784 A JP15058784 A JP 15058784A JP S6130089 A JPS6130089 A JP S6130089A
Authority
JP
Japan
Prior art keywords
optical
phototransistors
circuit
semiconductor laser
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15058784A
Other languages
Japanese (ja)
Inventor
Yuichi Odagiri
小田切 雄一
Tomoji Terakado
知二 寺門
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP15058784A priority Critical patent/JPS6130089A/en
Publication of JPS6130089A publication Critical patent/JPS6130089A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/026Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F3/00Optical logic elements; Optical bistable devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/06Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/0607Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying physical parameters other than the potential of the electrodes, e.g. by an electric or magnetic field, mechanical deformation, pressure, light, temperature
    • H01S5/0608Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying physical parameters other than the potential of the electrodes, e.g. by an electric or magnetic field, mechanical deformation, pressure, light, temperature controlled by light, e.g. optical switch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/026Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • H01S5/0262Photo-diodes, e.g. transceiver devices, bidirectional devices

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Nonlinear Science (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To enable integration of an optical ligic circuit, by forming a plurality of phototransistors on a semiconductor laser in an integrated manner, and electrically isolating the phototransistors from each other. CONSTITUTION:Two phototransistors Tr 2 are formed on a semiconductor laser 1 in series in the direction of the resonator axis. Thereafter, a groove 116 is provided in such a manner as to cut the resonator axis for the purpose of increasing the electrical resistance between the two phototransistors Tr 2. Thus, the phototransistors Tr 2 can be substantially isolated electrically from each other. When signal beam 200 are simultaneously injected into the phototransistors Tr 2, the laser 1 is allowed to oscillate. When either one of the beam 200 is absent, no oscillation occurs. In this way, it is possible to form an optical integrated AND circuit which operates at low power consumption. An OR circuit can also be formed by changing the size of the beam 200 in this optical logic circuit. When the width of the groove 116 is enlarged, the optical output-electric current characteristics or the like of the laser 1 have hysteresis. Therefore, the optical logic circuit can operate as a memory circuit.

Description

【発明の詳細な説明】 (産業の利用分野) 本発明は、光情報処理の演算機能を行々う光論理回路に
関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an optical logic circuit that performs arithmetic functions for optical information processing.

(従来技術とその問題点) 近年、膨大な情報を処理するコンピュータの開発が進め
られているが、それに用いられる技術は情報の運び手が
電子である半導体エレクトロニクスが中心と言える。し
かしながら、人間を含めた自然界の情報は視覚による認
′識が中心であることから、多くの現象の認識や解析を
光による画像のままで処理できる方が望ましい。また光
には、電子にない、周囲の電磁波ノイズを受けない等の
耐環境性があシ、実用化の進んでいる光通信との結合に
も効果的と考えられる。そのためには、配線を光ファイ
バや光導波路に置き換えるとともに、演算機能も光で処
理できるような光論理回路の開発が必要である。光論理
回路の構想は、半導体レーザが発明された1960年代
後半から多種多様な構造の回路が提案されている。これ
らの代表的なものとしては、光検出素子と半導体レーザ
の組合わせによるものが掲げられ、例えばバゾフ(N、
G。
(Prior art and its problems) In recent years, the development of computers that process vast amounts of information has been progressing, and the technology used for this can be said to be centered around semiconductor electronics, in which the information carrier is electronic. However, since information in the natural world, including that of humans, is mainly recognized through visual perception, it would be desirable to be able to process the recognition and analysis of many phenomena using optical images as they are. In addition, light has environmental resistance that electrons do not have, such as not being affected by surrounding electromagnetic noise, and is considered to be effective in combining with optical communication, which is increasingly being put into practical use. To achieve this, it is necessary to replace wiring with optical fibers and optical waveguides, and to develop optical logic circuits that can perform calculation functions using light. Since the concept of optical logic circuits was invented in the late 1960s, when semiconductor lasers were invented, circuits with various structures have been proposed. Typical of these are those that combine a photodetector and a semiconductor laser, such as Bazov (N,
G.

BASOV )氏等によシラジオ・エンジニアリング・
アンド・エレクトロニック・フィツクス(RADIOE
NGINEERING AND ELECTRONIC
PHY−8IC8)誌の1969年、第14巻、第14
09−1417頁に記載された論文がある。これは、信
号光を光検出素子で検出し、光電変換したあとで電流増
幅して半導体レーザへ順方向あるいは逆方向電流として
注入する方法をとっている。この電流の方向を選択する
ことによシ、「アンド」、「オア」 。
Mr. BASOV) et al.
and electronic fixtures (RADIOE)
NGINEERING AND ELECTRONIC
PHY-8IC8) Magazine, 1969, Volume 14, No. 14
There is an article written on pages 09-1417. This method uses a method in which signal light is detected by a photodetection element, photoelectrically converted, and then current amplified and injected into a semiconductor laser as a forward or reverse current. By selecting the direction of this current, you can use ``and'' and ``or.''

「メモリ」等の論理機能を実現できる。これをさらに発
展させてビット数を増加させるためには、半導体レーザ
と光検出素子の1組を1ビツトとして、これらを集積化
すればよい。しかしながら、1ビツトあたシ画素子の間
に電流増幅用の電気回路がはいるため、このような方法
での集積化は実現できないという問題があった。したが
って光論理回路としては、半導体レーザと光検出素子だ
けで集積化できるような構造のものを実現することが望
まれていた。
Logical functions such as "memory" can be realized. In order to further develop this and increase the number of bits, one set of a semiconductor laser and a photodetector element may be treated as one bit, and these may be integrated. However, since an electric circuit for current amplification is inserted between each pixel element for each bit, there is a problem that integration using this method cannot be realized. Therefore, it has been desired to realize an optical logic circuit with a structure that can be integrated with only a semiconductor laser and a photodetector element.

(発明の目的) 本発明は、このような従来の欠点を除去せしめて、集積
化のできる光論理回路を提供することにある。  。
(Objective of the Invention) An object of the present invention is to eliminate such conventional drawbacks and provide an optical logic circuit that can be integrated. .

(発明の構成) 本発明は、半導体レーザと光トランジスタからなる発光
受光集積回路であって、複数個の光トランジスタ゛が半
導体レーザの共通した半導体層上に共振器軸方向に沿っ
て並んで積層され、且つ、光トランジスタ相互が電気的
に遮断されている点に特徴がある。
(Structure of the Invention) The present invention is an integrated light emitting/receiving circuit consisting of a semiconductor laser and a phototransistor, in which a plurality of phototransistors are stacked side by side along a resonator axis direction on a common semiconductor layer of the semiconductor laser. , and is characterized in that the phototransistors are electrically isolated from each other.

(発明の作用・原理) 本発明は、上述の構成をとることによシ従来技術の問題
点を解決した。まず半導体レーザ上に、共振器軸方向に
沿って光トランジスタが複数個差べられている。光トラ
ンシタは通常の光検出素子であるフォトダイオード、P
−I−Nフォトダイオードとちがって電流増幅の効果が
あり、単独素子として使わないかぎ如、数十μAの暗電
流の存在を無視できる。また電流増幅機能があってもア
バ2ンシエフオトダイオードのように数十Vもの印加電
圧を必要としない特徴があるため半導体レーザ上に光ト
ランジスタを積層する方法が可能となる。個々の光トラ
ンジスタ同士は電気的に遮断されるように、その間を溝
もしくは高抵抗層で形成させる。信号光の光トランジス
タへの光注入によって生じた光電流は、個々の光トラン
ジスタを区切る溝もしくは高抵抗層のために、光トラン
ジスタ直下の活性層での利得を高めるだけに作用する。
(Operation/Principle of the Invention) The present invention solves the problems of the prior art by adopting the above-described configuration. First, a plurality of optical transistors are arranged on a semiconductor laser along the cavity axis direction. The optical transmitter is a photodiode, which is a normal photodetection element, P
Unlike the -IN photodiode, it has a current amplification effect, and as long as it is not used as an individual element, the existence of a dark current of several tens of microamperes can be ignored. Furthermore, even if it has a current amplification function, it does not require an applied voltage of several tens of volts unlike an aberration photodiode, so it becomes possible to stack a phototransistor on a semiconductor laser. A groove or a high resistance layer is formed between the individual phototransistors so that they are electrically isolated from each other. The photocurrent generated by the optical injection of signal light into the phototransistor acts only to increase the gain in the active layer directly below the phototransistor because of the grooves or high resistance layers that separate the individual phototransistors.

このため例えば光トランジスタ2ケの場合を考えると、
あたかも活性層が共振器軸方向に2分割されたものと見
なされる。そこで一方の光トランジスタをリセット信号
用とし、他方の光トランジスタをセット信号用と考えれ
ば、乏ケの光トランジスタへの信号光の組合せによシ、
任意の演算機能をもたせることができる。光トランジス
タの各々に信号光を注入することによって生じた光電流
をIA、IB  としたとき、半導体レーザの発振電流
閾値Ith+に対して、(1) Ia、IB<Ith+
<IA+In  を満足する場合には「アンド」回路と
なり、〔2〕I66、<IA、IBを満足する場合には
「オア」回路となる。また「メモリ」回路に関しては、
説明を分かルやすくするため、第1図にその動作方法と
特性を示す。活性層の一部に可飽和吸収体を設けると、
一般に半導体レーザは光入出力特性及び光出力−電流特
性にヒステリシスを示す(第1図(a))。
Therefore, for example, if we consider the case of two phototransistors,
It is considered as if the active layer was divided into two in the resonator axis direction. Therefore, if we consider that one phototransistor is used for the reset signal and the other phototransistor is used for the set signal, the combination of signal light to the scarce phototransistors can be achieved.
It can have any arithmetic function. When the photocurrents generated by injecting signal light into each phototransistor are IA and IB, with respect to the oscillation current threshold Ith+ of the semiconductor laser, (1) Ia, IB<Ith+
If it satisfies <IA+In, it becomes an "AND" circuit, and if it satisfies [2]I66, <IA, IB, it becomes an "OR" circuit. Regarding the "memory" circuit,
To simplify the explanation, FIG. 1 shows its operating method and characteristics. When a saturable absorber is provided in a part of the active layer,
Semiconductor lasers generally exhibit hysteresis in their optical input/output characteristics and optical output-current characteristics (FIG. 1(a)).

このとき発振開始電流閾値を■tに19発発振開始電流
閾値I−t−h意 とする。先づIa−IA<I+hx
<IsくI↓)Is < IA+IBを満足するような
条件の下で、IB を一定周期毎に零に戻るような周期
信号とする(第1図(b))。次に第1図(clに示す
ように1周期毎に信号光のパルスをオン、オフさせると
、半導体レーザの光出力Poutは光信号Aの光入力P
in囚がトリガとなって一定期間オン状態を維持するこ
とができる(第1図(d))。
At this time, the oscillation starting current threshold is set to 19 oscillation starting current threshold I-t-h. First Ia-IA<I+hx
<Is I↓) Under conditions that satisfy Is < IA+IB, IB is made to be a periodic signal that returns to zero at regular intervals (FIG. 1(b)). Next, as shown in FIG.
When an inmate acts as a trigger, the on state can be maintained for a certain period of time (FIG. 1(d)).

以上の様にして信号光が、光トランジスタを介すだけで
、半導体レーザに命令を与えて、光−光の演算機能が構
成される。構造上では半導体レーザ上に光トランジスタ
を並べるだけでよく、電流増幅用の電気回路を必要とす
ることなく、したがって光論理回路の集積化を容易に実
現できる。
As described above, the signal light gives a command to the semiconductor laser simply by passing through the optical transistor, and a light-to-light calculation function is configured. Structurally, it is sufficient to simply arrange optical transistors on a semiconductor laser, and there is no need for an electric circuit for current amplification, so that the integration of optical logic circuits can be easily realized.

(実施例) 以下本発明の実施例について図面を参照して詳細に説明
する。
(Example) Examples of the present invention will be described in detail below with reference to the drawings.

第2図は本発明の実施例を示す斜視図を示す。FIG. 2 shows a perspective view of an embodiment of the invention.

この実施例は、半導体レーザ1の上に2個の光トランジ
スタ2が共振器軸方向に沿って並ぶように構成される。
This embodiment is configured such that two optical transistors 2 are arranged above a semiconductor laser 1 along the resonator axis direction.

製作順序は、n−InP基板100上にn−InPバッ
ファ層101.ノンドープのInGaAsP活性層10
2.p−InPクラッド層103、を順次結晶成長させ
たDH基板上に、フォトレジストを塗布して通常のフォ
トリソグラフィーとエツチングによシ2つの溝で狭まれ
たメサ104を製作する。次にこのウェハを液相成長法
によ)、p−InPの第1の電流ブロック層105゜n
−InPの第2の電流プOyり層106.p−InPの
埋め込み層107.光トランジスタ2との電気的結合層
108.n−InPエミッタ層111 。
The manufacturing order is as follows: n-InP buffer layer 101 . Non-doped InGaAsP active layer 10
2. A photoresist is applied onto a DH substrate on which a p-InP cladding layer 103 is successively crystal-grown, and a mesa 104 narrowed by two grooves is fabricated by ordinary photolithography and etching. Next, this wafer was coated with a p-InP first current blocking layer (105°n) using a liquid phase growth method.
- InP second current propagation layer 106. Buried layer 107 of p-InP. Electrical coupling layer 108 with phototransistor 2. n-InP emitter layer 111.

p−InGaAmPペース層112 e n  I n
Pコレクタ層113を順次成長させて結晶成長を終える
。半導体レーザの結晶成長に関しては北村氏等の特願昭
56−166666に詳しい。ここで電気的結合層10
8とはトンネル接合を利用した層のことである。次に光
トランジスタ2の接合容量を小さくし、さらに2つに分
割するため例、形状を円筒状としその周囲をn−InP
エミッタ層111まで除去して、n−InPコレクタ層
113の平面に信号光200を注入するための受光面1
14とそのまわシのプラス電極115を形成する。その
あとで2つの光トランジスタ20間の電気抵抗を大きく
するため、共振器軸を分断するかたちで溝116を設け
る。溝116はp−InPの埋め込み層107をエツチ
ングで除くことで形成した。これによシ、光トランジス
タ2間を電気的にほぼ遮断できた。
p-InGaAmP space layer 112 e n I n
The crystal growth is completed by sequentially growing the P collector layer 113. Regarding the crystal growth of semiconductor lasers, details can be found in Japanese Patent Application No. 166,666/1983 by Mr. Kitamura et al. Here, the electrical coupling layer 10
8 is a layer using a tunnel junction. Next, in order to reduce the junction capacitance of the phototransistor 2 and further divide it into two, for example, the shape is made cylindrical and the surrounding area is made of n-InP.
Light receiving surface 1 for injecting signal light 200 into the plane of the n-InP collector layer 113 by removing up to the emitter layer 111
14 and a positive electrode 115 around it are formed. After that, in order to increase the electrical resistance between the two phototransistors 20, a groove 116 is provided to separate the resonator axis. The groove 116 was formed by removing the p-InP buried layer 107 by etching. As a result, the optical transistors 2 were almost electrically isolated.

次に所望の厚み9通常100〜150μm程度にれ−I
nP 基板100を研磨し、マイナス電極117を形成
する。信号光2000波長は1.3μmとし、ペース層
112の組成は波長にして1.5μmになるようにした
。そのため光ファイバ118からの信号光200は、光
トランジスタ2の受光面114に合うようなスポット径
に結合回路119を用いて調整したあと、光トランジス
タ2に光注入される。各々の光トランジスタ2の光ゲイ
ンを1000とし、光−電変換効率を0.7とすれば、
各信号光200の光入力30 pWに対して2分された
半導体レーザ1には各々21mAの電流が注入される。
Next, the desired thickness 9 is usually about 100 to 150 μm.
The nP substrate 100 is polished to form a negative electrode 117. The wavelength of the signal light 2000 was set to 1.3 μm, and the composition of the paste layer 112 was set to a wavelength of 1.5 μm. Therefore, the signal light 200 from the optical fiber 118 is injected into the phototransistor 2 after being adjusted to a spot diameter that matches the light receiving surface 114 of the phototransistor 2 using the coupling circuit 119 . If the optical gain of each phototransistor 2 is 1000 and the photoelectric conversion efficiency is 0.7, then
For an optical input of 30 pW of each signal light 200, a current of 21 mA is injected into each of the two semiconductor lasers 1.

今回用いた埋め込み構造の半導体レーザ1の発振電流[
Eを30mAとすると、2つの光トランジスタ2へ信号
光200が同時に30μW注入されたときに半導体レー
ザ1は発振状態であった。したがっていづれか一方の信
号光200が欠けた場合には、発振は起こらな込。この
ようにして「アンド」回路を低消費電力で集積できるこ
とがわかる。この光論理回路に関しては、信号光200
の大きさを変える仁とによシ「オア」回路も可能である
。また、この光論理回路を製作するKあたって溝116
0幅を拡くすると、2つ光トランジスタ2からの光電流
が溝116直下の活性層102に注入されにくくなシ、
これによ〕可飽和吸収体として溝116が機能すること
ができる。したがって半導体レーザ1の先出カー電流特
性や光入出力特性にヒステリシスを生ずるので、「メモ
リ」回路としての動作も可能である。この実施例の半導
体レーザ1の大きさはメサ1040幅が1,5μm、共
振器長が150μm、溝116によ多分割された2つの
共振器軸方向の長さが各々70μ’170itm、溝1
16幅が1011mであシ、光トランジスタ2からの光
電流によって発振する光の波長が1.2μmの特性を有
している。また光トランジスタ2の受光面114の口径
は20μmとした。この仕様のもとで、集積化のできる
光論理回路を実現できた。
The oscillation current of the buried structure semiconductor laser 1 used this time [
Assuming that E is 30 mA, the semiconductor laser 1 was in an oscillating state when 30 μW of signal light 200 was simultaneously injected into the two optical transistors 2. Therefore, if one of the signal lights 200 is missing, oscillation will not occur. It can be seen that the "AND" circuit can be integrated with low power consumption in this way. Regarding this optical logic circuit, the signal light 200
An "OR" circuit that changes the magnitude of is also possible. Also, groove 116 is used for manufacturing this optical logic circuit.
By widening the zero width, it becomes difficult for the photocurrent from the two phototransistors 2 to be injected into the active layer 102 directly under the groove 116.
This allows the grooves 116 to function as saturable absorbers. Therefore, hysteresis is produced in the Kerr current characteristics and optical input/output characteristics of the semiconductor laser 1, so that it can also operate as a "memory" circuit. The semiconductor laser 1 of this embodiment has a mesa 1040 width of 1.5 μm, a cavity length of 150 μm, two cavities divided by grooves 116, each having an axial length of 70 μ′170 itm, and a groove 1040 having a width of 1.5 μm.
The width of the phototransistor 2 is 1011 m, and the wavelength of light oscillated by the photocurrent from the phototransistor 2 is 1.2 μm. Further, the diameter of the light receiving surface 114 of the phototransistor 2 was set to 20 μm. Based on this specification, we were able to realize an optical logic circuit that can be integrated.

なお結晶成長の様子は成長方法や成長条件等によシ大幅
に変わるので、それらとともに適切な寸法を採用すべき
ことは言うまでもない。また光トランジスタ2の受光面
114の寸法、プラス電極115の形状1寸法、材料も
特に限定されるものではない。以上、実施例ではI n
P/I nGaAsP系の半導体材料を用いたが、Gm
AlAm/GaAs  系等他の半導体材料を用いても
よい。また信号光200の波長、光トランジスタ20ベ
一ス層112の組成、半導体レーザ、の発振波長は特に
限定されるものではない。したがって光トランジスタ2
を介すことによシ長波長の信号光200を短波長側にシ
フトさせた信号として取)出すことも可能である。また
この光論理回路の7レイ化やマトリクスアレイ化を前提
として、活性層102上部あるいは下部に導波路層を形
成させその部分に回折格子をつくっていわゆるデー・ビ
ー・アール(DBR)レーザのやデー・エフ・ビー(D
FB)レーザのような構成としてもよい。このようにす
れば、光論理回路の導波路層の延長上に光スィッチや他
の機能素子を一体化して構成するととが可□能となる。
It should be noted that since the manner of crystal growth varies greatly depending on the growth method, growth conditions, etc., it goes without saying that appropriate dimensions should be adopted in conjunction with these factors. Furthermore, the dimensions of the light-receiving surface 114 of the phototransistor 2, the dimensions of the positive electrode 115, and the material are not particularly limited. As described above, in the embodiment, I n
P/I nGaAsP-based semiconductor material was used, but Gm
Other semiconductor materials such as AlAm/GaAs may also be used. Further, the wavelength of the signal light 200, the composition of the base layer 112 of the optical transistor 20, and the oscillation wavelength of the semiconductor laser are not particularly limited. Therefore, phototransistor 2
It is also possible to extract the long wavelength signal light 200 as a signal shifted to the short wavelength side by passing the signal light 200 to the short wavelength side. Furthermore, on the premise that this optical logic circuit will be made into a 7-lay or matrix array, a waveguide layer will be formed above or below the active layer 102, and a diffraction grating will be made in that part to create a so-called DBR laser. D.F.B.
FB) It may also be configured like a laser. In this way, it becomes possible to integrate and configure optical switches and other functional elements on the extension of the waveguide layer of the optical logic circuit.

また以上の実施例ではnpnタイプの光トランジスタ2
とn基板の半導体レーザlの電気的結合をトンネル接合
で実現させたが、基板自体をnタイプからpタイプに変
えるなどしてnpn タイプの光トランジスタ2の結合
を容易にすることもできる。この場合にはマイナス電極
側に光トランジスタ2のエミツタ層111を設けて、信
号光200をペース層112やコレクタ層113で吸収
させる通常の方法を用いればよい。したがって光注入に
よって生じた光電流は増幅されて半導体レーザ1ヘコレ
クタ層113から大量に注入されることとなる。以上の
実施例では半導体レーザ1上に2つの光トジンジスタ2
をのせた構成としたが、特にその個数は限定されるもの
ではない。半導体レーザ1上に2個以上の光トランジス
タ2が集積され、光トランジスタ相互が独立して機能で
きるようなっていれば、各党トランジスタ2への光注入
される信号光の大きさによって半導体レーザからの光出
力をいろいろ変化させることが可能であシ、光トランジ
スタからの光電流が順方向か逆方向のいづれか一方をと
ることにより「アンド」、「オア」、「メモリ」以外に
「ノット」、「ナンド」。
Furthermore, in the above embodiment, the npn type phototransistor 2
Although the electrical coupling between the semiconductor laser 1 and the n-substrate is realized by a tunnel junction, the coupling between the npn-type phototransistor 2 and the like can also be facilitated by changing the substrate itself from an n-type to a p-type. In this case, a normal method may be used in which the emitter layer 111 of the optical transistor 2 is provided on the negative electrode side and the signal light 200 is absorbed by the space layer 112 and collector layer 113. Therefore, the photocurrent generated by the optical injection is amplified and is injected into the semiconductor laser 1 from the collector layer 113 in large quantities. In the above embodiment, two optical transistors 2 are provided on the semiconductor laser 1.
However, the number is not particularly limited. If two or more phototransistors 2 are integrated on the semiconductor laser 1 and the phototransistors can function independently, the intensity of the signal light injected into each transistor 2 will depend on the magnitude of the signal light injected into each transistor 2. It is possible to change the optical output in various ways, and by changing the photocurrent from the phototransistor to either the forward direction or the reverse direction, it can be used to produce not only "and", "or", and "memory" but also "not" and "Nando'.

「フリップフロップ」機能に拡張することが可能となる
It becomes possible to expand the function to a "flip-flop" function.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の詳細な説明するだめの動作特性図、第
2図は本発明の実施例を示す斜視図である。 図において、1・−・半導体レーザ、2・・・光トラン
ジスタ、100−n−InP基板、101−n−InP
バッファ層、102− I nGaA sP活性層、1
03 ”・P−InPクラッド層、104−・・メサ、
105=p−InP第1の電流ブロック層、106・・
・n−InP第2の電流ブロック層、107−n−In
P埋め込み層、108−・・電気的結合層、111= 
n−InPエミッタ層、112− p−InGaA@P
ベース層、113= n−I nP :ルクタ層、11
4・・・受光面、115 ・−・プラス電極、116・
・・溝、117・・・マイナス電極、118−・・光フ
ァイバ、119・・・結合回路、200−・信号光、を
それぞれ示す。
FIG. 1 is a detailed operational characteristic diagram for explaining the present invention, and FIG. 2 is a perspective view showing an embodiment of the present invention. In the figure, 1: semiconductor laser, 2: optical transistor, 100-n-InP substrate, 101-n-InP
Buffer layer, 102-InGaA sP active layer, 1
03 ”・P-InP cladding layer, 104-・・Mesa,
105=p-InP first current blocking layer, 106...
・n-InP second current blocking layer, 107-n-In
P buried layer, 108--electrical coupling layer, 111=
n-InP emitter layer, 112-p-InGaA@P
Base layer, 113 = n-I nP: Lucta layer, 11
4... Light receiving surface, 115... Positive electrode, 116...
--Groove, 117--Negative electrode, 118--Optical fiber, 119--Coupling circuit, 200--Signal light, respectively.

Claims (1)

【特許請求の範囲】[Claims]  半導体レーザと光トランジスタからなる発光受光集積
回路であって、複数個の前記光トランジスタが前記半導
体レーザの共通した半導体層上に共振器軸方向に沿って
並んで積層され、且つ、前記光トランジスタ相互が電気
的に遮断されていることを特徴とする光論理回路。
A light-emitting/light-receiving integrated circuit comprising a semiconductor laser and a phototransistor, wherein a plurality of the phototransistors are stacked in line along a resonator axis direction on a common semiconductor layer of the semiconductor laser, and the phototransistors are mutually stacked. An optical logic circuit characterized in that the circuit is electrically interrupted.
JP15058784A 1984-07-20 1984-07-20 Optical logic circuit Pending JPS6130089A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15058784A JPS6130089A (en) 1984-07-20 1984-07-20 Optical logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15058784A JPS6130089A (en) 1984-07-20 1984-07-20 Optical logic circuit

Publications (1)

Publication Number Publication Date
JPS6130089A true JPS6130089A (en) 1986-02-12

Family

ID=15500143

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15058784A Pending JPS6130089A (en) 1984-07-20 1984-07-20 Optical logic circuit

Country Status (1)

Country Link
JP (1) JPS6130089A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02174182A (en) * 1988-12-26 1990-07-05 Nippon Telegr & Teleph Corp <Ntt> Optical bistable element
US5393994A (en) * 1993-02-08 1995-02-28 Matsushita Electric Industrial Co., Ltd. Optical semiconductor device for neural network
JP2015018925A (en) * 2013-07-10 2015-01-29 ソフトバンクテレコム株式会社 Wavelength conversion element and wavelength conversion device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02174182A (en) * 1988-12-26 1990-07-05 Nippon Telegr & Teleph Corp <Ntt> Optical bistable element
US5393994A (en) * 1993-02-08 1995-02-28 Matsushita Electric Industrial Co., Ltd. Optical semiconductor device for neural network
JP2015018925A (en) * 2013-07-10 2015-01-29 ソフトバンクテレコム株式会社 Wavelength conversion element and wavelength conversion device

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