JPH04245679A - Solid-state imaging device - Google Patents

Abstract

PURPOSE:To prevent a drop in the performance as much as possible even if the device is miniaturized. CONSTITUTION:This device is characterized in that it comprises a picture element section having a photo diode 8 which converts an optical signal into signal charge, a transfer section which is provided with a transfer channel 9, and a transfer electrode 11, and consecutively transfer signal charge in the transfer channel 9 based on a transfer pulse applied to the transfer electrode 11, and a transfer section 12 which is provided with a shift gate and transfers the signal charge of the picture element section to the transfer channel of the transfer section based on the shift pulse applied to this shift gate 13 which serves as a light shielding film designed to prevent the leakage of light to the transfer channel.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device.

0002

2. Description of the Related Art FIG. 5 shows a plan view of a conventional solid-state imaging device. This solid-state imaging device has pixels 1 arranged in an array.
, a field shift gate section 2 , a vertical CCD register 3 , a horizontal CCD register 4 , and an output circuit 5 . The field shift gate section 2 controls the transfer of the signal charge accumulated in the pixel 1 to the vertical CCD shift register 3. A vertical CCD shift register 3 is provided between each pixel column, and sequentially transfers the signal charges transferred via the field shift gate section 2 to a horizontal CCD register 4. The horizontal CCD shift register 4 sequentially transfers the signal charges transferred from the vertical CCD register 3 to the output circuit 5. The output circuit 5 outputs the signal charge from the horizontal CCD register 4 to the outside.

FIG. 6 shows a cross section of the solid-state imaging device taken along the cutting line AA' shown in FIG. In FIG. 6, the solid-state imaging device has a p-well region 7 formed on an N-type semiconductor substrate 6, and near the surface of the p-well region 7, the surface is p+
A photodiode 8 in an n+ region and an n- region 9 are formed which are electrically shielded by the region. This n- region 9 is an embedded transfer channel of the vertical CCD register 3. Note that element isolation is performed by a channel stop region 10 of a p+ impurity layer. Shift channel 1 between photodiode 8 and transfer channel 9
2 corresponds to the field shift gate section 2 in FIG. A transfer electrode 11 is provided on the transfer channel 9 via an insulating film made of SiO2.
1 extends above the end of the photodiode 8.

A light shielding film 13 made of, for example, MoSi2 is provided on the transfer electrode 11 with an insulating film interposed therebetween. This light shielding film 13 not only covers the transfer electrode 11 but also extends to the vicinity of the end of the photodiode 8 in order to suppress smear components due to light leakage into the transfer channel 9. is also covered. A light shielding film 14 made of metal, for example Al, is provided on this light shielding film 13 with an insulating film 15 made of SiO2 interposed therebetween. Note that there are cases where only the light shielding film 14 is formed without forming the light shielding film 13, but in this case, it is difficult to reduce smear.

Next, the operation of the conventional solid-state imaging device shown in FIG. 6 will be explained with reference to FIGS. 7 and 8. Note that a reverse bias voltage VOFD is applied between the semiconductor substrate 6 and the p-well 7. The characteristics of the potential wells formed in the transfer channel 9 and shift channel 12 when the applied voltage VG is applied to the transfer electrode 11 are shown in graphs g1 and g2 in FIG.
are shown respectively. The transfer channel 9 has an applied voltage VG of zero V.
However, as the negative voltage is increased, a potential well with a value of V5 is formed, but eventually a pinning state occurs and the potential well is no longer modulated (see graph g1). In addition, since the shift channel 12 is a surface channel type, the transfer electrode 11
When the applied voltage VG becomes a negative voltage, the value of the potential well becomes zero V.
However, when the short channel effect occurs, the applied voltage VG
Even if is zero V, the value of the potential well does not become zero (graph g2
reference).

FIG. 8 shows a potential well profile along the cutting line BB' shown in FIG. 6 in a solid-state imaging device having such characteristics. In FIGS. 7 and 8, B1 indicates the semiconductor substrate region 6, B2 indicates the p-well region 7, B3 indicates the photodiode region 8, B4 indicates the shift channel region 12, and B5 indicates the transfer channel region 9. It shows. As can be seen from FIG. 6, the p-well 7 is set to zero potential, but since the regions between the p-well 7 and the semiconductor substrate 6 and between the p-well 7 and the photodiode 8 are each reverse biased, a punch-through state occurs in the B2 region. Thus, a potential well Vβ is formed. When a shift pulse VFS (>0, see FIG. 7) is applied to the transfer electrode 11, the potential well of the shift channel 12 opens, that is, its value becomes V4, and the signal charge generated in the photodiode section 8 is transferred to the vertical CCD. The data is transferred to transfer channel 9 of register 3 (see FIG. 8). Then, the transfer pulse VL (<0), VM (=0) is applied to the transfer electrode 11.
When is applied, the signal charge is transferred through the transfer channel 9 of the vertical CCD register 3.

[0007]

[Problems to be Solved by the Invention] In such a conventional solid-state imaging device, in order to reduce smear, the light shielding film 13 needs to cover the periphery of the transfer electrode 11. The end of the light shielding film 13 extends by a dimension L2 toward the diode portion 8 (see FIG. 6). This reduces the light-receiving area of the photodiode 8 and lowers the sensitivity. The above-mentioned dimension L2 is usually about 0.5 to 1 μm, which is an obstacle to miniaturization.

Further, the length L1 (see FIG. 6) of the shift channel 12 is usually about 1.5 to 2.0 μm, which also poses an obstacle to miniaturization. Next, as can be seen from the charge well profile in FIG.
The amount of charge that can be transferred by is the difference between the potential wells V5 - V2
is proportional to. However, since the high level VM of the clock for transfer is normally zero V and the low level VL is less than the pinning potential VP, the potential amplitude of the clock does not increase, and there is a natural limit to the potential amplitude. In particular, when a solid-state imaging device is miniaturized, the amount of transferred charge per unit area decreases rapidly when the channel width becomes 2 μm or less, so this restriction on potential amplitude becomes a major obstacle.

Furthermore, if there is an opening V1 in the potential well in the shift channel 12, during a so-called overflow operation in which excess charges are dumped from the photodiode section 8 to the N-type substrate 6, the surface is damaged by excess carriers generated during excessive light irradiation. The potential increases, and a phenomenon (blooming phenomenon) occurs in which excess charge leaks into the transfer channel 9 of the vertical CCD shift register 3. In order to suppress the occurrence of this blooming phenomenon, it is necessary to apply a reverse bias voltage V to the N-type substrate 6.
By increasing the OFD, the photodiode section 8
It is necessary to increase the potential Vβ of the lower p-well 7 to ensure a blooming potential margin Vβ-V1. Increasing the potential Vβ of the p-well 7 reduces the potential difference Vα−Vβ that determines the amount of charge that can be stored in the photodiode portion 8, resulting in a decrease in the saturated output voltage. This becomes a big problem when miniaturizing solid-state imaging devices.

Furthermore, if there is an opening V1 in the potential well in the shift channel 12, a dark current generated on the surface of this portion flows into the photodiode section 8, increasing the dark output. The present invention has been made in consideration of the above circumstances, and it is an object of the present invention to provide a solid-state imaging device that can prevent performance deterioration as much as possible even when miniaturized.

[0011]

[Means for Solving the Problems] A solid-state imaging device of the present invention has a pixel portion having a photodiode that converts an optical signal into a signal charge, a transfer channel and a transfer electrode, and has a transfer pulse applied to the transfer electrode. a transfer section that sequentially transfers signal charges within a transfer channel based on the shift gate; and a transfer section that transfers signal charges in the pixel section to the transfer channel of the transfer section based on a shift pulse applied to the shift gate. The shift gate is characterized in that it also serves as a light shielding film that prevents light from leaking into the transfer channel.

0012

[Operation] According to the solid-state imaging device of the present invention constructed as described above, the shift gate also serves as a light shielding film. As a result, the transfer electrode and the shift gate are separated, and the amplitude of the transfer pulse applied to the transfer electrode can be increased, thereby increasing the amount of transferred charge. Furthermore, since there is no need to extend the transfer electrode to the transfer section to cover the transfer section, it is possible to prevent the light-receiving area of the photodiode from decreasing as much as possible. As described above, even if miniaturization is performed, deterioration in performance can be prevented as much as possible.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a cross section of an embodiment of a solid-state imaging device according to the present invention. In the solid-state imaging device of this embodiment, in the conventional solid-state imaging device shown in FIG. A light shielding film 13 for preventing leakage of light is formed so as to also serve as a shift gate. This eliminates the need to extend the transfer electrode 11 above the shift channel 12 even when miniaturized, and it becomes possible to prevent smearing even if the light shielding film 13 does not cover the portion near the boundary of the photodiode 8. It is possible to prevent the light receiving area of the photodiode 8 from decreasing, and the sensitivity is improved. Also, since the transfer electrode 11 and shift gate 13 are separated,
The transfer pulse applied to the transfer electrode 11 can be a positive or negative clock pulse, and the potential amplitude can be increased. This increases the amount of transferred charge and is extremely advantageous for miniaturization.

The characteristics of the potential wells formed in the transfer channel 9 and shift channel 12 of the solid-state imaging device of this embodiment are shown in graphs h1 and h2 of FIG. 2, respectively. This characteristic graph is similar to the characteristic graph of the conventional device, but in this embodiment, the shift gate 13 and the transfer electrode 11 are separated, so the low level of the shift pulse applied to the shift gate 13 is different from the conventional one. VFSL can be set to a negative potential, and the high level VH of the transfer pulse applied to the transfer electrode 11 can be set to a positive potential. Note that the high level VFSH of the shift pulse and the low level VL of the transfer pulse are set to the same values as in the prior art. FIG. 3 shows the profile of the potential well along the cutting line BB' shown in FIG. 1 when the transfer pulse and shift pulse are applied as shown in FIG. 2 in this embodiment. In FIG. 3, the symbol B1 indicates the N type substrate region 6, and the symbol B2 indicates the p
The well region 7 is denoted by B3, and the photodiode region 8 is denoted by B3.
, B4 indicates the shift channel region 12, and B5 indicates the shift channel region 12.
indicates the transfer channel region 9. When the signal charge is being transferred through the transfer channel region, the shift gate 13 has a low level VFSL (<
0) is applied, and the opening of the potential well of the shift channel 12 (the portion corresponding to V1 in FIG. 8) becomes zero. Further, since the positive and negative transfer pulses VH and VL are applied to the transfer electrode 11, the modulation amount V7 - V2 of the potential well can be increased.

As described above, in this embodiment, signal charges are transferred from the photodiode section 8 to the shift channel 12.
During the period during which the transfer is transferred to the transfer channel 8 via
) is applied, the field shift gate length L1
Short channels are less likely to occur even if the length is shortened, which is advantageous for miniaturization.

Furthermore, even if the field shift gate length L1 is shortened, the potential well of the shift channel 12 does not open, so the p-well potential under the diode 8 only needs to be opened by the blooming potential margin Vβ. This makes it possible to increase the potential difference Vα-Vβ that determines the amount of charge that can be stored in the photodiode 8, and increases the saturation output voltage, which is advantageous for miniaturization. Furthermore, when the negative voltage VFSL is applied to the shift channel 12, the shift channel 12 is in an accumulation state, so that dark current can be suppressed and the dark output characteristics are improved. Moreover, it is sufficient to apply binary clock pulses of positive and negative values to the transfer electrodes, and unlike conventional devices, three-value clock pulses are not required, which simplifies the peripheral circuitry.

In the solid-state imaging device of the above embodiment, the photodiode section 8 may be formed by self-alignment with the shift gate 13. In addition, as shown in FIG. 4, a shift gate 13 that also serves as a light shielding film
' is formed only on one side of the transfer electrode 11, and an electrically isolated light shielding film 13'' is formed on the other side, and a negative voltage is applied to this light shielding film 13'' to also serve as element isolation. good. At this time, the element isolation region 10 shown in FIG. 1 becomes unnecessary. Note that the portion of the transfer electrode 11 that is not covered by the shift gate 13' and the light shielding film 13'' is covered with a light shielding film 14 made of metal with an insulating film 15 interposed therebetween.

[0018]

According to the present invention, even if miniaturization is performed, deterioration in performance can be prevented as much as possible.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of one embodiment of the present invention.

FIG. 2 is a graph showing characteristics of potential wells formed in a transfer channel and a shift channel in an example.

FIG. 3 is a graph showing a profile of a potential well in an example.

FIG. 4 is a cross-sectional view of another embodiment of the invention.

FIG. 5 is a plan view of the solid-state imaging device.

FIG. 6 is a cross-sectional view of a conventional solid-state imaging device.

FIG. 7 is a graph showing the characteristics of potential wells formed in transfer channels and shift channels of a conventional solid-state imaging device.

FIG. 8 is a graph showing a potential well profile of a conventional solid-state imaging device.

[Explanation of symbols]

6 Semiconductor substrate 7 p-well 8 Photodiode 9 Transfer channel 10 Element isolation region 11 Transfer electrode 12 Shift channel 13 Shift gate and light shielding film 14 Light shielding film 15 Insulating film

Claims (4)

[Claims] 1. A pixel section having a photodiode that converts an optical signal into a signal charge, a transfer channel, and a transfer electrode, the signal charge being transferred into the transfer channel based on a transfer pulse applied to the transfer electrode. a transfer section that has a shift gate and that transfers the signal charge of the pixel section to a transfer channel of the transfer section based on a shift pulse applied to the shift gate; A solid-state imaging device characterized in that the gate also serves as a light shielding film that prevents light from leaking into the transfer channel. 2. A voltage having a polarity such that an area under the shift gate is in an accumulation state is applied to the shift gate except during a shift period in which signal charges in the pixel portion are transferred to the transfer channel. The solid-state imaging device according to claim 1. 3. The solid-state imaging device according to claim 1, wherein a binary transfer pulse of positive and negative values is applied to the transfer electrode. 4. The solid-state imaging device according to claim 1, wherein the photodiode in the pixel portion is formed by self-alignment with the shift gate.