JPH04242964A - Lead frame and manufacture thereof - Google Patents

Lead frame and manufacture thereof

Info

Publication number
JPH04242964A
JPH04242964A JP28191A JP28191A JPH04242964A JP H04242964 A JPH04242964 A JP H04242964A JP 28191 A JP28191 A JP 28191A JP 28191 A JP28191 A JP 28191A JP H04242964 A JPH04242964 A JP H04242964A
Authority
JP
Japan
Prior art keywords
lead
wire bonding
lead frame
width
bonding surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP28191A
Other languages
Japanese (ja)
Other versions
JP2781070B2 (en
Inventor
Takumi Honda
本多 巧
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP3000281A priority Critical patent/JP2781070B2/en
Publication of JPH04242964A publication Critical patent/JPH04242964A/en
Application granted granted Critical
Publication of JP2781070B2 publication Critical patent/JP2781070B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To provide a lead frame and its manufacturing method which does not produce any positional deviation of an outer lead and protect the flatness of the lower end of the outer lead from being degraded. CONSTITUTION:An inner lead 21 of a lead frame 20 is so shaped that its top 21a which serves as a wire bonding surface, may be wider than its bottom 21b which faces the wire bonding surface and formed into inverted cone in its cross section. An outer lead 22 is so shaped that its top 22a and its bottom 22b may be square or rectangular with the same width. The aforesaid lead frames are manufactured by changing their masking width and etching rates.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、樹脂封止型半導体装置
用などのリードフレームおよびその製造方法に関するも
のであり、特に、狭ピッチ、多ピンパッケージに適した
リードフレームおよびその製造方法に関するものである
[Field of Industrial Application] The present invention relates to a lead frame for resin-sealed semiconductor devices and a method for manufacturing the same, and particularly to a lead frame suitable for narrow-pitch, multi-pin packages and a method for manufacturing the same. It is.

【0002】0002

【従来の技術】樹脂封止型半導体装置の製造においては
、まず図6に示すように、中央部に金メッキまたは銀メ
ッキなどのメッキ部1が施されたリードフレーム2が用
意され、そのインナーリード3およびアウターリード4
の断面形状は、一般に、図7に点線で示すように、正方
形状または長方形状、つまり上面と下面とが同寸法とさ
れている。図9に示すように、アイランド部5には半導
体ペレット6が接着され、その半導体ペレット6のボン
ディングパッド部とインナーリード3のメッキ部1とが
金線7などでワイヤーボンディングされる。そして、ボ
ンディング終了後、封止樹脂8により樹脂封止されると
ともにタイバー部9(図6〜図8参照)が切断され、リ
ードフレーム2の外部露出部表面10に半田メッキが施
され、アウターリード4のリードカットと曲げが行われ
て製品が製造される。
2. Description of the Related Art In the manufacture of resin-sealed semiconductor devices, first a lead frame 2 is prepared, as shown in FIG. 3 and outer lead 4
Generally, the cross-sectional shape is square or rectangular, as shown by the dotted line in FIG. 7, that is, the upper surface and the lower surface have the same size. As shown in FIG. 9, a semiconductor pellet 6 is bonded to the island portion 5, and the bonding pad portion of the semiconductor pellet 6 and the plated portion 1 of the inner lead 3 are wire-bonded with a gold wire 7 or the like. After the bonding is completed, the outer leads are sealed with a sealing resin 8, the tie bar portions 9 (see FIGS. 6 to 8) are cut, and the externally exposed surface 10 of the lead frame 2 is plated with solder. The product is manufactured by performing lead cutting and bending in step 4.

【0003】0003

【発明が解決しようとする課題】しかし、上記従来のリ
ードフレーム2によれば、インナーリード3およびアウ
ターリード4の断面形状が正方形状または長方形状、す
なわち上面と下面とが同一幅であるため、多ピンパッケ
ージや狭ピッチパッケージにおいては、インナーリード
3がより細いものとなるため、一般にワイヤーボンディ
ングされる上面のスペースが狭くなり、ワイヤーボンデ
ィングを良好な位置に行うことが困難となる。最悪の場
合、インナーリード3のエッジ近傍にボンディングされ
て、ワイヤーボンドの強度保証や設備の稼働率などが低
下するという問題があった。
However, according to the conventional lead frame 2, the cross-sectional shapes of the inner leads 3 and outer leads 4 are square or rectangular, that is, the upper and lower surfaces have the same width. In a multi-pin package or a narrow pitch package, the inner leads 3 are thinner, so the space on the top surface where wire bonding is generally performed becomes narrower, making it difficult to perform wire bonding at a good position. In the worst case, there is a problem that bonding occurs near the edge of the inner lead 3, which reduces the strength guarantee of the wire bond and the operating rate of the equipment.

【0004】この問題に対処するリードフレームとして
図8に示すようなものがある。このリードフレーム11
は、ワイヤーボンディングのスペースを確保するために
、インナーリード12およびアウターリード13の断面
形状が逆台形状、つまり上面の幅が下面の幅より広くな
るように構成している。このリードフレーム11によれ
ば、一般にボンディング面となる上面を長くした分だけ
ボンディングスペースが拡大するため、ワイヤーボンデ
ィングを良好な位置に容易に行える。
There is a lead frame shown in FIG. 8 that addresses this problem. This lead frame 11
In order to secure a space for wire bonding, the cross-sectional shapes of the inner leads 12 and outer leads 13 are configured to have an inverted trapezoidal shape, that is, the width of the upper surface is wider than the width of the lower surface. According to this lead frame 11, the bonding space is expanded by the length of the upper surface, which is generally a bonding surface, so wire bonding can be easily performed at a good position.

【0005】しかしながら、このリードフレーム11は
、アウターリード13の上面と下面との幅寸法が異なる
ため、アウターリード13のリードカットと曲げを行う
工程において異方向にストレスがかかり、図10に示す
ようにアウターリード13の位置ずれxを生じたり、図
11に示すようにアウターリード13下端の平坦度が悪
くなったりするという別途問題が生じていた。
However, in this lead frame 11, since the width dimensions of the upper and lower surfaces of the outer leads 13 are different, stress is applied in different directions during the lead cutting and bending process of the outer leads 13, as shown in FIG. Additional problems have arisen in that the outer leads 13 are misaligned x, and the flatness of the lower ends of the outer leads 13 deteriorates as shown in FIG.

【0006】本発明は上記問題を解決するもので、ワイ
ヤーボンディングを良好な位置に容易に行えながら、ア
ウターリードの位置ずれを生じたり、アウターリード下
端の平坦度が悪くなったりすることのないリードフレー
ムおよびその製造方法を提供することを目的とするもの
である。
The present invention solves the above-mentioned problems, and provides a lead that allows wire bonding to be easily performed in a good position, without causing misalignment of the outer lead, or deteriorating the flatness of the lower end of the outer lead. The object of the present invention is to provide a frame and a method for manufacturing the same.

【0007】[0007]

【課題を解決するための手段】上記問題を解決するため
に本発明のリードフレームは、ワイヤーボンディング面
の幅がこのワイヤーボンディング面に対向する面の幅よ
りも広いインナーリードと、上面と下面とが同じ幅のア
ウターリードとを備えたものである。
[Means for Solving the Problems] In order to solve the above problems, the lead frame of the present invention has an inner lead whose wire bonding surface is wider than the width of the surface facing the wire bonding surface, and an upper surface and a lower surface. and an outer lead of the same width.

【0008】また、本発明のリードフレームの製造方法
は、アウターリードの部分はマスキング寸法を上面と下
面とを同一として同一速度でエッチングを行い、インナ
ーリードの部分は、マスキング寸法をワイヤーボンディ
ング面側をワイヤーボンディング面に対向する面の幅よ
りも広くするとともに、ワイヤーボンディング面のエッ
チング速度は、アウターリードやインナーリード以外の
部分より遅らせ、ワイヤーボンディング面に対向する面
のエッチング速度は、アウターリードやインナーリード
以外の部分より早めるものである。
[0008] Furthermore, in the lead frame manufacturing method of the present invention, the outer lead portion is etched at the same speed with the masking dimensions on the upper and lower surfaces being the same, and the inner lead portion is etched with the masking dimension on the wire bonding surface side. is wider than the width of the surface facing the wire bonding surface, and the etching speed of the wire bonding surface is slower than that of parts other than the outer leads and inner leads. This is faster than the parts other than the inner lead.

【0009】[0009]

【作用】上記構成のリードフレームにより、インナーリ
ードはそのワイヤーボンディング面の幅が広いため、ワ
イヤーボンディングを良好な位置に容易に行え、アウタ
ーリードは上面と下面とが同じ幅であるため、異方向に
ストレスがかからず、アウターリードの位置ずれを生じ
たり、リード平坦度が悪くなったりすることはない。
[Function] With the lead frame having the above configuration, the inner leads have a wide wire bonding surface, so wire bonding can be easily performed in a good position, and the outer leads have the same width on the top and bottom surfaces, so wire bonding can be performed in different directions. No stress is applied to the outer leads, and the outer leads will not be misaligned or the leads will not have flatness.

【0010】また、上記構成のリードフレームの製造方
法により、アウターリードの上面と下面とが同じ幅で、
インナーリードのワイヤーボンディング面の幅がこのワ
イヤーボンディング面に対向する面の幅よりも広いリー
ドフレームを製造することができる。
[0010] Further, according to the method for manufacturing the lead frame having the above structure, the upper surface and the lower surface of the outer lead have the same width,
It is possible to manufacture a lead frame in which the width of the wire bonding surface of the inner lead is wider than the width of the surface facing the wire bonding surface.

【0011】[0011]

【実施例】以下、本発明の一実施例を図面に基づき説明
する。図1における点線部および図2の(a),(b)
で示すように、リードフレーム20におけるインナーリ
ード21(図3におけるA部分)は、ワイヤーボンディ
ング面となる上面21aがワイヤーボンディング面に対
向する下面21bよりも広幅の逆台形の断面形状とされ
、また、アウターリード22(図3におけるB部分)は
上面22aと下面22bとが同じ幅の正方形または長方
形の断面形状とされている。なお、図1および図3にお
いて、23はタイバー部、24は半導体ペレットが載設
されるアイランド部、25はインナーリード21のメッ
キ部である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. The dotted line in Figure 1 and (a) and (b) in Figure 2
As shown in FIG. 3, the inner leads 21 (portion A in FIG. 3) in the lead frame 20 have an inverted trapezoidal cross-sectional shape in which the upper surface 21a serving as the wire bonding surface is wider than the lower surface 21b facing the wire bonding surface. The outer lead 22 (portion B in FIG. 3) has a square or rectangular cross-sectional shape with an upper surface 22a and a lower surface 22b having the same width. 1 and 3, 23 is a tie bar portion, 24 is an island portion on which a semiconductor pellet is placed, and 25 is a plated portion of the inner lead 21.

【0012】ところで、一般的に狭ピッチパッケージで
は、インナーリード21の幅を細くすることが必然的に
要求される。しかし、図4に示すように、インナーリー
ド21のスリット幅Wはリードフレーム20金属板の素
材厚みTにより機械的に決定してしまい、インナーリー
ド21のピッチPを狭くするには、どうしてもインナー
リード幅Lそのものを細くせざるを得ない。また、多ピ
ンパッケージの場合でも、インナーリード21をアイラ
ンド部24に近づけることが必要となり、狭ピッチパッ
ケージの場合と同様にインナーリード幅Lを細くせざる
を得ない。
[0012] Generally speaking, in narrow pitch packages, it is necessary to reduce the width of the inner leads 21. However, as shown in FIG. 4, the slit width W of the inner leads 21 is mechanically determined by the material thickness T of the metal plate of the lead frame 20, and in order to narrow the pitch P of the inner leads 21, it is necessary to The width L itself has to be made thinner. Further, even in the case of a multi-pin package, it is necessary to bring the inner leads 21 close to the island portion 24, and the inner lead width L must be made thin as in the case of a narrow pitch package.

【0013】しかしながら、上記構成により、インナー
リード21はワイヤーボンディング面となる上面21a
の幅が広いため、ワイヤーボンディングを良好な位置に
容易に行え、また、アウターリード22は上面22aと
下面22bとが同じ幅であるため、アウターリード22
のリードカットと曲げを行う工程においても、異方向へ
のストレスがかかり難くなり、アウターリード22の位
置ずれを生じたり、リード平坦度が悪くなったりするこ
とはない。
However, with the above structure, the inner lead 21 has an upper surface 21a which becomes a wire bonding surface.
Since the width of the outer lead 22 is wide, wire bonding can be easily performed at a good position.Also, since the upper surface 22a and the lower surface 22b of the outer lead 22 have the same width, the outer lead 22
Even in the process of cutting and bending the leads, stress in different directions is less likely to be applied, and the outer leads 22 will not be displaced or the flatness of the leads will not deteriorate.

【0014】次に、上記リードフレーム20の製造方法
について説明する。半導体装置用リードフレーム20は
、リードフレーム20におけるインナーリード21、ア
ウターリード22、アイランド部24をそれぞれ含むリ
ードフレーム骨格部分などの残留すべき部分をレジスト
層30でマスキングした後、エッチング処理することに
より得られる。
Next, a method of manufacturing the lead frame 20 will be explained. The lead frame 20 for a semiconductor device is produced by masking the portions of the lead frame 20 that should remain, such as the lead frame skeleton including the inner leads 21, outer leads 22, and island portions 24, with a resist layer 30, and then performing an etching process. can get.

【0015】すなわち、アウターリード22となる部分
には、図4に示すように、レジスト層30の幅Lを上下
面同一にし、エッチング加工も上下同一速度で行って上
面22aと下面22bとが同じ幅になるようにする。一
方、インナーリード21となる部分には、、図5に示す
ように、レジスト層30の幅Lを、上面側を広く、下面
側を狭くマスキングし、さらに上下のエッチング液量の
コントロールを行い、上面側のエッチングを抑制し、下
面側のエッチングスピードを加速させることにより、ピ
ッチPを狭くしながら上面21aの広いインナーリード
21を製造する。このようにして各箇所により断面の異
なるリードフレーム20を適切に製造することができる
That is, in the portion that will become the outer lead 22, as shown in FIG. 4, the width L of the resist layer 30 is made the same on the upper and lower surfaces, and the etching process is performed at the same speed on the upper and lower surfaces, so that the upper surface 22a and the lower surface 22b are the same. Make it the same width. On the other hand, in the part that will become the inner lead 21, as shown in FIG. 5, the width L of the resist layer 30 is masked to be wider on the upper surface side and narrower on the lower surface side, and furthermore, the amount of etching liquid on the upper and lower sides is controlled. By suppressing etching on the upper surface side and accelerating the etching speed on the lower surface side, inner leads 21 with a wide upper surface 21a are manufactured while narrowing the pitch P. In this way, it is possible to appropriately manufacture lead frames 20 having different cross sections depending on their locations.

【0016】[0016]

【発明の効果】以上述べたように本発明のリードフレー
ムによれば、インナーリードのワイヤーボンディング面
の幅を広くし、アウターリードは上面と下面とを同じ幅
としたため、ワイヤーボンディングを良好な位置に容易
に行えながら、アウターリードの位置ずれを生じたり、
リード平坦度が悪くなったりすることはなく、多ピンパ
ッケージや狭ピッチパッケージに適したリードフレーム
を得ることができる。
As described above, according to the lead frame of the present invention, the width of the wire bonding surface of the inner lead is widened, and the upper and lower surfaces of the outer lead are made to have the same width, so that wire bonding can be performed at a good position. Although it can be easily done, it may cause the outer lead to be misaligned or
It is possible to obtain a lead frame suitable for multi-pin packages and narrow pitch packages without causing deterioration in lead flatness.

【0017】また、本発明のリードフレームの製造方法
によれば、アウターリードの上面と下面とが同じ幅で、
インナーリードのワイヤーボンディング面の幅がこのワ
イヤーボンディング面に対向する面の幅よりも広い、す
なわち各部分で断面形状の異なるリードフレームを、正
確に所定領域をコントロールしながら容易に製造でき、
しかも従来のエッチング装置に改良を加えるだけの同様
な製造設備を利用できるため、コストアップは最小限で
済む。
Further, according to the lead frame manufacturing method of the present invention, the upper surface and the lower surface of the outer lead have the same width,
The width of the wire bonding surface of the inner lead is wider than the width of the surface facing the wire bonding surface, which means that lead frames with different cross-sectional shapes in each part can be easily manufactured while accurately controlling a predetermined area.
Moreover, since similar manufacturing equipment can be used, which requires only improvements to conventional etching equipment, cost increases can be kept to a minimum.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例に係るリードフレームの要部
斜視図である。
FIG. 1 is a perspective view of a main part of a lead frame according to an embodiment of the present invention.

【図2】図1のa−aおよびb−b位置の断面図である
FIG. 2 is a sectional view taken along lines aa and bb in FIG. 1;

【図3】本発明の一実施例に係るリードフレームの部分
切欠平面図である。
FIG. 3 is a partially cutaway plan view of a lead frame according to an embodiment of the present invention.

【図4】本発明の一実施例に係るリードフレームの製造
方法を説明するためのアウターリードの断面図である。
FIG. 4 is a cross-sectional view of an outer lead for explaining a method of manufacturing a lead frame according to an embodiment of the present invention.

【図5】本発明の一実施例に係るリードフレームの製造
方法を説明するためのインナーリードの断面図である。
FIG. 5 is a cross-sectional view of an inner lead for explaining a method of manufacturing a lead frame according to an embodiment of the present invention.

【図6】従来のリードフレームの平面図である。FIG. 6 is a plan view of a conventional lead frame.

【図7】従来のリードフレームの要部斜視図である。FIG. 7 is a perspective view of a main part of a conventional lead frame.

【図8】従来のリードフレームの要部斜視図である。FIG. 8 is a perspective view of essential parts of a conventional lead frame.

【図9】従来の樹脂封止型半導体装置の部分切欠斜視図
である。
FIG. 9 is a partially cutaway perspective view of a conventional resin-sealed semiconductor device.

【図10】従来の樹脂封止型半導体装置の部分切欠側面
図である。
FIG. 10 is a partially cutaway side view of a conventional resin-sealed semiconductor device.

【図11】従来の樹脂封止型半導体装置の部分切欠側面
図である。
FIG. 11 is a partially cutaway side view of a conventional resin-sealed semiconductor device.

【符号の説明】[Explanation of symbols]

20    リードフレーム 21    インナーリード 21a  インナーリードの上面(ワイヤーボンディン
グ面) 21b  インナーリードの下面(ワイヤーボンディン
グ対向面) 22    アウターリード 22a  アウターリードの上面 22b  アウターリードの下面 30    レジスト層
20 Lead frame 21 Inner lead 21a Upper surface of inner lead (wire bonding surface) 21b Lower surface of inner lead (wire bonding opposing surface) 22 Outer lead 22a Upper surface 22b of outer lead Lower surface 30 of outer lead Resist layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  ワイヤーボンディング面の幅がこのワ
イヤーボンディング面に対向する面の幅よりも広いイン
ナーリードと、上面と下面とが同じ幅のアウターリード
とを備えたリードフレーム。
1. A lead frame comprising an inner lead whose wire bonding surface is wider than the width of the surface facing the wire bonding surface, and an outer lead whose upper and lower surfaces have the same width.
【請求項2】  リードフレームの残留すべき部分をレ
ジスト層でマスキングした後、エッチング処理してなる
リードフレームの製造方法であって、アウターリードの
部分はマスキング寸法を上面と下面とを同一として同一
速度でエッチングを行い、インナーリードの部分は、マ
スキング寸法をワイヤーボンディング面側をワイヤーボ
ンディング面に対向する面の幅よりも広くするとともに
、ワイヤーボンディング面のエッチング速度は、アウタ
ーリードやインナーリード以外の部分より遅らせ、ワイ
ヤーボンディング面に対向する面のエッチング速度は、
アウターリードやインナーリード以外の部分より早める
ことにより、アウターリードの上面と下面とが同じ幅で
、インナーリードのワイヤーボンディング面の幅がこの
ワイヤーボンディング面に対向する面の幅よりも広いリ
ードフレームを製造するリードフレームの製造方法。
2. A method for manufacturing a lead frame in which a portion of the lead frame that is to remain is masked with a resist layer and then subjected to etching treatment, wherein the outer lead portion is masked with the same masking dimensions on the upper and lower surfaces. Etching is performed at a high speed, and for the inner lead portion, the masking dimension is made wider on the wire bonding surface side than the width of the surface facing the wire bonding surface, and the etching speed on the wire bonding surface is set to The etching speed of the surface facing the wire bonding surface is slower than the etching speed of the surface facing the wire bonding surface.
By placing the outer leads earlier than other parts than the inner leads, we can create a lead frame in which the top and bottom surfaces of the outer leads are the same width, and the width of the wire bonding surface of the inner lead is wider than the width of the surface facing this wire bonding surface. The manufacturing method of the lead frame to be manufactured.
JP3000281A 1991-01-08 1991-01-08 Lead frame manufacturing method Expired - Fee Related JP2781070B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3000281A JP2781070B2 (en) 1991-01-08 1991-01-08 Lead frame manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3000281A JP2781070B2 (en) 1991-01-08 1991-01-08 Lead frame manufacturing method

Publications (2)

Publication Number Publication Date
JPH04242964A true JPH04242964A (en) 1992-08-31
JP2781070B2 JP2781070B2 (en) 1998-07-30

Family

ID=11469524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3000281A Expired - Fee Related JP2781070B2 (en) 1991-01-08 1991-01-08 Lead frame manufacturing method

Country Status (1)

Country Link
JP (1) JP2781070B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016001763A (en) * 1999-06-30 2016-01-07 ルネサスエレクトロニクス株式会社 Semiconductor device manufacturing method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02228052A (en) * 1989-02-28 1990-09-11 Nec Kyushu Ltd Manufacture of lead frame for semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02228052A (en) * 1989-02-28 1990-09-11 Nec Kyushu Ltd Manufacture of lead frame for semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016001763A (en) * 1999-06-30 2016-01-07 ルネサスエレクトロニクス株式会社 Semiconductor device manufacturing method
US9484288B2 (en) 1999-06-30 2016-11-01 Renesas Technology Corporation Semiconductor device and a method of manufacturing the same and a mounting structure of a semiconductor device

Also Published As

Publication number Publication date
JP2781070B2 (en) 1998-07-30

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