JPH04239938A - Magnetic disk controller - Google Patents

Magnetic disk controller

Info

Publication number
JPH04239938A
JPH04239938A JP3006694A JP669491A JPH04239938A JP H04239938 A JPH04239938 A JP H04239938A JP 3006694 A JP3006694 A JP 3006694A JP 669491 A JP669491 A JP 669491A JP H04239938 A JPH04239938 A JP H04239938A
Authority
JP
Japan
Prior art keywords
magnetic disk
circuit
cache memory
controls
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3006694A
Other languages
Japanese (ja)
Inventor
Toshifumi Matsuo
松尾 敏文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3006694A priority Critical patent/JPH04239938A/en
Publication of JPH04239938A publication Critical patent/JPH04239938A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To increase a write processing speed in the store in system by backing up a cache memory by a battery circuit to secure the normalcy of data even in the case of stop of power supply. CONSTITUTION:A battery circuit 13 is connected to a cache memory circuit 12 of a magnetic disk controller 3 which is connected to a main storage device 1 through a common data transfer line 2 and controls a magnetic disk device 4.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は磁気ディスク制御装置に
関し、特に電源断においてもデータの正常性を保証する
ディスクキャッシュを伴った磁気ディスク制御装置に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic disk control device, and more particularly to a magnetic disk control device with a disk cache that guarantees the normality of data even when power is cut off.

【0002】0002

【従来の技術】従来のディスクキャッシュを備えた磁気
ディスク制御装置においては、電源断時においてキャッ
シュメモリの内容を保持する機能を有していなかった。
2. Description of the Related Art A conventional magnetic disk control device equipped with a disk cache does not have a function of retaining the contents of the cache memory when the power is turned off.

【0003】0003

【発明が解決しようとする課題】上述のように従来のデ
ィスクキャッシュを伴った磁気ディスク制御装置は、電
源断時のデータの正常性を保証するために書込み時には
磁気ディスク装置まで書込みを行うストアスルー方式を
用いる必要があり、書込み処理の高速化ができないとい
う欠点がある。
[Problems to be Solved by the Invention] As mentioned above, the conventional magnetic disk control device with a disk cache uses a store-through method in which data is written to the magnetic disk device at the time of writing in order to guarantee the normality of data in the event of a power outage. This method has the disadvantage that it is not possible to speed up the writing process.

【0004】0004

【課題を解決するための手段】本発明の磁気ディスク制
御装置は、共通データ転送路を通して主記憶装置に接続
されると共に磁気ディスク装置を制御する磁気ディスク
制御装置において、前記共通データ転送路の制御を行う
バス制御回路と、前記磁気ディスク装置に接続され前記
磁気ディスク装置の制御を行う磁気ディスク制御回路と
、キャッシュメモリ回路と、電源断時に前記キャッシュ
メモリ回路に電力を供給するバッテリ回路と、前記バス
制御回路と前記磁気ディスク制御回路と前記キャッシュ
メモリ回路との間のデータ転送を制御するDMA転送制
御回路と、磁気ディスク制御装置全体を制御するマイク
ロプロセッサ回路とを備えて構成される。
Means for Solving the Problems A magnetic disk control device of the present invention is a magnetic disk control device that is connected to a main storage device through a common data transfer path and controls a magnetic disk device. a magnetic disk control circuit connected to the magnetic disk device to control the magnetic disk device; a cache memory circuit; a battery circuit that supplies power to the cache memory circuit when the power is turned off; It is configured to include a bus control circuit, a DMA transfer control circuit that controls data transfer between the magnetic disk control circuit and the cache memory circuit, and a microprocessor circuit that controls the entire magnetic disk control device.

【0005】[0005]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

【0006】図1は本発明の一実施例の構成を示すブロ
ック図である。図1において本実施例の磁気ディスク制
御装置3は、共通データ転送路(以後「バス」と略す)
2の制御を行うバス制御回路10と、磁気ディスク装置
4の制御を行う磁気ディスク制御回路11と、キャッシ
ュメモリ回路12と、電源断時等においてキャッシュメ
モリ回路12に電力を供給するバッテリ回路13と、バ
ス制御回路10と磁気ディスク制御回路11とキャッシ
ュメモリ回路12との間のデータ転送を制御するDMA
転送制御回路14と、磁気ディスク制御装置3全体を制
御するマイクロプロセッサ回路15とを含む。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In FIG. 1, the magnetic disk control device 3 of this embodiment has a common data transfer path (hereinafter abbreviated as "bus").
2, a magnetic disk control circuit 11 that controls the magnetic disk device 4, a cache memory circuit 12, and a battery circuit 13 that supplies power to the cache memory circuit 12 when the power is cut off. , a DMA that controls data transfer between the bus control circuit 10, the magnetic disk control circuit 11, and the cache memory circuit 12.
It includes a transfer control circuit 14 and a microprocessor circuit 15 that controls the entire magnetic disk control device 3 .

【0007】主記憶装置1および磁気ディスク制御装置
3は、バス2を介して相互に接続されている。書込み処
理において、主記憶装置1より読出されたデータはバス
2およびバス制御回路10を介し、DMA転送制御回路
14の制御によりキャッシュメモリ回路12に書込まれ
る。キャッシュメモリ回路12に書込まれた時点で終了
報告を行う。キャッシュメモリ回路12に余裕がなくな
った場合にDMA転送制御回路14の制御によりキャッ
シュメモリ回路12からデータを読出し、磁気ディスク
制御回路11を介して磁気ディスク装置4にデータを書
込む。電源断となった時にはバッテリ回路13によりキ
ャッシュメモリ回路12のデータを保持し、再度電源が
投入された時は、保持されたキャッシュメモリ回路12
のデータをそのまま用いる。
The main storage device 1 and the magnetic disk control device 3 are interconnected via a bus 2. In the write process, data read from main memory 1 is written to cache memory circuit 12 via bus 2 and bus control circuit 10 under the control of DMA transfer control circuit 14 . A completion report is made at the time the data is written to the cache memory circuit 12. When there is no more room in the cache memory circuit 12, data is read from the cache memory circuit 12 under the control of the DMA transfer control circuit 14 and written to the magnetic disk device 4 via the magnetic disk control circuit 11. When the power is turned off, the data in the cache memory circuit 12 is held by the battery circuit 13, and when the power is turned on again, the data held in the cache memory circuit 12 is
Use the data as is.

【0008】[0008]

【発明の効果】以上説明したように本発明の磁気ディス
ク制御装置によれば、バッテリ回路によるバックアップ
ができるので電源断時のデータの正常性を保証し、スト
アイン方式を用いることにより書込み処理の高速化が可
能となる。
As explained above, according to the magnetic disk control device of the present invention, backup can be performed using the battery circuit, so the normality of data is guaranteed even when the power is turned off, and by using the store-in method, write processing can be performed. Speeding up is possible.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例の構成を示すブロック図。FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1    主記憶装置 2    共通データ転送路 3    磁気ディスク制御装置 4    磁気ディスク装置 10    バス制御回路 11    磁気ディスク制御回路 12    キャッシュメモリ回路 13    バッテリ回路 14    DMA転送制御回路 15    マイクロプロセッサ回路 1 Main memory 2 Common data transfer path 3. Magnetic disk control device 4 Magnetic disk device 10 Bus control circuit 11 Magnetic disk control circuit 12 Cache memory circuit 13 Battery circuit 14 DMA transfer control circuit 15 Microprocessor circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  共通データ転送路を通して主記憶装置
に接続されると共に磁気ディスク装置を制御する磁気デ
ィスク制御装置において、前記共通データ転送路の制御
を行うバス制御回路と、前記磁気ディスク装置に接続さ
れ前記磁気ディスク装置の制御を行う磁気ディスク制御
回路と、キャッシュメモリ回路と、電源断時に前記キャ
ッシュメモリ回路に電力を供給するバッテリ回路と、前
記バス制御回路と前記磁気ディスク制御回路と前記キャ
ッシュメモリ回路との間のデータ転送を制御するDMA
転送制御回路と、磁気ディスク制御装置全体を制御する
マイクロプロセッサ回路とを備えて成ることを特徴する
磁気ディスク制御装置。
1. A magnetic disk control device that is connected to a main storage device through a common data transfer path and controls a magnetic disk device, comprising: a bus control circuit that controls the common data transfer path; and a bus control circuit that is connected to the magnetic disk device. a magnetic disk control circuit that controls the magnetic disk device, a cache memory circuit, a battery circuit that supplies power to the cache memory circuit when the power is turned off, the bus control circuit, the magnetic disk control circuit, and the cache memory. DMA that controls data transfer to and from the circuit
A magnetic disk control device comprising a transfer control circuit and a microprocessor circuit that controls the entire magnetic disk control device.
JP3006694A 1991-01-24 1991-01-24 Magnetic disk controller Pending JPH04239938A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3006694A JPH04239938A (en) 1991-01-24 1991-01-24 Magnetic disk controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3006694A JPH04239938A (en) 1991-01-24 1991-01-24 Magnetic disk controller

Publications (1)

Publication Number Publication Date
JPH04239938A true JPH04239938A (en) 1992-08-27

Family

ID=11645453

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3006694A Pending JPH04239938A (en) 1991-01-24 1991-01-24 Magnetic disk controller

Country Status (1)

Country Link
JP (1) JPH04239938A (en)

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