JP3594202B2 - External storage controller - Google Patents

Description

[0001]
[Industrial applications]
The present invention relates to an external storage control device such as a disk control device for performing asynchronous transfer in which channel transfer with a higher-level device and transfer with an external storage device operate independently in time.
[0002]
[Prior art]
In the conventional magnetic disk control device, since the channel transfer and the disk transfer path perform asynchronous transfer in which time is independently operated, all data transfer is performed via a memory in the control device. In other words, to write data, first, the data of the track to be written is expanded from the magnetic disk device to the memory, the portion to be written is written, and the data read is performed by writing the data of the track to be read to the device. From the memory to read only the part you want to read.
[0003]
Also, as a cache management method, data once expanded on a memory is stored as it is for a certain period of time, and when read or write access to the same data comes again, the data on the memory is read or written as it is. .
[0004]
Whether the data is expanded in the memory or not is always known by the cache managing module (CFE).
When a read or write I / O (instruction) is received from a higher-level device, the channel adapter (CA) inquires of the cache management module CFE whether a track to be accessed is expanded in the memory. The cache management module CFE searches its own cache information, checks whether or not the track exists, and reports it to the channel adapter CA. The channel adapter CA that has received the report reads or writes the data in the memory if there is data in the memory, and waits for the data to be expanded from the device to the memory if there is no data in the memory, and reads or writes the data. Write light.
[0005]
For this reason, in the conventional device, the cache management module CFE has always proceeded with the design by limiting the processing performed at a time in order to guarantee a short response to the channel adapter CA.
[0006]
In the case of the write operation, there is a certain time difference between the data written in the memory and the data written in the real device, and during that time, the data must be guaranteed.
Therefore, in order to obtain the same reliability as writing data to a real device by writing data to a memory, the following is performed.
[0007]
FIG. 3 is an explanatory diagram of a conventional example, and shows a normal write operation. In FIG. 3, a host device 1, a disk control device 2, and a disk device 3, which is a device, are provided. The disk control device 2 has a large-capacity memory 23 without battery backup (SS: Shared Storage) and a small capacity. However, a nonvolatile memory 24 (NVS: Nonvolatile Storage) which is backed up by a battery is provided. Note that (1) to (3) in FIG. 3 indicate a write operation.
[0008]
First, before writing data, data of one track or two tracks from the device 3 is developed in the memory 23 in the control device (1). Then, in the actual write operation, the data on the memory 23 (SS) is rewritten, and further, the data is written on the memory 24 (NVS) (2). Thereafter, data writing to the disk device 3 is performed from the memory 24 (3).
[0009]
However, if data is not written back from the memory 24 to the disk device 3 forever, for example, when the write operation is continuous, data accumulates on the memory 24 (NVS), and eventually the memory 24 becomes full. I will.
[0010]
In the state of “Insufficient NVS”, in the subsequent write operation, a write-through “Write Through” operation of writing data on the memory 23 without using the memory 24 is performed.
[0011]
[Problems to be solved by the invention]
The above-mentioned conventional one has the following problems.
In a sophisticated disk control device, a process in which the cache management module CFE is busy for a long time (BUSY) is inevitable due to active maintenance work and reconstruction of the internal table of the cache management module CFE. For this reason, a response from the cache management module CFE to the channel adapter CA has to wait for a long time.
[0012]
Further, if the memory 24 is full and the write-through operation is performed, two write operations for immediately writing data to the memory 23 and the disk device 3 are required to improve the reliability, and the control becomes complicated. There was a problem that the throughput deteriorated.
[0013]
The present invention solves the above-mentioned conventional problem. When the cache management module CFE is in a busy state, the channel adapter CA immediately suspends the current operation and issues another I / O from the higher-level device to the channel adapter CA. The purpose is to be able to.
[0014]
[Means for Solving the Problems]
FIG. 1 is a diagram for explaining the principle of the present invention. In FIG. 1, reference numeral 1 denotes a higher-level device, 2a denotes an external storage control device, 3a denotes an external storage device, 21 denotes a channel adapter, 22 denotes a device adapter, 23 denotes a memory, and 24 denotes a memory. A nonvolatile memory, 25a indicates a cache management unit, and 26a indicates a resource management unit.
[0015]
The present invention is configured as follows in order to solve the above problems.
A transfer path to the host device 1 and a transfer path to the external storage device 3a are independently provided, and the transfer between the host device 1 and the external storage device 3a is performed via the memories 23 and 24. In an external storage control device 2a having a channel adapter 21 connected to the external storage control unit and a cache management unit 25a for managing the cache of the memory 23, the channel adapter 21 sends an instruction to use the cache management unit 25a from the host device 1. If the cache management unit 25a is in a busy state when it receives the instruction , the cache management unit 25a suspends the received instruction and disconnects the connection state with the host device 1.
[0017]
[Action]
The operation of the present invention based on the above configuration will be described.
When the cache management unit 25a of the external storage control device 2a is in a busy state, the current operation is temporarily suspended and disconnected from the host device 1 instead of waiting for a response from the cache management unit 25a. As a result, another command can be issued from the host device 1 to the external storage control device 2a.
[0019]
【Example】
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
§1: Description of Asynchronous Transfer Type Disk Controller FIG. 2 is an explanatory diagram of an embodiment of the present invention, and shows the entire disk controller. 1 and 3 are denoted by the same reference numerals. As shown in FIG. 2, the asynchronous transfer type disk control device 2 is connected to a host device 1 and a disk device 3 as an external storage device.
[0020]
The disk controller 2 includes a channel adapter (CA) 21, a device adapter (DA) 22, a memory (SS) 23, a nonvolatile memory (NVS) 24, a cache management module (CFE) 25, A resource management module (RM) 26 is provided.
[0021]
The channel adapter 21 has a channel path connected to a plurality of channels of the higher-level device 1, receives data from the channel, writes it on the memories 23 and 24, and writes the data written in the memory 23 to the higher-level device 1. To transfer.
[0022]
The device adapter 22 writes data in the memories 23 and 24 to the disk device 3 as an external storage device, and writes data read from the disk device 3 to the memory 23.
[0023]
The memory 23 is a volatile memory and has a large capacity but does not have a battery backup.
The memory 24 is a non-volatile memory, for example, having a small capacity but backed up by a battery.
[0024]
The cache management module 25 manages information as to whether data is expanded in the memory 23.
The resource management module 26 manages resources of the entire disk controller 2.
[0025]
In the disk control device 2, when a read or write command (I / O) is received from the higher-level device 1, the channel adapter 21 inquires whether a track for accessing the cache management module 25 has been developed on the memory 23.
[0026]
The cache management module 25 searches its own cache information, checks whether the track exists, and reports it to the channel adapter 21.
The channel adapter 21 receiving the report reads or writes the data in the memory if there is data in the memory, and waits for the data to be expanded from the disk device 3 to the memory if there is no data in the memory. Read or write.
[0027]
§2: Explanation when the cache management module (CFE) is busy The cache management module 25 is busy (in use) for active maintenance work or another process such as rebuilding of an internal table. The operation of the disk control device 2 in this case will be described.
[0028]
{Circle around (1)} The channel adapter 21 receives a read or write command (I / O) from the channel of the host device 1.
{Circle around (2)} The channel adapter 21 inquires the cache management module 25 whether the track of the received instruction exists in the memory 23.
[0029]
{Circle around (3)} The response from the cache management module 25 was busy.
{Circle around (4)} The channel adapter 21 keeps the current instruction on hold (for example, on the resource management module) and disconnects from the channel that issued the instruction.
[0030]
{Circle around (5)} For this reason, the channel path with the channel adapter 21 is empty, and a state of receiving commands from a plurality of channels is established.
{Circle around (6)} When the cache management module 25 is no longer busy, the cache management module 25 notifies the resource management module 26 that it is no longer busy.
[0031]
{Circle around (7)} Since the cache management module 25 is vacant, the resource management module 26 restarts the instruction that has been suspended.
As described above, the processing is delayed by waiting for a response from the cache management module 25, and it is possible to immediately receive another instruction without coupling to one channel for a long time.
[0039]
【The invention's effect】
As described above, the present invention has the following effects.
{Circle around (1)} When the cache management module 25 is in a busy state, the current operation is temporarily stopped without waiting for a response from the cache management module 25 forever, and the host device is disconnected from the host device 1. 1 can issue another command to the disk controller 2. Therefore, the disk control device 2 can receive another process that does not use the cache management module 25.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating the principle of the present invention.
FIG. 2 is an explanatory diagram of an embodiment.
FIG. 3 is an explanatory diagram of a conventional example.
[Explanation of symbols]
1 upper device 2a external storage control device 3a external storage device 21 channel adapter 22 device adapter 23 memory 24 non-volatile memory 25a cache management unit 26a resource management unit

Claims (1)

A transfer route to a higher-level device;
It has an independent transfer path to the external storage device,
The transfer between the host device and the external storage device is performed via a memory,
And, in an external storage control device having a channel adapter connected to the higher-level device and a cache management unit that performs cache management of the memory,
When receiving an instruction to use the cache management unit from the higher-level device , the channel adapter suspends the received instruction and disconnects the connection state with the higher-level device when the cache management unit is busy. An external storage control device characterized by the following.

Images