JPH04236364A - Connection inspecting apparatus - Google Patents

Abstract

PURPOSE:To inexpensively inspect the connection state of the lead pin of an IC by connecting one place between the connected ICs mounted on a printed wiring board to the common terminal of the ICs to inspect an object to be inspected. CONSTITUTION:A resistor 130 is connected to an integrated waveform generating circuit 30. An A/D converter 50 converts the amplified voltage across both terminals of the resistor 130 to a digital signal to output said signal. Comparators b70, a60 compare the digital signal with a predetermined reference value and register a80, b90 store the reference value used in the comparison with the output signal of the converter 50 by the comparators b70, a60. An F/F a100 and an F/F b110 hold the output signals of the comparators a60, b70 and a timing signal generating circuit 40 generates the timing signals of the circuit 30, the converter 50, the F/F a100 and the F/F b110.

Description

[Detailed description of the invention]

0001

[Industrial Field of Application] The present invention relates to a connection testing device.
In particular, the present invention relates to a connection inspection device for inspecting the connection state between a lead pin and a printed wiring board.

0002

2. Description of the Related Art A conventional connection inspection device has a spring probe and a three-value output state connected to the spring probe, and when outputting a signal, a low output impedance driver circuit and a three-value output state connected to the spring probe. It consists of a high input impedance receiver circuit.

Next, a conventional connection inspection device will be explained with reference to the drawings.

FIG. 4 is a block diagram of a conventional connection testing device.

[0005] In FIG. 4, the conventional connection inspection device is as follows:
It is composed of an integrated circuit (IC) 300, lead pins 301, a printed wiring board 310, a spring probe 320, a driver circuit 330, and a receiver circuit 340.

[0006] Here, IC3 is installed on the printed wiring board 310.
00 is mounted, and the lead pin 301 of IC300
A spring probe 320 is connected to. A driver circuit 330 and a receiver circuit 340 are connected to the spring probe 320.

Printed wiring board 31 which is the object to be inspected
0 supplies power to the PKG on which the IC 300 is mounted, inputs a test signal from the driver circuit 330 to the IC 300 via the spring probe 320, operates the IC 300, and transmits the output signal of the IC 300 to the spring probe 320.
The signal is input to the receiver circuit 340 via.

[0008] Then, by comparing the output value of the receiver circuit 340 with an expected value, it is determined whether the product is good or bad.

[0009]

[Problems to be Solved by the Invention] The conventional connection inspection device described above supplies power to an IC mounted on a PKG and
The logic function and connection state of C is tested, and furthermore, each spring probe requires a driver circuit and a receiver circuit, which has the disadvantage of making the configuration extremely complex and expensive.

[0010] An object of the present invention is to use a connection inspection device to detect connections between IC connections mounted on the printed wiring board without the need for supplying power to the printed wiring board that is the object to be inspected.
A resistor is inserted into the power supply pin of the output terminal of the output circuit of the integrated circuit so that the object to be tested can be inspected by connecting it to a common power supply terminal of the IC and the IC.
The input circuit forms a high impedance, and by using a device such as an SOJ package with a diode inserted in the opposite direction between the input terminal and the power supply or ground potential, the connection state of the IC lead pins can be inspected and the configuration is simple. Moreover, the object is to provide an inexpensive connection testing device.

[0011]

[Means for Solving the Problems] A connection testing device of the present invention includes an integral waveform generating circuit that generates an integral waveform signal, a resistor connected in series with the integral waveform generating circuit, and a voltage across the resistor that amplifies the voltage across the resistor. An AMP circuit, an A/D converter that converts an output signal of the AMP circuit into a digital signal, and first and second digital comparators that compare the output signal of the A/D converter with respective predetermined reference values. , 1st
and first and second registers that store reference values to be compared with the output signal of the A/D converter by the second digital comparator; and first and second registers that hold the output signals of the first and second digital comparators. It has a flip-flop (hereinafter abbreviated as F/F), an integral waveform generation circuit, an A/D converter, and a timing signal generation circuit that generates timing signals for the first and second F/Fs.

0012

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a connection testing device according to an embodiment of the present invention, FIG. 2 is a diagram illustrating the operation of the connection testing device of this embodiment, and FIG. 3 is a block diagram of a connection testing device of this embodiment. FIG. 3 is a diagram showing the inspection state of the target circuit.

In the connection testing device of this embodiment shown in FIG. is connected to one input terminal 22 of the. Further, the other end of the resistor 130 is connected to the output terminal 10 of the connection inspection device and the other input terminal 21 of the AMP circuit 20. The output terminal 33 of the integral waveform generation circuit 30 is connected to the output terminal 11 of the connection inspection device.
It is connected to the.

The output terminal 23 of the AMP circuit 20 is connected to an A/D converter 50 that converts an analog signal into a digital signal.
is connected to the input terminal 51 of the A/D converter 5.
The output terminal 52 of 0 is connected to the input terminals 61 and 71 of the comparator a60 and the comparator b70.

Input terminal 1 to which the reference value data signal is input
20 is the input terminal 8 of register a80 and register b90
The output terminals 81 and 91 of register a80 and register b90 are connected to comparator a6
0 and the input terminals 62 and 72 of the comparator b70, respectively.

Comparator a60 and comparator b70
The output terminals 63 and 73 of F/Fa store the comparison results.
100 and input terminals 101 and 111 of F/Fb 110, respectively.

The timing signal generation circuit 40 controls the generation timing of the start signal of the saw voltage waveform signal, the conversion enable signal of the A/D converter 50, and the clock signals of the F/Fa 100 and F/Fb 110. The output terminal 41 is connected to the input terminal 31 of the integral waveform generation circuit 30.
The output terminal 42 is connected to the input terminal 53 of the A/D converter 50, and the output terminals 43 and 44 are connected to the input terminal 1 of each F/Fa 100 and F/Fb 110.
02, 112.

In FIG. 3, a power supply terminal 200 of an integrated circuit (IC) 260 is connected to one side of a resistor 220, and the other side of the resistor 220 is connected to an output terminal 231 and a collector of a transistor 223. The wiring 230 is
It is connected to the input terminal 232 of the IC 270. Input terminal 232 is connected to the anode terminals of diodes 221 and 222 and the base terminal of transistor 224. A cathode terminal of the diode 221 is connected to the power supply terminal 200 of the IC 270. Furthermore, the diode 22
The cathode terminal of No. 2 is connected to the power supply terminal 210 of the IC 270.

The output terminal 10 of the connection testing device 240 of this embodiment is connected to the input terminal 232 of the IC via the probe 251.
is connected to the output terminal 11 of the connection inspection device 240.
is connected to the power supply terminal 200 of the IC via the probe 252.

Next, the operation of this embodiment will be explained with reference to FIGS. 1 and 2.
, will be explained with reference to FIG.

Here, FIG. 2 shows the sawtooth voltage waveform signal b
The relationship between the diode forward characteristic a and the diode forward characteristic a is shown.

A sawtooth voltage waveform signal b is outputted by the output signal T1 shown in FIG. 2 obtained from the output terminal 41 of the timing signal generation circuit 40 shown in FIG. 1, and is applied to the input terminal of the IC 270 via the probe 251 shown in FIG. be done. The voltage value generated by the current flowing through the resistor 130 in FIG. 1 at time t1 of sampling CLKT2 at v1 of the forward characteristic a of the diode shown in FIG.
0, and register a is converted by comparator a60.
A comparison is made with a reference value K1 stored in advance in 80. Furthermore, v2 of the forward characteristic a of the diode shown in FIG.
The voltage value generated by the current flowing through the resistor 130 in FIG. 1 at time t2 of sampling CLKT2 in the A/D
It is converted by the converter 50 and compared with a reference value K2 stored in advance in the register b90 by the comparator b70. And these reference values K1 and K2 are
For example, it is set via the input terminal 120 from an arithmetic processing device or the like.

The output values of each comparator a60 and comparator b70 are stored in F/Fa100 and F/Fb110 by clock signals T3 and T4 shown in FIG. 2 obtained from output terminals 43 and 44 of the timing signal generation circuit 40. . Output terminal 1 of F/Fa100, F/Fb110
03 and 113 are input to, for example, an arithmetic processing device or the like via output terminals 105 and 115. In this case, when it is defective, the logical value is set to '1'.

The reference values K1 and K2 set in register a80 and register b90 are determined by IC260 and I shown in FIG.
The generated voltage value at v1 or v2 when the output terminal 231 and input terminal 232 of C270 are connected normally (
(or current value), for example, is set smaller than the currents i1 and i2 shown in FIG.

Furthermore, the resistor 22 of the IC 260 shown in FIG.
0 is generally smaller than the equivalent resistance until current begins to flow in the forward characteristics of a diode.

In the above operation, the I shown in FIG.
Output terminal 231 of C260 and input terminal 2 of IC270
The measured voltage value V of v1 in FIG. 2 according to the connection state of 32
Table 1 shows a list of comparative judgment values between s1 and the reference value K1, and further comparison judgment values between the measured value Vs2 of v2 and the reference value K2.

[0028]

[0029] In Table 1, ◯ indicates good connection, ×
The mark indicates a poor connection. If the connection state of the input terminal is defective, Vs1<K1 as shown in Comparison Judgment 1. If the connection state of the output terminal is defective, Vs2<
It becomes K2. Furthermore, if the connection state of the input/output terminal is defective, Vs1<K1 and Vs2<K2.

Based on the above determination, the connection state of the input/output terminals is inspected.

[0031]

Effects of the Invention As explained above, the connection inspection device of the present invention does not require power supply to the printed wiring board that is the object to be inspected, and it is possible to detect connections between IC connections mounted on the printed wiring board. The I
This has the advantage that the connection state of the lead pins of C can be inspected, the configuration is simple, and the cost can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a connection testing device according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating the operation of the connection testing device of this embodiment.

FIG. 3 is a diagram showing a test state of a circuit to be tested by the connection test device of the present embodiment.

FIG. 4 is a block diagram of a conventional connection testing device.

[Explanation of symbols]

10, 11, 23, 32, 33, 41, 42, 43, 4
4, 52, 63, 73, 81, 91, 103, 113
Output terminal 20 AMP circuit 21, 22, 31, 51, 53, 61, 62, 71, 7
2,82,92,101,102,105,111,1
12,115 Input terminal 30 Integral waveform generation circuit 40 Timing signal generation circuit 50 A/D converter 60 Comparator a 70 Comparator b 80 Register a 90 Register b 100 Flip-flop (F/F) a110
Flip-flop (F/F) b130 Resistor 200, 210 Power supply terminal 220 Resistor 221, 222 Diode 223, 224 Transistor 230 Wiring 231 Output terminal 232 Input terminal 240 Connection inspection device 251, 252 Probe 260, 270 Integrated circuit (IC) 300
Integrated circuit (IC) 301 Lead pin 310 Printed wiring board 320 Spring probe 330 Driver circuit 340 Receiver circuit a Diode forward characteristic b Saw voltage waveform signal K1, K2 Reference value

Claims (1)

[Claims] 1. An integral waveform generating circuit that generates an integral waveform signal, a resistor connected in series to the integral waveform generating circuit, an AMP circuit that amplifies the voltage across the resistor, and an output signal of the AMP circuit. A/D to convert to digital signal
a converter, first and second digital comparators that compare the output signal of the A/D converter with respective predetermined reference values, and the first and second digital comparators compare the output signal of the A/D converter. first and second registers that store the reference value to be compared with, first and second flip-flops that hold the output signals of the first and second digital comparators, the integral waveform generation circuit, and 1. A connection testing device comprising: a /D converter and a timing signal generation circuit that generates timing signals for first and second flip-flops.