JPH0423389A - Plated lead connection structure of circuit board - Google Patents

Plated lead connection structure of circuit board

Info

Publication number
JPH0423389A
JPH0423389A JP12468590A JP12468590A JPH0423389A JP H0423389 A JPH0423389 A JP H0423389A JP 12468590 A JP12468590 A JP 12468590A JP 12468590 A JP12468590 A JP 12468590A JP H0423389 A JPH0423389 A JP H0423389A
Authority
JP
Japan
Prior art keywords
shorting
pattern
patterns
plated lead
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12468590A
Other languages
Japanese (ja)
Inventor
Atsushi Endo
淳 遠藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP12468590A priority Critical patent/JPH0423389A/en
Publication of JPH0423389A publication Critical patent/JPH0423389A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE:To lessen the number of external plated leads and to prevent the generation of the static breakdown of a circuit board by a method wherein the connection structure between shorting patterns, which are positioned on the same coordinates of a pluralily of layers, is formed into a plated lead connection structure, in which the shorting patterns are made to have continuity to each other through a through hole. CONSTITUTION:A shorting pattern 1 is made to have continuity with a shorting pattern 3 through a through hole 5. The pattern 1 is connected to a shorting pattern 2 via a circuit pattern 13 and plated leads 6 on the same surface. Accordingly, the patterns on a circuit board 10 result in all being made to have continuity with one another. Then, when a external plated lead 8 is led out from one arbitrary place of the circuit pattern 13, it becomes possible to perform an electrolytic plating to all the circuit pattern on the board 10. Then, when the external shape of the board is punched, an intrusion of static electricity from the cut surface of the external plated lead, which is exposed to the section of the external shape of the board, can be prevent because the cut surface is one place.

Description

【発明の詳細な説明】 [産業上の利用分野1 本発明は、複数の層に回路パターンを有する回路基板に
おいて、各層の平面的に近接した位置にあるショーテイ
ングパターン間のメッキリード接続構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] The present invention relates to a plated lead connection structure between shorting patterns located close to each other in a plan view of each layer in a circuit board having circuit patterns in a plurality of layers. .

[発明の概要] 本発明は、複数の層に回路パターンを有する回路基板に
おいて、各層の平面的に近接した位置にあるショーテイ
ングパターン間をスルーホールにより導通を取ることで
、外部メッキリード引き出し線を減らすことができ、そ
れにより、外部メッキリード引き出し線の外形切断面か
らの静電気を防止するようにしたものである。
[Summary of the Invention] The present invention provides electrical conductivity between shorting patterns located in close planar positions in each layer in a circuit board having circuit patterns on multiple layers by using through holes to connect externally plated lead out lines. This prevents static electricity from being generated from the externally cut surface of the externally plated lead wire.

[従来の技術1 従来の構造は、第4図に示すように、回路バクーン内の
スルーホール(12)を利用してメツキノード(6)を
引き出し、複数の層の同一座標上に位置するシフ−ティ
ングパターン(11)間を接続していた。
[Prior art 1] As shown in FIG. 4, the conventional structure utilizes a through hole (12) in a circuit board to draw out a mesh node (6) and connect a shift node (6) located on the same coordinates of multiple layers. The connecting patterns (11) were connected.

また、第5図に示すように、ショーテイングパターン(
11)に接続されるメッキリード(6)の数には限度が
あるため、スペースに余裕がない場合は、外部メッキリ
ード引き出し線(8)を数ケ所に設けていた。
In addition, as shown in Fig. 5, a shorting pattern (
Since there is a limit to the number of plated leads (6) that can be connected to 11), external plated lead lead wires (8) are provided at several locations when there is not enough space.

[発明が解決しようとする課題] 従来のメッキリード接続構造において、複数の層の平面
的に近接した位置にあるショーテイングパターン(11
)間を、第4図に示すように、回路パターン内のスルー
ホール(12)を介して接続した場合、そのためにショ
ーテイングパターン(11)に接続されるメッキリード
(6)が−本必要となることになる。ここで、メッキリ
ードカット穴(7)の切断面で、隣り合うメッキリード
切断面の間隔が一定寸度以上離れていなければならない
という加工上、品質上の条件があるため、メッキリード
カット穴(7)を大きくするか、増さなければならない
という課題がある。
[Problems to be Solved by the Invention] In the conventional plated lead connection structure, shorting patterns (11
) is connected through a through hole (12) in the circuit pattern as shown in Fig. 4, the plated lead (6) connected to the shorting pattern (11) is required for this purpose. It will become. Here, there is a processing and quality condition that requires a certain distance or more between adjacent plated lead cut surfaces on the cut surfaces of the plated lead cut holes (7). 7) must be increased or increased.

また、第5図に示すように、各ショーテイングパターン
(11)から外部メッキリード(8)を引き出した場合
、基板外形断面でのメッキリード切断面が複数になり、
静電気の侵入路が増す為、静電気破壊を起こし易くなる
という課題があった。
Furthermore, as shown in FIG. 5, when the external plated leads (8) are pulled out from each shorting pattern (11), there are multiple plated lead cut surfaces in the cross section of the board outline.
There was a problem in that the number of paths for static electricity to enter increased, making it easier to cause static electricity damage.

そこでこの発明は、従来のこのような課題を解決するた
めに、外部メッキリードを少ない数にすることにより、
静電気破壊を防止することを目的としている。
Therefore, in order to solve these conventional problems, this invention reduces the number of external plated leads.
The purpose is to prevent static electricity damage.

[課題を解決するための手段] 上記課題を解決するために、本発明は、複数の層の同一
座標上に位置するショーテイングパターン間をスルーホ
ールによって導通させるメッキリード接続構造を構成す
ることにより、外部メッキリード引き出し線の数を少な
い本数でよい構造とした。
[Means for Solving the Problems] In order to solve the above problems, the present invention provides a plated lead connection structure in which shorting patterns located on the same coordinates of a plurality of layers are electrically connected through through holes. The structure allows only a small number of externally plated lead wires to be drawn out.

[作用] 上記のように構成された回路基板においては、各層のパ
ターンは、各層のショーテイングパターン内のスルーホ
ールを介して導通がとられているので、外部メツキは定
められた一定の外部メッキリード引き出し線のみに接続
して行なえる。
[Function] In the circuit board configured as described above, conduction is established between the patterns of each layer through the through holes in the shorting patterns of each layer, so the external plating is performed at a predetermined level. This can be done by connecting only the lead out line.

そして、メ・ンキ工程終了後に、ショーテイングパター
ン部をカットして回路基板として完成させる。
After completing the coating process, the shorting pattern portion is cut to complete the circuit board.

r実施例〕 以下に、本発明の実施例を図面に基づいて説明する。第
1図において、ショーテイングパターン1とショーテイ
ングパターン3は、スルーホール5により導通されてい
る。また、ショーテイングパターン1と2は同一面で回
路パターン13及びメッキリード6を介して接続されて
いる。従って、回路基板10上のパターンは全て導通さ
れたことになる0次に、回路パターン13の任意の一ケ
所から外部メッキリード8を引き出せば、回路基板10
上の回路パターン全てに電解メツキを施すことが可能に
なる。
Embodiment] Embodiments of the present invention will be described below based on the drawings. In FIG. 1, shorting pattern 1 and shorting pattern 3 are electrically connected through a through hole 5. In FIG. Furthermore, the shorting patterns 1 and 2 are connected on the same surface via a circuit pattern 13 and a plating lead 6. Therefore, all the patterns on the circuit board 10 are electrically connected. Next, if the external plated lead 8 is pulled out from any one place on the circuit pattern 13, the circuit board 10
It becomes possible to apply electrolytic plating to all of the above circuit patterns.

次に、基板外形を型抜きすると、基板外形断面に露出す
る外部メッキリード切断面は、第2図に示すように一ケ
所であるため、前記切断面がらの静電気の侵入を防止で
きることになる。ここで、パターンにはレジスト9を施
すこともできる。
Next, when the board is cut out, only one cut surface of the externally plated lead is exposed in the cross section of the board, as shown in FIG. 2, so it is possible to prevent static electricity from penetrating the cut surface. Here, a resist 9 can also be applied to the pattern.

また、ここでは、円形のショーテイングパターンエない
し4を実施例として示したが、特にその形状は限定しな
いため、角形をしたショーテイングパターンのランドで
も良い。
Further, here, circular shorting patterns A to 4 are shown as examples, but the shape is not particularly limited, and therefore, a land of a rectangular shorting pattern may be used.

[発明の効果] 以上説明したように、複数の層の平面的に近接した位置
にあるショーテイングパターン間をスルーホールにより
導通をとることで、基板外形断面に露出する外部メッキ
リード切断面が少ない個所にできるため、前記切断面か
らの静電気の侵入を防止でき、静電気破壊による不良の
発生や、故障を防止できる利点がある。
[Effects of the Invention] As explained above, by establishing conduction between shorting patterns located close to each other in a plane of multiple layers using through holes, there are fewer cut surfaces of externally plated leads exposed on the cross section of the board outline. This has the advantage that static electricity can be prevented from entering from the cut surface, and defects and breakdowns due to static electricity breakdown can be prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の実施例を示す平面図で(a)は裏パ
ターン図、(b)は表パターン図、第2図は、第1図(
b)のA部側面図、第3図は、メッキリードカット部斜
視図、第4図は、従来のメッキリード接続図、第5図は
、従来のメッキリード引き出し図である。 1 、2、3、4 5 ・ ・ ・ショーテイングパターン ・スルーホール (ショーテイングパターン間) ・メッキリード ・メッキリードカット穴 ・外部メッキリード引き出し線 ・レジスト ・回路基板 ・ショーテイングパターン ・スルーホール(回路パターン間) ・回路パターン 以 上 出願人 セイコー電子工業株式会社 代理人 弁理士  林   敬 之 助第 図 第 図
FIG. 1 is a plan view showing an embodiment of the present invention, (a) is a back pattern diagram, (b) is a front pattern diagram, and FIG.
b) is a side view of part A, FIG. 3 is a perspective view of a plated lead cut portion, FIG. 4 is a conventional plated lead connection diagram, and FIG. 5 is a conventional plated lead extraction diagram. 1 , 2, 3, 4 5 ・ ・ ・ Shorting pattern/Through hole (between shorting patterns) ・ Plated lead ・ Plated lead cut hole ・ External plated lead lead wire ・ Resist ・ Circuit board ・ Shorting pattern ・ Through hole ( Between circuit patterns) ・Circuit patterns and above Applicant Seiko Electronic Industries Co., Ltd. Agent Patent attorney Keisuke Hayashi Figure

Claims (3)

【特許請求の範囲】[Claims] (1)複数の層に回路パターンを有する回路基板におい
て、各層ショーティングパターン内にスルーホールを設
けることにより前記各層のショーティングパターン間の
導通を取ったことを特徴とする回路基板のメッキリード
接続構造。
(1) A plated lead connection for a circuit board having circuit patterns in a plurality of layers, characterized in that conduction between the shorting patterns in each layer is established by providing through holes in the shorting patterns in each layer. structure.
(2)前記ショーティングパターンを円形ラウンドにし
たことを特徴とする請求項1記載の回路基板のメッキリ
ード接続構造。
(2) The plating lead connection structure for a circuit board according to claim 1, wherein the shorting pattern is circular.
(3)前記ショーティングパターンを角形ラウンドにし
たことを特徴とする請求項1記載の回路基板のメッキリ
ード接続構造。
(3) The plating lead connection structure for a circuit board according to claim 1, wherein the shorting pattern is formed into a rectangular round shape.
JP12468590A 1990-05-14 1990-05-14 Plated lead connection structure of circuit board Pending JPH0423389A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12468590A JPH0423389A (en) 1990-05-14 1990-05-14 Plated lead connection structure of circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12468590A JPH0423389A (en) 1990-05-14 1990-05-14 Plated lead connection structure of circuit board

Publications (1)

Publication Number Publication Date
JPH0423389A true JPH0423389A (en) 1992-01-27

Family

ID=14891544

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12468590A Pending JPH0423389A (en) 1990-05-14 1990-05-14 Plated lead connection structure of circuit board

Country Status (1)

Country Link
JP (1) JPH0423389A (en)

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