JPH04233006A - Programmable controller - Google Patents

Abstract

PURPOSE:To program the stop and reset operations of a process part in a program in a form easy for a user. CONSTITUTION:A sub chart 10 is constituted by totally collecting a series of relative processes in the program, and a high-order process 2 is provided. Then, this high-order process 2 is stopped and reset so as to stop and reset all the processes constituting the sub chart 10 as low-order processes.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a programmable controller having means for executing a step-by-step language (SFC) as a user program.

0002

[Background Art] In recent years, programmable controllers (hereinafter referred to as PCs) have become widespread and are now being used in complex and advanced control fields. Various forms of languages are now being used as programming languages.

[0003]However, although various types of programming languages are used in conventional PCs, which mainly target logic control, they are not sufficient to handle the increasing size and complexity of systems in recent years. It could not be said that it was able to respond to the current situation, and it was also unable to follow software engineering concepts such as quality control and reuse of PC programming languages.

[0004] Therefore, in recent years, International
l Electrotechnical Commis
sion (hereinafter referred to as IEC) has revised the PC programming language to create a sequential function language (sequential function language) that can express process steps in the conventional ladder language description format and allows structured programming.
Chart (hereinafter referred to as SFC) and compiled a draft standard.

[0005] This allows the entire program to be divided into many "steps".
It is a graphic language that divides each process into one or more "processes" and programs them.
It is based on step-by-step control.

[0006] This SFC is programmed by combining "transition conditions" inserted between each process and processes accompanying each process.

[0007]

[Problems to be Solved by the Invention] However, in the PC using the conventional SFC as described above, when it is necessary to stop and reset the load for a certain process part in the program, there are the following problems. .

(1) First, in the processing method described above, in order to stop the execution of a certain process, it is necessary to deactivate the process itself and transfer the process to the next process. It cannot be said that the system has been stopped, and if an emergency stop or the like is required, prompt processing cannot be carried out.

(2) Furthermore, SFC is programmed by combining processes and transition conditions between processes.
Because the description method is simple, expressing complex control such as stopping a process requires program redundancy, which impairs the high visibility that is a feature of process-based languages, and also reduces program capacity. From the point of view, this increases the capacity for programming the redundant parts, and additionally requires additional man-hours.

The present invention has been made in view of the above-mentioned conventional problems, and its purpose is to enable the user to easily program stop and reset operations for certain process parts in a program. The objective is to provide a programmable controller that makes it possible.

[0011]

[Means for Solving the Problems] In order to achieve the above object, the present invention divides the entire user program into steps, and executes SFC in which step-by-step control is performed based on transition conditions between steps. In a programmable controller having means, during a program process, a plurality of related processes are made into one chart as a subchart, and an upper process that stops and resets all of these subcharts is provided, and a The stop and reset is characterized in that it is executed by a stop and reset command for the upper process of the subchart.

0012

[Operation] In this invention, when a higher-level process in a hierarchical step-by-step program is commanded to stop and reset execution, the entire subchart process included under the higher-level process is also stopped and reset. Therefore, it is sufficient to issue stop and reset commands only to the upper-level processes. Therefore, it is possible to reduce the capacity of the emergency stop program and speed up the emergency stop processing.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained below based on the drawings.

FIG. 1 is a block diagram showing the overall configuration of an embodiment to which the present invention is applied.

First, the configuration will be explained. The CPU 11 is composed of a microprocessor and controls the entire device.

The input/output (I/0) memory 12 is a memory that stores the state of the input/output circuit (I/0) 17 that is input or output via the interface (I/F) 16.

The user program memory 1 is a memory that stores process information tables for the number of processes and their respective start addresses.

The user program memory 2 is a memory that stores transition condition information tables for the number of transition conditions and their respective start addresses.

The user program memory 3 is a memory that stores processing programs representing processes within a process and their respective start addresses.

The user program memory 4 is a memory that stores transition condition programs representing transition conditions and their respective start addresses.

[0021] The system program memory 13 is a CPU
This is a memory that stores a system program for controlling 11.

The work memory 14 is a memory used as a work area for controlling the entire PC.

[0023] In this example, the user program memory is divided into four parts, but they may be combined into one.

The basic configuration of this embodiment has been described above, and its operation will be explained next.

FIGS. 2 to 7 are charts showing examples of step-by-step programs based on SFC, with FIG. 2 being an overall chart and FIGS. 3 to 7 being partial detailed charts of FIG. 2.

First, an overview of SFC, which is a step-by-step language, will be explained with reference to the overall chart shown in FIG. 2. SFC divides the entire program into a number of "steps" (indicated by A). It is a graphic language that programs one process by dividing it into one or more "processes" (indicated by B), and is based on step-by-step control.

That is, programming is performed by combining "transition conditions" (indicated by C) inserted between each process and process B accompanying process A.

As shown in the figure, in SFC, each process A is represented by a box-like shape, and the transition condition C between each process is represented by a horizontal line. Further, processing B accompanying each step A is also represented in a box-like shape.

Next, the characteristics of "process", "process", and "transition condition" will be briefly described.

A "process" has a logical state of active or inactive, and when in the active state, "processing" related to the "process" is executed in order. On the other hand, when it is in an inactive state, the processing within that "step" is not executed. 1 for “Process”
If the "process" is not related, the process will "wait" until the "transition condition" for the "process" is satisfied. A "process" always has a unique process number, and a "process" with the same process number
It is not possible to use multiple "processes". Furthermore, there is no "process" without a process number.

Next, zero or more "processes" are associated with each "process." A "process" that is not associated with any "process" can be used as a "dummy" that does nothing even if it becomes active. A "process" is turned on or off according to the active or inactive state of the "process" to which the "process" belongs. A "process" always has a unique process number, and multiple "processes" with the same process number cannot be used. Furthermore, there is no "process" without a process number.

[0032] Only one "transition condition" exists between "steps" and "steps", and represents a connection condition between "steps" and "steps". Then, when the condition of the "transition condition" under the "process" in the active state is satisfied, the "process" currently in the active state becomes inactive, and the next "process" becomes active. In this way, "transition conditions" play a role in controlling the flow of control from "process" to "process". This "transition condition" also always has a unique transition condition number. Furthermore, multiple "transition conditions" having the same transition condition number cannot be used. Further, there is no "transition condition" without a transition condition number.

Next, referring to FIGS. 3 to 7, the SFC
Explain the basic operation of.

First, FIG. 3 shows the process step operation, and process 1 is in the active state, and process 1 and process 2 are in the active state.
is being executed, if transition condition 1, which is an execution transition condition for process 1 and process 2, is satisfied, process 1 becomes inactive and process 2 becomes active. As a result, execution of Process 1 and Process 2, which are the processes of Step 1, is interrupted, and Process 3, which is the process of Step 2, starts to be executed. Process 3 is then repeated until process 2 becomes inactive.

Next, FIG. 4 shows a selective branching operation. When process 2 is in the active state and process 3 is being executed, transition condition 2, which is the execution transition condition of process 2 and process 3, is is satisfied, or when transition condition 3, which is the execution transition condition for process 2 and process 4, is satisfied, process 2 becomes inactive and moves to the next process. If transition condition 2 is satisfied, the active state of process 2 moves to process 3, execution of process 3 is interrupted, and process 4 starts execution. This process 4
The execution of is repeated until transition condition 4 is satisfied.

Next, FIG. 5 shows a parallel branch operation. When process 4 is in the active state and process 5 is being executed, the execution transition conditions between process 4, process 5, and process 6 are When a certain transition condition 5 is satisfied, process 4 becomes inactive, and process 5 and process 6 simultaneously become active. As a result, execution of process 5, which is the process of process 4, is interrupted, and process 6, which is the process of process 5, and process 7, which is the process of process 6, are started. Then, execution of this process 6 is repeated until transition condition 6 is satisfied,
The execution of process 7 is repeated until transition condition 7 is satisfied.

Next, FIG. 6 shows a parallel merging operation, and the transition from step 5 to step 7 and the transition from step 6 to step 8 are the same as in FIG. However, the transition from step 7 to step 9 and from step 8 to step 9 is as follows. In other words, the transition to step 9 is the transition from step 7 to step 8.
This is performed only when both are in the active state and transition condition 8 is satisfied. In this case, process 7 and process 8 are simultaneously inactive and process 9 is active. As a result, process 8, which is the process of process 7, and process 9, which is the process of process 8, are interrupted, and process 1, which is the process of process 9, is interrupted.
0 starts execution. Execution of this process 10 is transition condition 9
is repeated until it is satisfied.

Next, FIG. 7 shows the merging operation from the selection branch, and the transition operation from step 3 to step 10,
The transition operation from step 9 to step 10 is similar to that in FIG. 3, and each operation is performed separately.

The above is the basic operation of SFC. By the way, in order to execute the above processing, the following user programs (1 to 4) are stored in each user program memory 1 to 4.
) to (4) are stored.

Of these, FIG. 8 shows the contents of the user program (1) stored in the user program memory 1.
) is the process information table vector storage area 200 where the process information table vector 20 is stored, and the number of processes (n+
It is composed of a process information table storage area 230 in which the process information table 23 of 1) is stored.

FIG. 9 shows details of the process information table 23. One process information table 23 is provided for each process, and each table includes a process number 24, number of processes in process 25, A process number 26, a number 27 of transition conditions for moving to the next step, and their transition condition numbers 28 are written.

In the figure, numeral 29 is a binary display column, in which 1 is written in advance in the case of a process that becomes active at the start of program operation.

In this example, each process information table 2
Although a binary display column 29 is provided for every 3 steps, a separate table may be provided that collects only the steps that become active at the start of the program operation.

[0044] The process information table 23 is read out and processed one table at a time, if necessary, when the program is executed.

Next, FIG. 10 shows details of the process information table vector 20. In the process information table vector 20, the start addresses 21 of each table are stored for the number of processes (n+1), and the program During execution, the corresponding process information table 23 is read out while referring to the start address 21 of each table stored in the process information table vector 20.

Next, FIG. 11 shows the user program memory 2.
As shown in the figure, the user program (2) is stored in the user program (2).
is provided with a transition condition information table vector storage area 300 in which a transition condition information table vector 30 is stored, and a transition condition information table storage area 330 in which transition condition information tables 33 for the number of transition conditions (m+1) are stored. ing.

FIG. 12 shows the details of the transition condition information table 33. The transition condition information table 33 is provided for each transition condition, and each transition condition information table 3
3, the transition condition number 34, the number of preceding steps 35 preceding each transition condition, the number 36 of preceding steps, the number 37 of subsequent steps following each transition condition, and the number 38 of subsequent steps are written. There is.

The transition condition information table 33 is read out and processed one table at a time, if necessary, when the program is executed.

Next, FIG. 13 shows the details of the transition condition information table vector 30. In the transition condition information table vector 30, the start addresses 31 of each table are stored for the number of transition conditions (m+1), When the program is executed, the corresponding transition condition table 33 is read out while referring to the start address 31 of each table stored in the transition condition table vector 30.

Next, FIG. 14 shows the user program memory 3.
As shown in the figure, the user program (3) has a processing program vector storage area 400 in which a processing program vector 40 is stored, and a processing number (3). A processing program storage area 430 is provided in which processing programs 43 for p+1) are stored.

FIG. 15 shows an example of the processing program 43, which is shown in the form of a ladder chart or the like.

Next, FIG. 16 shows details of the processing program vector 40. The processing program vector 40 stores the start addresses 41 of each processing program 43 for the number of processing programs (p+1). During execution, the corresponding processing program 43 is read out one program at a time while referring to the start address 41 stored in the processing program vector 40.

Next, FIG. 17 shows the user program memory 4.
This shows the contents of the user program (4) stored in the computer.As shown in the figure, the user program (4)
includes a transition condition program vector storage area 500 in which the transition condition program vector 50 is stored, and a transition condition program vector storage area 500 in which the transition condition program vector 50 is stored, and the number of transition conditions (
A transition condition program storage area 530 is provided in which transition condition programs 53 for m+1) are stored.

FIG. 18 shows an example of the transition condition program 53, which is shown in the form of a ladder chart or the like.

Next, FIG. 19 shows details of the transition condition program vector 50. The transition condition program vector 50 stores the start addresses 51 of each transition condition program for the number of transition conditions (m+1). When executing a program, the corresponding transition condition program 53 is read in program units while referring to the start address 51 stored in the transition condition program vector 50.

Next, FIGS. 20 to 23 show user programs (1) to (4) when the SFC programs shown in FIGS. 2 to 7 are written as codes in four user program memories 1 to 4. This is the content.

Of these, FIG. 20 shows the user program (1
), FIG. 21 shows the contents of the user program (2), FIG. 22 shows the contents of the user program (3), and FIG. 23 shows the contents of the user program (4). The contents are shown in Figures 8 to 1 already mentioned.
Since the contents are the same as those in Section 8, repeated explanation will be omitted.

The above are the basic operations of the SFC employed in this embodiment and the contents of each user program.

Incidentally, during program execution, an emergency stop may be necessary. In this case, as already mentioned, a very complicated program would be required if it were to be possible to individually stop and reset any process.

Therefore, in this embodiment, a series of related processes during a program are grouped together to form a subchart, and a higher level process is provided, and by stopping and resetting this higher level process, the lower level process is All processes that make up a subchart can be stopped and reset.

[0061] It should be noted in advance that the process numbers and process numbers used in the following explanation are completely unrelated to the process numbers and process numbers used in the previous explanations.

That is, FIG. 24 is the main chart of the SFC used in this example. In this figure, steps 1 and 3 have the same functions as those described above, and are I don't have a chart. However, process 2 is a higher level process that includes subchart 10.

FIG. 25 is a detailed diagram of the above subchart 10. When the program is executed, step 1 shown in FIG.
At the stage when the active state of is transitioned to step 2, step 10 shown in the figure becomes active state, and thereafter, step 2 does not transition to step 3 until step 17 becomes active state.

Incidentally, the step-by-step chart having the above-mentioned hierarchical structure is a well-known technique in a step-by-step language such as GARAFCET, so the description method thereof will not be described in detail here.

The contents of the SFC having a hierarchical structure adopted in this embodiment have been described above, and the method for resetting each process having such a structure will be described in detail below.

First, when resetting a specific process, a process designation command 5 as shown in FIG. 26 is used. This process designation instruction 5 is stored in the user program (1), and the process designation instruction is executed by writing the process number to be reset into the operand 6 of the instruction 5.

Therefore, when two process designation instructions 5 are provided in the instruction program as shown in FIG. 27, when 1 is written to the operand 6, the contact A is turned on and the reset operation for the process 1 is performed. This resets the load associated with step 1.

On the other hand, when 2 is written to operand 6, contact B is turned on and a reset operation is performed for the entire subchart 10, which is a lower step of step 2. This results in
The load associated with the entire process constituting the subchart 10 is reset.

Here, since the processing procedure for resetting one process, such as the reset operation for process 1, is conventionally well known, its explanation will be omitted.Hereinafter, when there is a reset command for upper process 2 having a subchart, The processing procedure will be explained.

First, the work memory 14 is provided with a reset end storage table 7 as shown in FIG. Each bit is reserved.

That is, FIG. 29 is a detailed view of FIG. 28, and one bit is secured for each process in the direction from DO to D15.

[0072] Then, when executing a master instruction, each bit is cleared and set to 0, and the corresponding bit is turned on and set to 1 every time one process reset is completed.

Now, to explain the case where there is a reset command for the upper process 2 and its lower process, the subchart 10 shown in FIG. The process is reset one process at a time in the order of connection while referring to the process information table 23 and the transition condition information table 33.

When the reset is completed, the corresponding bit in the reset completion storage table 7 is set to 1.

By the way, in this case, the work memory 14 is provided with a reset queue table 8 as shown in FIG. 30, and this queue table 8 is provided with a current processing pointer column 8a and a reset processing work area 8b. It is being

When the reset for steps 10 and 11 is completed, writing to the queue table 8 is performed as shown in (1) and (2) of FIG.
During the processing of steps 10 and 11, nothing is written in the reset processing work area 8b, and therefore 0 is written in the current processing pointer field 8a.

By the way, if there is a parallel branch or a selective branch on the chart, only the first process on the process information table is reset, the remaining process numbers are written in the reset process work area 8b, and the number of writes at that time is is written in the pointer field 8a as the current processing pointer.

Therefore, there is a branch from step 11 to step 12, step 14, and step 16, but in this case, since steps 12, 14, and 16 are stored in the order of step information table 23, ( (Judging from transition condition number 28)
First, step 12 is reset, and as shown in FIG. 31(3), the step numbers of steps 14 and 16 are written in the reset processing work area 8b, and the current processing pointer is set to 2.

Next, as shown in (4), the reset process of step 13 is performed, but in this case, the state of the queue table 8 remains unchanged.

By the way, since step 13 is a subchart end step, the subsequent step of step 13 returns back to step 12, but since step 12 has already been reset, the steps in the reset end storage table 7 12 is 1.

Therefore, among the remaining processes written in the queue table 8, the process 14 which is located earlier in the storage order in the process information table 23 is reset.

In this case, as shown in FIG. 31(5), there is one process remaining on the queue table 8, so the pointer value is incremented to 1.

Next, as shown in (6), the reset process of step 15 is performed, but step 15 is the same as step 13.
Since it is a subchart end process, queue table 8
The reset process continues from step 16, which is the remaining step written in .

When the reset process in step 16 is completed, there is no remaining process written in the reset process work area 8b, so the current process pointer is set to 0, and the process proceeds to the reset process in step 17, as shown in (8). .

Here, since step 17 is a subchart end step like steps 13 and 15, the reset process is continued from the remaining steps written in the queue table 8, but if the actual row pointer is 0, Since there are no remaining processes, the reset process ends.

[0086] In the above explanation, the case of resetting a process has been explained, but the process of stopping a process can be done in exactly the same way. Status (active/inactive)
It is preferable to provide a table in the work area 14 to store the information.

Next, FIG. 32 is a flowchart showing the overall processing procedure of the programmable controller according to this embodiment. The overall processing procedure of this embodiment will be explained based on the figure. Then, first, the initial process of turning on the power (step 80) is followed by the common process (step 80).
Step 82) is performed. If the user program can be operated (YES in step 84) and if it is the first operation (YES in step 86), user program operation initial processing (step 88) is followed by user program operation processing (step 90). Output circuit (I/O)
17 refresh (step 92) is performed and the process returns to the common process (step 82).

As explained above, in this embodiment, when a higher-level process in a hierarchical step-by-step program is commanded to stop and reset execution, the entire subchart process included in the lower level of the higher-level process is Also, stop and reset processing is performed, and it is only necessary to issue a stop and reset command for the steps of the upper steps.

Therefore, it is possible to reduce the capacity of the emergency stop program and speed up the emergency stop processing.

[0090]

Effects of the Invention As explained above, in the present invention, a plurality of related steps in a program process are converted into one chart to form a subchart, and a higher level step that stops and resets all of these subcharts is provided. Since corrections and resets to processes in a subchart can be executed by using stop and reset commands for the upper process of the subchart, users can easily program stop and reset operations for a certain process part in a program. It has the following effects:

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the overall configuration of an embodiment to which the present invention is applied.

FIG. 2 is an explanatory diagram of an overall chart of SFC, which is a step-by-step language.

FIG. 3 is an explanatory diagram of process progression processing in FIG. 2;

FIG. 4 is an explanatory diagram of selective branching processing in FIG. 2;

FIG. 5 is an explanatory diagram of parallel branch processing in FIG. 2;

FIG. 6 is an explanatory diagram of parallel merging processing in FIG. 2;

FIG. 7 is an explanatory diagram of the merge process from the selective branch process in FIG. 2;

FIG. 8 is an explanatory diagram of a user program (1).

FIG. 9 is an explanatory diagram of a process information table.

FIG. 10 is an explanatory diagram of a process information table vector.

FIG. 11 is an explanatory diagram of a user program (2).

FIG. 12 is an explanatory diagram of a transition condition information table.

FIG. 13 is an explanatory diagram of a transition condition information table vector.

FIG. 14 is an explanatory diagram of a user program (3).

FIG. 15 is an explanatory diagram of a processing program.

FIG. 16 is an explanatory diagram of a processing program vector.

FIG. 17 is an explanatory diagram of a user program (4).

FIG. 18 is an explanatory diagram of a transition condition program.

FIG. 19 is an explanatory diagram of a transition condition program vector.

FIG. 20 is an explanatory diagram when the user program (1) is downloaded as a code to the user program memory.

FIG. 21 is an explanatory diagram when the user program (2) is downloaded as a code to the user program memory.

FIG. 22 is an explanatory diagram when the user program (3) is downloaded as a code to the user program memory.

FIG. 23 is an explanatory diagram when the user program (4) is downloaded as a code to the user program memory.

FIG. 24 is an explanatory diagram of a main chart.

FIG. 25 is a detailed diagram of the subchart in FIG. 24;

FIG. 26 is an explanatory diagram of process designation instructions stored in a user program.

FIG. 27 is an explanatory diagram of an instruction program stored in a user program.

FIG. 28 is an explanatory diagram of a reset end storage table.

FIG. 29 is a detailed explanatory diagram of the reset end storage table shown in FIG. 28;

FIG. 30 is an explanatory diagram of a reset queue table.

FIG. 31 is an explanatory diagram of a queue table for each process when a subchart is executed.

FIG. 32 is a flowchart showing the overall processing procedure of the programmable controller.

[Explanation of symbols]

1, 2, 3, 4 User program memory (1), (
2), (3), (4) User program 5 Process specification instruction 6 Operand 7 Reset end storage table 8 Queue table 11 CPU 12 Input/output (I/0) memory 13 System program memory 14 Work memory 17 Input/output circuit (I /0)

Claims (1)

[Claims] Claim 1: Divide the entire user program into steps,
SFC that performs step-by-step control based on transition conditions between processes
In a programmable controller having an execution means, during a program process, a plurality of related processes are made into one chart as a subchart, and an upper process that stops and resets all of these subcharts is provided, and A programmable controller characterized in that a stop and reset for a process is executed by a stop and reset command for an upper process of the subchart.