JPH0423053A - Bus monitoring device for microcomputer - Google Patents

Abstract

PURPOSE:To record the flow of data in a microcomputer in a long period of time by converting the digital data on a data bus into the analog data with use of an address coincidence signal. CONSTITUTION:A bus monitoring device 13 compares an address set on an address bus with an address set by an address setting circuit 17 through a coincidence circuit 18 and then outputs a signal of a high level when the coincidence is obtained between both addresses. This coincidence signal sets up a gate 19C with a system clock signal E clock signal, and an address valid signal VMA signal received from a control bus and then outputs a chip selection signal of a low level to a D/A converter 23. Thus the data on the data bus are latched by a latch circuit 20 from a processor MPU, decoded and displayed. Meanwhile the digital data on the data bus are converted into the analog data by the converter 23 and outputted to a recorder to be recorded there. These operations are continuously carried out so that the change of the data received from a sensor can be recorded in real time, over a long period of time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bus monitor device for a microcomputer that monitors data within a microcomputer.

"Conventional technology" Generally, when developing microcomputer-applied equipment, consideration is given to both the hardware and software aspects, and once the specifications are decided, the actual work is carried out by dividing the hardware design and software design. do.

Once the design is completed and the product is prototyped, first,
Perform an operation test) to confirm that there are no defects. At this stage, an in-circuit emulator (ICE
), logic analyzers, etc. are used to debug the software and hardware of microcomputers. They are often used for built-in control, and reliability in various environments is particularly important for such products.

Therefore, it is ultimately necessary to confirm reliability through comprehensive environmental tests over a long period of time under various environments.

[Problems to be Solved by the Invention] However, in such environmental tests, it is often difficult to detect abnormalities in equipment using an ICE or logic analyzer for analyzing the operation of a microcomputer.

In other words, ICE and logic analyzers store dynamically changing data in microcomputers in memory and statically display the data on a CRT or other display to support operation analysis. It is difficult to monitor the operation of the system over a long period of time.

Furthermore, in the development of microcomputer-applied equipment, engineers involved in hardware design and engineers involved in software design work together to proceed with development, but each engineer does not necessarily work on hardware that is not part of his or her own responsibility. They are not necessarily, and usually do not need to be, familiar with the ins and outs of software.

Therefore, in a comprehensive environmental test that covers both the software and hardware of a product, even if only the digital data in the microcomputer is monitored for a short period of time, it will be difficult for hardware engineers or software I/ware engineers to detect problems. It is not clear whether the true cause lies in the software I/ware or the hardware, which is one of the reasons why it is difficult to analyze the behavior.

[Purpose of the Invention] The present invention has been made in view of the above circumstances, and makes it possible to record the flow of data in a microcomputer over a long period of time, and facilitates operation analysis under various environments. The purpose of this invention is to provide a microcomputer bus monitor device that supports the development of microcomputer application equipment.

[Means for Solving the Problems] In order to achieve the above object, a bus monitor device for a microcomputer according to the present invention includes an address setting circuit for setting a predetermined address of a target microcomputer, and the above-mentioned bus monitor device for a microcomputer. a matching circuit connected to the address bus of the microcomputer 2, and outputting a matching signal when the address on the address bus does not match the address set by the address setting circuit;
-Microphone [7] Connected to the data bus of the computer, and based on the matching signal from the matching circuit, said data bus.
The digital/analog conversion circuit converts the second digital data into analog data.

[Operation] In the microcomputer bus monitor device having the above configuration, first, this microcomputer bus monitor device is connected to a target microcomputer, and a predetermined address of this microcomputer is set by an address setting circuit.

Then, when the address set by the address setting circuit matches the address of the address bus 1- of the microcomputer, a match signal is output from the match circuit.
Based on this coincidence signal, the digital data on the microcomputer's data bus 2 is converted into analog data by a digital/analog conversion circuit.

[Embodiments of the invention] Hereinafter, the present invention will be described in detail with reference to the drawings.

The drawings show an embodiment of the present invention; FIG. 1 is a circuit block diagram of a bus monitor device, and FIG. 2 is a configuration diagram of an environmental test monitor device.

(JM Sei) In FIG. 2, reference numeral 1 is a control device, and this control device 1 is mainly configured with a microcomputer 2.
Input processing times i to this microcomputer 2? Sensors 4 are connected via li3, and output processing circuit 5
Actuators 6 are connected via.

The microcomputer 1 is connected to a microprocessor (MPU) 8 by a path line 7 consisting of an address bus 7a, a data bus 7b, and a control bus 7c.
．． Read-only memory (ROM)9. Random Access Memory (RAM) 10 Timer/Counter 11. Input/output (
Ilo) A multi-chip microcomputer configured by interconnecting multiple chips such as the board 12, or a single-chip microcomputer in which the functions of each chip are integrated on one LSI, and the above I1
The sensors 4 are connected to the input boat of the zero boat 12 via the input processing circuit 3, while the actuators 6 are connected to the output boat via the output processing circuit 5.

Further, reference numeral 13 denotes a bus monitor device, and this bus monitor device 13 includes a connection connector (hereinafter referred to as an MPU board) 1 corresponding to the type of the microcomputer 2.
4 is connected to, for example, a chip of the MPU 8, and connected to the address bus 7a, data bus 7b, and control bus 7C inside the microcomputer 2 via an external bus 15 extending from the MPU board 14. The bus monitor device 13 may be connected by a card edge connector or the like when the microcomputer 2 has the bus 7 open at the end of the board.

Furthermore, a recorder such as a multi-channel recorder 16 is connected to the output end of the bus monitor device 13,
An environmental test monitor device is configured to monitor the operating status of the control device 1 under various environments.

As shown in FIG. 1, the bus monitor device 13 includes an address setting circuit 17, a matching circuit 18, a timing circuit &'8
19, latch circuit 20, decoder 21, display 22, and digital/analog conversion circuit (D/A converter)
It consists of 23.

The address setting circuit 17 corresponds to the microcomputer 2 of, for example, 8 pins, and uses a digital switch etc.
It is possible to set addresses in hexadecimal numbers for 4 to 12 channels.

The display device 22 is composed of LED segments and the like, and is adapted to display data for 4 to 12 channels in hexadecimal notation of 00I (~FFH) in response to the address setting by the address setting circuit 17. There is.

Then, the address bus 7 of the microcomputer 2
a and the address setting circuit 17 are connected to a coincidence circuit 18, and the output terminal of this coincidence circuit 18 and the control bus 7c of the microcomputer 2 are connected to the timing circuit 1.
Connected to 9. Furthermore, the microcomputer 2
The data bus 7b and the output end of the timing circuit 19 are connected to a latch circuit 20, and a display 22 is connected to the latch circuit 20 via a decoder 21.

The above-mentioned timing circuit 19 is shown in the figure, for example, in the case where the microcomputer 2 is constituted by a microprocessor MC6802 manufactured by Motorola in the United States or a microprocessor of the same type, and the output signal of the above-mentioned coincidence circuit 18, The system clock signal (E clock signal) from the control bus 7c is inverted by the inverter 18b and the read/write signal (R
/W signal) is input to the AND gate 19a, and the output signal of this AND gate 19a is the latch circuit FI? 12
It is connected to be input to 0.

In addition, the output signal of the above-mentioned -several times i ¥818, the E clock signal from the control bus 7c, and the address valid signal (VMA signal) are input to one Nands gate (:), and this Nands gate -1. .9 The output signal of c is D/A
It is input to the converter 23.

The D/A converter 23 is connected to the data bus 7b of the micro:1 computer 2, and the output signal from the NAND game 1/19c of the timing circuit 1 is input to the chip select terminal (C8 terminal). , connected so that the R/W signal from the control bus 7c is input to the chip enable terminal (■ terminal),
For example, digital data from 00H to FFH is o, oo
The voltage is converted into an analog voltage of 255 V and recorded on the multi-channel recorder 16.

(for production) Next, the operation of the embodiment with the above configuration will be explained.

First, select the MPU board 14 according to the type of the target microcomputer 2, connect the bus monitor device 'If, 13 to the microcomputer 2 via this Ml''U board 14, and then connect the MPU board 14 to the microcomputer 2. A predetermined address in the memory space No. 2 is set by a digital switch of the address setting circuit 17 or the like.

Here, when monitoring the operation of the microcomputer 2, for example, the microcomputer 2 stores data from the sensors 4 at address 800OL1 of RAM10, and stores the data at address 80008 DATA.
80 when 800011 does not satisfy the predetermined first condition
80 Timer/Counter assigned to address H] The contents of the counter 1 are incremented, and when the second condition is satisfied, the contents of the counter are decremented, and the data D A T A 800011 is assigned to the first. When monitoring the operation of holding the contents of the counter when neither of the second conditions is satisfied, the address of channel CH1 of the address setting circuit 17 is set to 8000H, and the address of channel CH2 is set to 80AOH.

Then, in the microcomputer 2, MP tJ
In order to store the data of the sensors 4 taken in by 8 via the I10 port 12 into the RAM 10, the 8000 data is sent on the address bus 7a in synchronization with the falling edge of the E clock signal.
In addition to outputting the address of H, the control bus 7
When the R/W signal on C is set to low level and the VMA signal is set to high level, these signals are input to the bus monitor device r113.

In the bus monitor device 13, the address on the address bus 7a and the address set by the address setting circuit 17 are compared in a match circuit 18, and when these addresses match, a high level match signal is output.

The coincidence signal from the coincidence circuit 18 is input to one timing circuit, and this timing IT! In 7i19, when the E clock signal is inverted to high level, an AND condition is established for the R and /W signals inverted by the above match signal, the E clock signal, and the inverter 191], and the A high level active signal is output to the latch circuit 20.

At the same time, the active condition of the NAND games 1-1 and 9c is established by the match signal from the matching circuit 8, the E clock signal from the control bus 7c, and the VMA signal, and the above R/W (by the g. A low level depth select signal is output to the D/A converter 23 which has become active.

As a result, from the MPL 18 to the data bus 7b-1-
Data DA T output with a predetermined delay time
A 800011 is fixed in the latch circuit 20, converted into hexadecimal characters by the decoder 21, and displayed on the channel CHI of the display 22. It is also latched inside the D/A converter 23, converted to an analog voltage, and then sent to the multiplayer. The signal is output to channel recording iL 16 and recorded on channel CH1 of this multi-channel recorder 16.

After that, the MPU 8 reads 80001 of the RAM 10.
Data stored at address 1 DATA 8000+
1 satisfies a predetermined condition and performs a write operation to update the contents of the counter of the timer/counter j1 according to the determination result, the address of the address bus 7aJ2 and the address When the set address (80ΔO1] of channel CH2 of the setting circuit 17 matches, a match signal is output from the matching circuit 18,
Similarly, data on the data bus 7b is displayed on channel CI 2 of the display 22 and recorded as an analog voltage on channel C 112 of the multi-channel recorder 16.

This operation is performed continuously, and the bus monitor device 13 detects the change in data from the sensors 4 in the microcomputer 2 and the timer/timer according to the change in data.
The manner in which the counter contents of the counter 11 are incremented or decremented can be recorded in real time and over a long period of time, and the control bag M1 can be tested for a long period of time under any environment.

That is, by monitoring the actual operation of the control device 1 as analog data in real time over a long period of time, for example, the sensors 4 may deteriorate during a long period of testing.
Even if the contents of the counter of the timer/counter 11 change unexpectedly, the time and situation can be accurately grasped, and an abnormality in the sensors 4 can be immediately determined. Furthermore, if the contents of the counter change unexpectedly even though the outputs of the sensors 4 are normal, it can be assumed that there is a problem with the condition check routine on the software.

This not only makes it possible for hardware engineers who are not familiar with software to discover software bugs, but also enables software engineers who are not familiar with hardware to discover hardware abnormalities. This makes it possible to perform comprehensive software and hardware debugging reliably, and greatly improve the efficiency of developing microcomputer-applied equipment.

[Effects of the Invention] As explained above, according to the present invention, when a predetermined address is set for a target microcomputer by the address setting circuit, the address set by the address setting circuit and the address bus of the microcomputer are When the above address matches, a match signal is output from the match circuit, and based on this match signal, the digital data on the data bus is converted into analog data by the digital/analog conversion circuit.

Therefore, by connecting a recorder or the like to the digital/analog conversion circuit, the data flow on the data bus of the microcomputer can be recorded as analog data over a long period of time, allowing operation under various environments. It has excellent effects such as making analysis easier and greatly improving the efficiency of developing microcomputer-applied equipment.

[Brief explanation of drawings]

The drawings show an embodiment of the present invention; FIG. 1 is a circuit block diagram of a bus monitor device, and FIG. 2 is a configuration diagram of an environmental test monitor device. 2... Microcomputer 7a... Address bus 7b... Data bus 17... Address setting circuit 18... Matching circuit

Claims (1)

[Claims] An address setting circuit for setting a predetermined address of a target microcomputer, and an address setting circuit connected to an address bus of the microcomputer, and an address on the address bus and the address setting circuit. A match circuit that outputs a match signal when the address set in matches, is connected to the data bus of the microcomputer, and the digital data on the data bus is converted to analog data based on the match signal from the match circuit. Digital to convert/
A bus monitor device for a microcomputer, characterized by comprising an analog conversion circuit.