JPH04223369A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To enable a chip to be restrained from increasing in size by a method wherein an impedance conversion means which outputs a potential equal to that of a common terminal is connected to the common terminal. CONSTITUTION:An input terminal IN of an impedance converter 9 is newly connected to the output point COMn of output transistors 2-5. The output terminal OUT of the impedance converter 9 is made to serve as a new scanning output point COMn1 and outputs a common drive signal COMn1. Furthermore, the gates of transistors 10 and 11 are connected to the input terminal IN in common, the drains of the P transistor 10 and the N transistor 11 are connected to a direct current power supply VEE of low potential side and a direct current power supply VDD OF high potential side respectively to constitute a source follower. Therefore, the potential of the input terminal IN is outputted to the output terminal OUT as it is low in output impedance. By this setup, the transistors 2-5 can be set minimal in size.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device formed by integrating MOS field effect transistors (MOSFETs), such as a semiconductor integrated circuit device for driving an LCD (liquid crystal display).

[0002] In the following figures, the same reference numerals indicate the same or corresponding parts. Also logic or level “H”,
"L" shall be simply written as H and L.

0003

2. Description of the Related Art FIG. 3 shows a general circuit (scan driver) for driving the scan lines of a simple matrix of an LCD panel.
An example of the configuration of one scanning output point (nth) is shown. Further, FIG. 4 shows an example of waveforms of each part signal in FIG. 3 (that is, related to the n-th scanning output point).

In FIG. 3, 1 is an output unit for the n-th scanning output point, COMn is the common drive signal as the n-th scanning output point or its output signal, and V
0 to V5 and VEE are DC power supplies for driving the liquid crystal. Note that each potential of the power supplies V0 to V5 and VEE is V0>V
There is a relationship of 1>V5>VEE, and more generally V0,
The relationship is V1>>V5, VEE.

2 and 3 are respectively connected to the power supply V as shown in FIG.
1, P-channel transistor for output that opens and closes V0 and supplies the potential to the scanning output point COMn, 4 and 5 similarly power supply V5, opens and closes VEE and supplies the potential to the scanning output point COMn.
The output N-channel transistor and DF given to n are shown in Figure 4.
As shown in FIG. 4, the alternating current signal repeats H and L for the same time at regular intervals, and Qn is the selection data given to this nth scanning output point via the shift register 8 and level shifter 7 as shown in FIG. , 6 is a decoder which decodes the alternating current signal DF and the selection data Qn and drives the output transistors 2 to 5 to open and close.

In this way, the scanning output point COMn outputs four output voltage levels V0, V1, V5, as shown in FIG.
VEE is selectively output as a common drive signal COMn.

[0007]

By the way, if the scan driver circuit shown in FIG. 3 is a 100-bit IC chip, for example, 100 output units 1 will be arranged in a row. On the other hand, LCD panels are now available not only in small sizes but also in large sizes such as 640 x 480 dots. The common drive signal COMn in FIG. 3 is a signal that commonly drives each pixel (dot) on the n-th common horizontal scanning line, and this increases the drive capability of the drive IC (in other words, the output This means that it is necessary to reduce the output impedance of the transistors 2 to 5. It is also said that for high image quality, the lower the output impedance is, the better.

In order to lower the output resistance of the scan driver in order to satisfy these conditions, it is necessary to increase the size of the output transistors 2 to 5. However, if the four output transistors 2 to 5 are made equally large, the chip size will increase and this has a significant effect.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a semiconductor integrated circuit device in which increase in chip size can be suppressed by lowering the output resistance of a liquid crystal drive circuit by another means.

0010

Means for Solving the Problems In order to solve the above problems, a semiconductor integrated circuit device according to claim 1 provides the following features: ``A plurality of DC potentials (V0 to V5, VEE, etc.) correspond to each potential, respectively. In a semiconductor integrated circuit device that selectively outputs to a common terminal (such as COMn) via transistors including complementary transistors (such as output transistors 2 to 5), impedance conversion means outputs a potential equal to the potential of the common terminal. shall be connected to the said common terminal,

00
11. In the semiconductor integrated circuit device of claim 2, in the semiconductor integrated circuit device of claim 1, "the output impedance of the impedance conversion means is smaller than the output impedance of the transistor connected to the common terminal."
shall do so, and

In the semiconductor integrated circuit device according to claim 3, in the semiconductor integrated circuit device according to claim 2, ``the impedance converting means connects the gates and sources of two complementary MOSFETs (buffer transistors 10, 11, etc.) in common. , the common gate is connected to the common terminal, and the common source is connected to the output terminal (COMn1
etc.) with a source follower.

[0013]

[Operation] The above four transistors 2 to 5 connected to the conventional scanning output point COMn are set to the minimum size.Instead, an impedance converter 9 such as a source follower is further connected to the conventional output point COMn, and the output point COMn1
By using the 200 kHz as a new scanning output point, the chip size can be reduced and the output impedance of the liquid crystal drive can be lowered.

[0014]

Embodiment Next, an embodiment of the present invention will be described based on FIGS. 1 and 2. FIG. 1 is a circuit diagram showing the main configuration of an embodiment of the present invention, and corresponds to FIG. 3. In FIG. Further, FIG. 2 shows an embodiment of the configuration of the impedance converter shown in FIG.

In FIG. 1, corresponding to FIG. 3, the input terminal IN of the impedance converter 9 is newly connected to the output point COMn of the output transistors 2 to 5, and the output terminal OUT of the impedance converter 9 is connected to the output point COMn of the output transistors 2 to 5. Output point COM
n1, and from this point on, a new common drive signal COMn1 is output in place of the conventional common drive signal. Along with this, the output unit is replaced with a new output unit 1A.

Further, as shown in FIG. 2, the impedance converter 9 has a common source and substrate connected to an output terminal OUT.
It consists of two low output impedance buffer P-channel transistors 10 and buffer N-channel transistors 11 connected to each other, and each transistor 10
, 11 are commonly connected to the input terminal IN, and the drain of the P-channel transistor 10 is connected to the DC power supply VEE on the low potential side, and the drain of the N-channel transistor 11
The drains of the transistors are respectively connected to a high potential side DC power supply VDD, thereby forming a so-called source follower. Therefore, the potential at the input terminal IN is directly output to the output terminal OUT with low output impedance.

With this configuration, it is possible to minimize the size of the output transistors 2, 3, 4, and 5. Further, in the impedance converter 9, only two transistors 10 and 11 are required to have a low output impedance (and therefore a large size), and impedance conversion can be performed with high area efficiency of the IC chip. Note that it is of course possible to use other configurations (for example, an operational amplifier, etc.) for the impedance converter 9.

[0018]

Effect of the invention: According to the present invention, a plurality of DC potentials V0 to V5
, VEE respectively correspond to these potentials and are connected to a common terminal CO through output transistors 2 to 5 including complementary ones.
In a semiconductor integrated circuit device selectively outputting to Mn, a source follower consisting of two complementary MOSFETs 10 and 11 as an impedance conversion means 9 that outputs a potential equal to the potential of the common terminal COMn at low impedance is connected to the common terminal COMn. As a result, the low output impedance of the liquid crystal drive circuit can be achieved with a small area of the IC chip compared to the case where all four output transistors 2 to 5 for each scanning output point COMn are made large. It becomes possible to realize this.

[Brief explanation of the drawing]

[Fig. 1] A circuit diagram showing the main part configuration as an embodiment of the present invention.

[FIG. 2] A circuit diagram showing a configuration as an example of the impedance converter in FIG. 1.

[Figure 3] Conventional circuit diagram corresponding to Figure 1

[Figure 4] Diagram showing waveform examples of various signals in Figures 1 and 3

[Explanation of symbols]

1A Output unit 2 P-channel transistor for output 3 P-channel transistor for output 4 N-channel transistor for output 5 N-channel transistor for output 6 Decoder 7 Level shifter 8 Shift register 9 Impedance converter 10 P-channel transistor for buffer 11
N-channel transistor for buffer VDD
DC power supply for liquid crystal drive V0 DC power supply for liquid crystal drive V1 DC power supply for liquid crystal drive V5 DC power supply for liquid crystal drive VEE DC power supply for liquid crystal drive DF AC conversion signal Qn Selection data

Claims (3)

[Claims] 1. A semiconductor integrated circuit device which selectively outputs a plurality of direct current potentials to a common terminal through transistors corresponding to each potential and including complementary ones, wherein a potential equal to the potential of the common terminal is output. A semiconductor integrated circuit device, characterized in that an output impedance conversion means is connected to the common terminal. 2. The semiconductor integrated circuit device according to claim 1, wherein the output impedance of the impedance conversion means is smaller than the output impedance of the transistor connected to the common terminal. 3. The semiconductor integrated circuit device according to claim 2, wherein the impedance conversion means includes two complementary MOSFETs.
A semiconductor integrated circuit device comprising a source follower in which gates and sources of SFETs are connected in common, the common gate is connected to the common terminal, and the common source is used as an output terminal.