JPH0422034B2 - - Google Patents

Info

Publication number
JPH0422034B2
JPH0422034B2 JP16779883A JP16779883A JPH0422034B2 JP H0422034 B2 JPH0422034 B2 JP H0422034B2 JP 16779883 A JP16779883 A JP 16779883A JP 16779883 A JP16779883 A JP 16779883A JP H0422034 B2 JPH0422034 B2 JP H0422034B2
Authority
JP
Japan
Prior art keywords
layer
semiconductor
groove
bistable
active layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16779883A
Other languages
Japanese (ja)
Other versions
JPS6058696A (en
Inventor
Juichi Odagiri
Isao Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP16779883A priority Critical patent/JPS6058696A/en
Publication of JPS6058696A publication Critical patent/JPS6058696A/en
Publication of JPH0422034B2 publication Critical patent/JPH0422034B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/06Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/062Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying the potential of the electrodes
    • H01S5/0625Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying the potential of the electrodes in multi-section lasers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching
    • H01S5/2277Buried mesa structure ; Striped active layer mesa created by etching double channel planar buried heterostructure [DCPBH] laser

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 この発明は、光交換・光情報処理に用いる光機
能素子として最も重要な構成要素の一つである双
安定動作を示す双安定半導体レーザに関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a bistable semiconductor laser exhibiting bistable operation, which is one of the most important components as an optical functional element used for optical exchange and optical information processing.

光機能素子の中でも光論理、光スイツチ、光記
憶、光増幅、光信号波形の整形等幅広い応用範囲
を有する双安定素子は、光の本質的な特徴を活か
した素子として期待されており、各所でその基礎
検討が進められている。
Among optical functional devices, bistable devices have a wide range of applications such as optical logic, optical switches, optical storage, optical amplification, and shaping of optical signal waveforms, and are expected to be used as devices that take advantage of the essential characteristics of light. Fundamental studies are currently underway.

双安定素子としては電気光学結晶や液晶等各種
の材料でその動作が確認されているが、特に半導
体材料を用いたものがその高速性、集積化の可能
性を最も良く活かせるものとして注目されてい
る。これについては、例えばラツシヤー氏(G.J.
LASHER)によりソリツド・ステイト・エレク
トロニクス(SOLID・STATE・
ELECTRONICS)誌の1964年第7巻707頁に記
載された論文で半導体レーザにおける双安定動作
の可能性が理論的に推定され、後年室温の状態で
発振閾値が低く実用レベルに近いものがロー氏
(K.Y.LAU)等によりアプライド・フイジクス・
レターズ(APPLIED PHYSICS LETTERS)
誌の1982年第40巻369頁に記載された論文でタン
デム型埋め込みヘテロ構造の双安定半導体レーザ
が報告されている。この半導体レーザでは活性層
に近い側の電極が溝により2分されており、活性
層での梨得が損失を上廻る光増幅領域と、電流注
入されないために損失が利得を上廻る可飽和吸収
領域とにわかれている。溝は単に光増幅領域と可
飽和吸収領域を分けるだけのものである。この半
導体レーザでは2分された電極を共通にすると通
常の半導体レーザの電流−光出力特性を示し従つ
て双安定特性は生じない。双安定特性を得るため
には可飽和吸収領域への注入電流を減少させてい
き、−100μA程度(この場合光増幅領域へは
300mA程度の注入電流)にする必要がある。こ
のことは可飽和吸収領域があたかもフオトダイオ
ードのような振舞をするものと考えられる。しか
しながら可飽和吸収領域への注入電流が数μA変
動すると、電流−光出力特性でのヒステリシスの
形状、双安定動作を示す電流幅は大幅に変わつて
しまう。そのためこの双安定動作を光機能素子で
利用するには、注入電流の制御性を極めて高める
必要があつた。この対策としては本願の発明者等
が昭和58年度電子通信学会総合全国大会に発表
し、同大会講演論文集分冊4第937、第23頁に記
載されたタンデム電極構造デイーシー・ビービー
エイチ(DC−PBH)半導体レーザがある。この
双安定半導体レーザでは、溝は単に電極間を分離
するだけではなく、溝直下への注入電流の廻り込
みが抑えられた電流非注入領域として働いてい
る。そのため2分割された電極を共通にしても溝
の存在により双安定動作が電流−光出力特性で観
測される。また分離された電極への注入電流の組
合せにより電流−光出力特性でのヒステリシスの
形状、双安定動作を示す電流−光出力特性でのヒ
ステリシスの形状、双安定動作を示す電流幅を所
望の大きさに制御でき、さらに注入電流の制御性
も0.5mA程度の変動幅でよい。しかしながらこの
ような特性を有する双安定半導体レーザの歩留ま
りはかならずしも良いとは言えず、その原因が溝
を形成するさいのエツチング深さにあることが最
近の実験結果で明らかとなつた。エツチングが不
十分の場合は従来例で示したロー氏等の特性と殆
んど差がなく、エツチングが過剰となつて活性層
まで達してしまうとレーザ発振しなくなつてしま
う。そのため歩留りを上げるにはエツチングによ
る溝の形成をある適切な深さで止める必要があつ
た。
The operation of bistable devices has been confirmed using various materials such as electro-optic crystals and liquid crystals, but devices using semiconductor materials are attracting particular attention as they can best take advantage of their high speed and integration potential. ing. Regarding this, for example, Mr. Lassiar (GJ
SOLID STATE ELECTRONICS (SOLID・STATE・
The possibility of bistable operation in semiconductor lasers was theoretically estimated in a paper published in 1964, Vol. Mr. (KYLAU) et al. applied physics
APPLIED PHYSICS LETTERS
A tandem-type buried heterostructure bistable semiconductor laser was reported in a paper published in 1982, Vol. 40, p. 369 of the Japanese Journal. In this semiconductor laser, the electrode near the active layer is divided into two parts by a groove: an optical amplification region where the gain exceeds the loss in the active layer, and a saturable absorption region where the loss exceeds the gain because no current is injected. It is divided into two areas. The groove merely separates the optical amplification region from the saturable absorption region. In this semiconductor laser, when the two electrodes are made common, the current-optical output characteristics of a normal semiconductor laser are exhibited, and therefore no bistable characteristic occurs. In order to obtain bistable characteristics, the current injected into the saturable absorption region is reduced to around -100 μA (in this case, the current injected into the optical amplification region is
The injection current must be approximately 300mA). This is considered to mean that the saturable absorption region behaves like a photodiode. However, if the current injected into the saturable absorption region fluctuates by several microamperes, the shape of hysteresis in the current-optical output characteristic and the current width indicating bistable operation will change significantly. Therefore, in order to utilize this bistable operation in optical functional devices, it was necessary to extremely improve the controllability of the injection current. As a countermeasure to this problem, the inventors of the present invention presented the 1985 National Conference of the Institute of Electronics and Communication Engineers, and the tandem electrode structure DC-BBH (DC- PBH) There is a semiconductor laser. In this bistable semiconductor laser, the groove not only separates the electrodes, but also serves as a current non-injection region where the injection current is prevented from going around directly under the groove. Therefore, even if the two divided electrodes are shared, bistable operation is observed in the current-light output characteristics due to the presence of the groove. In addition, by combining the currents injected into the separated electrodes, the shape of hysteresis in the current-optical output characteristic, the shape of the hysteresis in the current-optical output characteristic that shows bistable operation, and the current width that shows bistable operation can be adjusted to a desired size. Furthermore, the injection current can be controlled within a fluctuation range of about 0.5 mA. However, the yield of bistable semiconductor lasers having such characteristics is not necessarily good, and recent experimental results have revealed that the cause of this is the etching depth when forming the grooves. If the etching is insufficient, there is almost no difference from the characteristics shown by Low et al. in the conventional example, and if the etching becomes excessive and reaches the active layer, laser oscillation will no longer occur. Therefore, in order to increase the yield, it was necessary to stop the formation of grooves by etching at a certain appropriate depth.

この発明の目的は双安定動作の歩留りを向上さ
せて均一な特性を有する双安定半導体レーザを提
供することにある。
An object of the present invention is to improve the yield of bistable operation and provide a bistable semiconductor laser having uniform characteristics.

この発明によれば、活性層にまで達する2本の
ほぼ平行な第1、第2の溝で形成した活性層を含
むメサストライプを少なくとも前記メサストライ
プを少なくとも前記メサストライプの上部の半導
体層とは異なる導電型の半導体層で埋め込んだ半
導体レーザにおいて、活性層直上の半導体クラツ
ド層の上層部に同じ導電型で且つ材料組成の異な
る半導体エツチングストツプ層を積層し、さらに
活性層に近い側の電極を共振器軸方向に2つ以上
に分割する第3の溝が半導体エツチングストツプ
層の手前までエツチングされていることを特徴と
する双安定半導体レーザが得られる。
According to this invention, at least the mesa stripe including the active layer formed by two substantially parallel first and second grooves reaching the active layer is separated from at least the semiconductor layer above the mesa stripe. In a semiconductor laser embedded with semiconductor layers of different conductivity types, a semiconductor etching stop layer of the same conductivity type but with a different material composition is laminated on the upper layer of the semiconductor cladding layer directly above the active layer, and an electrode near the active layer is laminated. A bistable semiconductor laser is obtained, characterized in that a third groove dividing the semiconductor layer into two or more in the direction of the cavity axis is etched up to just before the semiconductor etching stop layer.

この発明では、共振器軸方向に分割された2つ
以上の電極を持つ半導体レーザにおいて、双安定
動作に重要な溝の形成すなわち溝の幅と深さを再
現性よく所望の大きさにすることにある。このう
ち溝の幅は現在通常のフオトリソグラフイツク技
術により±1μmの精度で形成可能である。ところ
が溝の深さに関しては結晶成長後のウエハ毎に、
また同一ウエハ内でも場所毎のばらつきにより活
性層から電極までの深さに再現性がやゝ乏しい。
これを改善するには活性層から電極までの間に周
囲の半導体層とは材料組成の異なる半導体エツチ
ングストツプ層を設けて、第3の溝の形成の際
に、半導体エツチングストツプ層の手前までの半
導体層を完全に除いてしまえばよい。このような
処理を行なえば溝から活性層までの深さはほぼ一
定となり、特性上のばらつきを少なくすることが
できる。活性層から溝までの深さが1μm以下とな
るため、電極から電流非注入領域である溝直下の
活性層への漏れ電流は大幅に減少し双安定動作の
再現性はほぼ溝の大きさで決まる。溝幅の制御は
容易なので、均一な特性を有する双安定半導体レ
ーザが高歩留りで得られる。
In this invention, in a semiconductor laser having two or more electrodes divided in the direction of the cavity axis, it is possible to form a groove, which is important for bistable operation, or to make the width and depth of the groove to a desired size with good reproducibility. It is in. The width of the groove can currently be formed with an accuracy of ±1 μm using conventional photolithography technology. However, the depth of the groove varies from wafer to wafer after crystal growth.
Furthermore, even within the same wafer, the reproducibility of the depth from the active layer to the electrodes is somewhat poor due to variations from location to location.
To improve this, a semiconductor etching stop layer with a material composition different from that of the surrounding semiconductor layer is provided between the active layer and the electrode, and when forming the third groove, the semiconductor etching stop layer is etched before the semiconductor etching stop layer. It is sufficient to completely remove the semiconductor layers up to that point. If such processing is performed, the depth from the groove to the active layer will be approximately constant, and variations in characteristics can be reduced. Since the depth from the active layer to the groove is less than 1 μm, the leakage current from the electrode to the active layer directly under the groove, which is the non-current injection region, is significantly reduced, and the reproducibility of bistable operation is almost the same as the groove size. It's decided. Since the groove width can be easily controlled, bistable semiconductor lasers with uniform characteristics can be obtained with high yield.

以下図面を参照して本発明を詳細に説明する。
第1図はこの発明の第1の実施例である双安定半
導体レーザの斜視図をあらわす。プレーナ型の埋
め込みヘテロ構造の半導体レーザは、活性層を含
むメサストライプをp及びn型の半導体層で埋め
込んだもので、これについては、北村氏等により
出願中の発明、特願昭56−166666に詳しい。第1
の実施例は以下のようにして製作される。先づ液
相もしくは気相成長法により、n−InP基板10
上に、n−InPバツフア層11、ノンドープの
InGaAsP活性層12、P−InPクラツド層13を
積層させたDH基板に、フオトレジストを塗布し
て通常のフオトリソグラフイツク技術により第
1、第2の溝14,15をもつウエハを製作す
る。次にこのウエハを液相成長技術により、p−
InPの第1の電流ブロツク層16、n−InPの第
2の電流ブロツク層17を順次形成させる。この
場合メサストライプ18の幅が通常1〜2μmと狭
いため、メサストライプ18上には第1、第2の
電流ブロツク層16,17は成長しない、第2の
電流ブロツク層17の成長後は、第1、第2の溝
14,15が完全に埋め終りメサストライプ18
上部周辺はほぼ平坦な凹地となる。次にエツチン
グによる第3溝18の深さの制御に重要なp−
InGaAsPエツチングストツプ層19、続いてp
−InP埋め込み層20、p−InGaAsPキヤツプ層
21を形成させる。結晶成長後p側のオーミツク
コンタクトをとるためキヤツプ層上にAuZnを蒸
着する。さらにフオトレジストを塗布して通常の
フオトリソグラフイツク技術とエツチングによ
り、p側電極22を共振器軸方向に2分割される
ように第3の溝30を形成させる。この場合
AuZnはKI+I3の混合液により除去され、キヤツ
プ層21は硫酸+過酸化水素系のエツチング液で
除去され、さらに埋め込み層20は硝酸系のエツ
チング液で除去される。硝酸系のエツチング液で
はInPはエツチングされるがInGaAsPがエツチン
グされないため、p−InGaAsPエツチングスト
ツプ層が表面にでるところでエツチングが停止し
第3の溝30が形成される。次いでAuZnをアロ
イする。次にn−InP基板10を研磨して120μm
程度の厚さとしたのち、n側のオーミツクコンタ
クト用にAu−Ge−Niを蒸着し、アロイしてウエ
ハ製作を終了する。このウエハ通常の劈開法によ
り、第3の溝30によつてp側電極22が分割さ
れるようにメサストライプ18に直角に共振器を
形成して素子が製作される。この素子の2分され
たp側電極22を正、n側電極23を負としてバ
イアスすると、この素子は電流入力あるいは光入
力に対して安定な2準位をもつ双安定半導体レー
ザとして働く。これは次の理由による。この双安
定半導体レーザでは第3の溝30が電流非注入領
域となるため、第3の溝30直下の部分は可飽和
吸収領域と考えられる。可飽和吸収領域とはフオ
トン密度あるいはキヤリア密度が十分小さいとき
にはある有限の大きさを持つ損失として働き、あ
る程度大きくなると非線形的に損失が零となる性
質を有するものである。この双安定半導体レーザ
は埋め込みヘテロ構造であるため、室温で容易に
低い動作電流で働かせることができる。また第3
の溝30が可飽和吸収領域であるから、2分割さ
れたp側電極22への注入電流を適切に組合わせ
て、可飽和吸収領域の大きさを変えることにより
双安定動作の幅例えば電流幅を変化させることが
できる。第1の実施例では2分割されたp側電極
22への注入電流が等しい場合に発振開始の閾値
が室温で40mAであり、このときの双安定動作を
示す電流幅は10mAであつた。またp側電極22
への注入電流を組合わせて、双安定動作を示す電
流幅を1〜30mAの範囲で変化させることができ
た。これらの特性は第3の溝30から活性層12
までの深さが各素子とも同程度になるよう改善さ
れたため、従来のようなばらつきのある特性では
なく比較的特性のそろつたものが得られるように
なつた。この実施例の双安定半導体レーザの大き
さはメサストライプ幅1.5μm2つのp側電極22
の長さは各々100μm、150μm、第3の溝30の幅
は25μmである。結晶成長の様子は、成長方法や
成長条件等により大幅に変わるので、それらとと
もに適切な寸法を採用すべきことは言うまでもな
い。
The present invention will be described in detail below with reference to the drawings.
FIG. 1 shows a perspective view of a bistable semiconductor laser which is a first embodiment of the present invention. A planar type buried heterostructure semiconductor laser is one in which a mesa stripe including an active layer is buried with p and n type semiconductor layers. I am familiar with 1st
The embodiment is fabricated as follows. First, an n-InP substrate 10 is grown by liquid phase or vapor phase growth method.
On top, an n-InP buffer layer 11 and a non-doped
A photoresist is applied to a DH substrate on which an InGaAsP active layer 12 and a P-InP cladding layer 13 are laminated, and a wafer having first and second grooves 14 and 15 is manufactured by ordinary photolithography technology. Next, this wafer is grown using liquid phase growth technology.
A first current blocking layer 16 of InP and a second current blocking layer 17 of n-InP are sequentially formed. In this case, since the width of the mesa stripe 18 is usually narrow, 1 to 2 μm, the first and second current blocking layers 16 and 17 are not grown on the mesa stripe 18. After the second current blocking layer 17 is grown, The first and second grooves 14 and 15 are completely filled and the mesa stripe 18
The area around the top is a depression that is almost flat. Next, p- which is important for controlling the depth of the third groove 18 by etching.
InGaAsP etch stop layer 19 followed by p
-InP buried layer 20 and p-InGaAsP cap layer 21 are formed. After crystal growth, AuZn is deposited on the cap layer to establish ohmic contact on the p side. Further, a photoresist is applied and a third groove 30 is formed by ordinary photolithography and etching so as to divide the p-side electrode 22 into two in the direction of the resonator axis. in this case
AuZn is removed with a mixed solution of KI+I 3 , the cap layer 21 is removed with a sulfuric acid+hydrogen peroxide based etching solution, and the buried layer 20 is further removed with a nitric acid based etching solution. Since the nitric acid-based etching solution etches InP but not InGaAsP, etching stops when the p-InGaAsP etching stop layer appears on the surface, and the third groove 30 is formed. Next, AuZn is alloyed. Next, polish the n-InP substrate 10 to 120 μm.
After achieving a certain thickness, Au-Ge-Ni is vapor-deposited for the n-side ohmic contact and alloyed to complete the wafer fabrication. By using this wafer conventional cleavage method, a device is manufactured by forming a resonator at right angles to the mesa stripe 18 so that the p-side electrode 22 is divided by the third groove 30. When this element is biased with the p-side electrode 22 divided into two parts as positive and the n-side electrode 23 as negative, this element functions as a bistable semiconductor laser having two levels that are stable with respect to current input or optical input. This is due to the following reason. In this bistable semiconductor laser, the third groove 30 serves as a current non-injection region, so the portion directly below the third groove 30 is considered to be a saturable absorption region. The saturable absorption region has the property that when the photon density or carrier density is sufficiently small, it acts as a loss having a certain finite magnitude, and when it becomes large to a certain extent, the loss nonlinearly becomes zero. Because this bistable semiconductor laser is a buried heterostructure, it can easily be operated at room temperature and with low operating currents. Also the third
Since the groove 30 is a saturable absorption region, by appropriately combining the currents injected into the p-side electrode 22 divided into two and changing the size of the saturable absorption region, the width of the bistable operation, for example, the current width can be adjusted. can be changed. In the first embodiment, when the currents injected into the two divided p-side electrodes 22 are equal, the threshold for starting oscillation is 40 mA at room temperature, and the current width indicating bistable operation at this time is 10 mA. In addition, the p-side electrode 22
By combining the injection currents, the current width exhibiting bistable operation could be varied in the range of 1 to 30 mA. These characteristics apply from the third groove 30 to the active layer 12.
Since the depth has been improved so that each element has the same depth, it is now possible to obtain relatively uniform characteristics instead of the uneven characteristics as in the past. The size of the bistable semiconductor laser in this example is two p-side electrodes 22 with a mesa stripe width of 1.5 μm.
The lengths of the grooves are 100 μm and 150 μm, respectively, and the width of the third groove 30 is 25 μm. Since the appearance of crystal growth varies greatly depending on the growth method, growth conditions, etc., it goes without saying that appropriate dimensions should be adopted in conjunction with these factors.

次に第2図はこの発明の第2の実施例である双
安定半導体レーザの断面図をあらわす。この第2
の実施例では、第1の実施例で形成させたp−
InGaAsPエツチングストツプ層19の成長順序
をn−InP電流ブロツク層17の後に行なう代わ
りに、DH結晶を形成させる最終工程であるp−
InPクラツド層13の成長に引続いて行なう。そ
のため第1、第2の溝14,15を形成するとき
にエツチングストツプ層19は第2図で示すよう
に除かれる。その他の工程は第1の実施例と同じ
である。この実施例においても、第1の実施例と
同様、双安定動作の歩留りを向上させて均一な特
性が得られた。
Next, FIG. 2 shows a sectional view of a bistable semiconductor laser which is a second embodiment of the present invention. This second
In this example, the p-
Instead of growing the InGaAsP etch stop layer 19 after the n-InP current blocking layer 17, the final step of forming the DH crystal is the p-InP current blocking layer 17.
This is performed subsequent to the growth of the InP cladding layer 13. Therefore, when forming the first and second grooves 14 and 15, the etching stop layer 19 is removed as shown in FIG. Other steps are the same as in the first embodiment. In this example as well, as in the first example, the yield of bistable operation was improved and uniform characteristics were obtained.

なお上記実施例ではp側電極をAuZnの全面電
極構造としたが、2つのp側電極22間抵抗を大
きくするためオキサイドストライブ構造にしたり
あるいはp−InGaAsPキヤツプ層21の代りに
n−InGaAsPキヤツプ層を成長させてメサスト
ライプ18の上面付近にのみ例えばZn拡散する
ことによりP層に変換させてもよい。また以上の
実施例ではInP/InGaAsP系の半導体材料を用い
たが、GaAlAs/GaAs系等他の半導体材料を用
いてもよい。また以上の実施例では第3の溝30
でp側電極を2分割したが、第3の溝30に相当
するような溝を2つ以上作つてp側電極を3つ以
上に分割させて双安定さらには多安定(マルチス
テーブル)な特性を持つようにしてもよい。
In the above embodiment, the p-side electrode has a full-surface electrode structure of AuZn, but in order to increase the resistance between the two p-side electrodes 22, an oxide strip structure may be used, or an n-InGaAsP cap layer may be used instead of the p-InGaAsP cap layer 21. The layer may be grown and converted into a P layer by, for example, Zn diffusion only near the top surface of the mesa stripe 18. Furthermore, although InP/InGaAsP-based semiconductor materials were used in the above embodiments, other semiconductor materials such as GaAlAs/GaAs-based materials may also be used. Further, in the above embodiment, the third groove 30
The p-side electrode was divided into two parts in the above, but by creating two or more grooves corresponding to the third groove 30 and dividing the p-side electrode into three or more parts, it is possible to make the p-side electrode bistable or even multistable. It may also have characteristics.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第1の実施例の斜視図、第2
図は第2の実施例の断面図を示す図である。 なお図において、10……n−InP基板、11
……p−InPクラツド層、12……InGaAsP活性
層、13……p−InPクラツド層、14……第1
の溝、15……第2の溝、16……p−InP第1
の電流ブロツク層、17……n−InP第2の電流
ブロツク層、18……メサストライプ、19……
p−InGaAsPエツチングストツプ層、20……
p−InP埋め込み層、21……p−InGaAsPキヤ
ツプ層、22……p側電極、23……n側電極、
30……第3の溝、をそれぞれあらわす。
FIG. 1 is a perspective view of the first embodiment of the present invention;
The figure is a diagram showing a cross-sectional view of the second embodiment. In the figure, 10... n-InP substrate, 11
... p-InP cladding layer, 12 ... InGaAsP active layer, 13 ... p-InP cladding layer, 14 ... first
groove, 15...second groove, 16...p-InP first
current blocking layer, 17... n-InP second current blocking layer, 18... mesa stripe, 19...
p-InGaAsP etching stop layer, 20...
p-InP buried layer, 21... p-InGaAsP cap layer, 22... p-side electrode, 23... n-side electrode,
30...represents the third groove, respectively.

Claims (1)

【特許請求の範囲】[Claims] 1 活性層にまで達する2本のほぼ平行な第1、
第2の溝で挾まれた前記活性層を含む多層構造の
メサストライプを少なくとも前記メサストライプ
の上部の半導体層とは異なる導電型の半導体層で
埋め込んだ半導体レーザにおいて、活性層直上の
半導体クラツド層の上層部に同じ導電型で且つ材
料組成の異なる半導体エツチングストツプ層を積
層し、さらに活性層に近い側の電極を共振器軸方
向に2つ以上に分割する第3の溝が半導体エツチ
ングストツプ層の手前までエツチングされている
ことを特徴とする双安定半導体レーザ。
1. Two almost parallel first wires that reach the active layer,
In a semiconductor laser in which a multilayered mesa stripe including the active layer sandwiched between second grooves is embedded with at least a semiconductor layer of a conductivity type different from the semiconductor layer above the mesa stripe, a semiconductor cladding layer directly above the active layer is provided. A semiconductor etching stop layer of the same conductivity type but different material composition is laminated on the upper layer, and a third groove is formed to divide the electrode near the active layer into two or more in the resonator axis direction. A bistable semiconductor laser characterized by being etched to the front of the top layer.
JP16779883A 1983-09-12 1983-09-12 Bi-stable semiconductor laser Granted JPS6058696A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16779883A JPS6058696A (en) 1983-09-12 1983-09-12 Bi-stable semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16779883A JPS6058696A (en) 1983-09-12 1983-09-12 Bi-stable semiconductor laser

Publications (2)

Publication Number Publication Date
JPS6058696A JPS6058696A (en) 1985-04-04
JPH0422034B2 true JPH0422034B2 (en) 1992-04-15

Family

ID=15856300

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16779883A Granted JPS6058696A (en) 1983-09-12 1983-09-12 Bi-stable semiconductor laser

Country Status (1)

Country Link
JP (1) JPS6058696A (en)

Also Published As

Publication number Publication date
JPS6058696A (en) 1985-04-04

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