JPH04215414A - Manufacture of laminated ceramic electronic part - Google Patents

Manufacture of laminated ceramic electronic part

Info

Publication number
JPH04215414A
JPH04215414A JP41067790A JP41067790A JPH04215414A JP H04215414 A JPH04215414 A JP H04215414A JP 41067790 A JP41067790 A JP 41067790A JP 41067790 A JP41067790 A JP 41067790A JP H04215414 A JPH04215414 A JP H04215414A
Authority
JP
Japan
Prior art keywords
green sheet
printed
base film
pattern
patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP41067790A
Other languages
Japanese (ja)
Inventor
Kenichi Hoshi
健一 星
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP41067790A priority Critical patent/JPH04215414A/en
Publication of JPH04215414A publication Critical patent/JPH04215414A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1258Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by using a substrate provided with a shape pattern, e.g. grooves, banks, resist pattern

Landscapes

  • Ceramic Capacitors (AREA)
  • Manufacturing Cores, Coils, And Magnets (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To obtain formations having a uniform forming density by forming recessions beforehand at parts of a green sheet where patterns are to be printed, in order to prevent stepped parts from being produced between the green sheet and patterns after the drying of the green sheet, and by printing the patterns on these recessions. CONSTITUTION:A slurry 13 composed of ferrite powder and an organic vehicle is painted on a base film 11 by a doctor blade method. Next, through holes 2 for the connection between layers are cut at specified positions of a green sheet 1 exfoliated from the drying-processed base film 11. And, paste for conductor patterns 3 is printed by using a screen printer on the recessions of the green sheet 1 formed by the protrusions 12 of the base film. Chiplike formations are obtained by laminating a printed green sheet segment and an unprinted green sheet and attaching to each other with pressure, and by cutting. After the chiplike formations are baked following that, external electrode paste is applied and baked, and Ni plating and solder plating are performed.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は積層セラミック電子部品
の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing multilayer ceramic electronic components.

【0002】0002

【従来の技術】積層セラミック電子部品としては、積層
チップインダクタ、積層セラミックコンデンサ、LCチ
ップ部品あるいはLCRチップ部品等があり、これらの
製造方法は、製造工程の手順の概要を示した図3の斜視
図を参照して説明すると、以下の通りである。
[Prior Art] Multilayer ceramic electronic components include multilayer chip inductors, multilayer ceramic capacitors, LC chip components, LCR chip components, etc., and their manufacturing methods are shown in perspective view in FIG. 3, which shows an overview of the steps of the manufacturing process. The explanation will be as follows with reference to the drawings.

【0003】すなわち、誘電体セラミックグリーンシー
トもしくはフェライトグリーンシートを適当な大きさに
切断したグリーンシート片1の所定の位置にスルーホー
ル2を開けた後、グリーンシートの所定位置に例えばA
gを主体とする導体ペーストで内部電極用またはコイル
用の導体パターン3を印刷し(同図(a)および同図(
f)に示す積層分解図参照)、これらを積層して圧着し
積層体4とした後(同図(b)参照)、圧着した積層体
を裁断して各チップ5に分離する(同図(c)参照)。 なお同図(f)の分解図には上記積層体裁断後の各チッ
プ上に形成される導体パターンを例示した。
That is, after drilling a through hole 2 at a predetermined position in a green sheet piece 1 obtained by cutting a dielectric ceramic green sheet or a ferrite green sheet into an appropriate size, a through hole 2 is formed at a predetermined position of the green sheet.
A conductor pattern 3 for internal electrodes or coils is printed using a conductor paste mainly composed of g (Fig.
(See the exploded view of stacking shown in Figure f)), these are laminated and crimped to form a laminate 4 (see Figure (b)), and then the crimped laminate is cut and separated into each chip 5 (see Figure (b)). c). The exploded view in FIG. 2(f) illustrates the conductor pattern formed on each chip after cutting the laminate.

【0004】次いで、これらチップを焼成して焼成体6
となし(同図(d)参照)、素体端部に接続端子用の外
部電極7を焼付形成し、必要により外部電極にメッキを
施してチップ部品を完成させる(同図(e)参照)。
Next, these chips are fired to form a fired body 6.
(see figure (d)), external electrodes 7 for connection terminals are formed by baking on the ends of the element body, and if necessary, the external electrodes are plated to complete the chip component (see figure (e)). .

【0005】このようにして作製されるいずれの部品に
おいても圧着工程があり、圧着工程では電極が印刷され
ている部分が互いに重なり合い、また電極が印刷されて
いない部分が重なり合うような位置関係で圧着されてい
る。
[0005] All parts produced in this way include a crimping process, and in the crimping process, the parts where electrodes are printed overlap each other, and the parts where electrodes are not printed overlap each other. has been done.

【0006】[0006]

【発明が解決しようとする課題】従来の製造方法では、
図4(a)〜(c)に示すように、グリーンシート片1
上に形成された内部電極用導体パターン3が同図(b)
に見られるように特定の位置すなわち2点鎖線で囲んで
示した位置に集中するため、積層圧着の時に、その部分
のグリーンシートの成形密度が他の部分より大きくなっ
た領域8が生じる。このような積層成形体から得られる
チップ5の素体を焼成すると焼成時の収縮のバランスが
悪化し、導体パターン3の付近にクラック9が発生した
り、応力10(同図(c)の矢印で示す)が残ったりす
る。クラックはインダクタ等の電子部品の信頼性(ヒー
トサイクルや耐熱性、曲げ強度など)を悪化させ、応力
は例えばインダクタのインダクタンスやQを低下させる
ことになる。
[Problem to be solved by the invention] In the conventional manufacturing method,
As shown in FIGS. 4(a) to 4(c), green sheet piece 1
The internal electrode conductor pattern 3 formed on the top is shown in FIG.
As can be seen in the figure, since the green sheets are concentrated in a specific position, that is, the position shown surrounded by the two-dot chain line, during lamination pressure bonding, a region 8 is created in which the molding density of the green sheet is higher in that part than in other parts. When the element body of the chip 5 obtained from such a laminated molded body is fired, the balance of shrinkage during firing deteriorates, and cracks 9 occur near the conductor pattern 3, and stress 10 (arrow in the figure (c)) ) may remain. Cracks deteriorate the reliability (heat cycle, heat resistance, bending strength, etc.) of electronic components such as inductors, and stress reduces, for example, the inductance and Q of the inductor.

【0007】そこで、本発明の目的は、従来の製造方法
の圧着工程によってもたらされる積層成形体に発生する
上記成形密度の大きい領域が形成されず、したがって信
頼性の高い積層セラミック電子部品の製造方法を提供す
ることにある。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a highly reliable manufacturing method for laminated ceramic electronic components in which the above-mentioned areas of high compaction density that occur in the laminated molded product produced by the compression bonding process of conventional manufacturing methods are not formed. Our goal is to provide the following.

【0008】[0008]

【課題を解決するための手段】そこで本発明者は、上記
目的を達成すべく研究の結果、内部電極部分が形成され
るセラミックグリーンシートに凹部を形成しておき、そ
こに導電ペーストを塗布するようにすれば、グリーンシ
ート圧着時の圧着のかかり具合を均一にすることが可能
となり、前述の電子部品における信頼性に影響を与えて
いた因子を排除できることを見出し本発明に到達した。
[Means for Solving the Problems] Therefore, in order to achieve the above object, the inventor of the present invention, as a result of research, formed recesses in a ceramic green sheet on which internal electrode portions are formed, and applied a conductive paste to the recesses. The inventors have discovered that by doing so, it is possible to make the degree of crimping uniform when crimping the green sheet, and that the factors that affect the reliability of electronic components mentioned above can be eliminated, and the present invention has been achieved.

【0009】したがって本発明は、誘電体セラミックグ
リーンシートもしくはフェライト磁性体グリーンシート
上に導電ペーストで導体パターンあるいはコイルパター
ンを印刷し、これらを積層、圧着して成形体とした後、
チップ形状に裁断し、得られた成形体を乾燥、焼成して
チップ素子とし、その端部に接続用端子電極を形成する
ことからなる積層セラミック電子部品の製造方法におい
て、グリーンシート乾燥後のグリーンシートと上記パタ
ーンとの段差を無くすように、グリーンシートの上記パ
ターンを印刷する部分には予め凹部を形成しておき、こ
の凹部に該パターンを印刷することを特徴とする積層セ
ラミック電子部品の製造方法を提供するものである。
Therefore, in the present invention, a conductive pattern or a coil pattern is printed using a conductive paste on a dielectric ceramic green sheet or a ferrite magnetic green sheet, and after these are laminated and pressed to form a molded body,
In a method for manufacturing multilayer ceramic electronic components, which involves cutting the green sheet into chip shapes, drying and firing the obtained molded body to form a chip element, and forming connection terminal electrodes on the ends of the chip element, the green sheet after drying is Manufacturing of a multilayer ceramic electronic component characterized in that a recess is formed in advance in the part of the green sheet where the pattern is printed, and the pattern is printed in the recess so as to eliminate the difference in level between the sheet and the pattern. The present invention provides a method.

【0010】本発明の方法では、グリーンシートの内部
電極用導体パターンを印刷する部分を予めへこませてそ
のへこみに導体ペーストを印刷し、乾燥後の段差を無く
すようにできる。グリーンシートにこのような凹部を設
けるには、グリーンシート作製時に上記印刷パターンに
あった凸部を有するベースフィルム上にフェライトスラ
リー等を例えばドクターブレード法により塗工すること
によって達成できる。
[0010] In the method of the present invention, the portion of the green sheet where the conductor pattern for internal electrodes is to be printed is indented in advance, and a conductive paste is printed in the indentation, thereby eliminating the level difference after drying. Providing such concave portions in the green sheet can be achieved by applying a ferrite slurry or the like by, for example, a doctor blade method onto a base film having convex portions that match the printing pattern described above during production of the green sheet.

【0011】[0011]

【作用】導体パターンを印刷後のグリーンシートの上面
がほぼ平面になるため、圧着時の圧力の集中がなく、均
一な成形密度を有する成形体が得られ、この成形体は焼
成時の収縮のバランスが良いため、チップ素子における
クラックや応力の発生がない。
[Function] Since the top surface of the green sheet after printing the conductor pattern becomes almost flat, there is no concentration of pressure during crimping, and a molded body with uniform density can be obtained, and this molded body will not shrink during firing. Because of the good balance, there is no occurrence of cracks or stress in the chip element.

【0012】以下実施例により本発明をさらに説明する
The present invention will be further explained below with reference to Examples.

【0013】[0013]

【実施例】まず、図2(a)(断面図)および(b)(
平面図)に示すような塗工用のベースフィルムを用意す
る。このような凸部12を有するベースフィルムを印刷
パターンにあった凹部を持つロールで連続的に圧着をか
けるなどの方法で得られるが、方法は限定しない。
[Example] First, Fig. 2 (a) (cross-sectional view) and (b) (
Prepare a base film for coating as shown in the plan view). The base film having such convex portions 12 can be obtained by a method such as continuous pressure bonding with a roll having concave portions matching the printing pattern, but the method is not limited.

【0014】図1は本発明の方法に従って上記のような
ベースフィルムにドクターブレード法によりスラリーを
塗工し、導電ペーストを印刷する手順を示す断面図であ
って、同図(a)の14はドクターブレード、矢印はベ
ースフィルムの進行方向を示す。  すなわち、ベース
フィルム11上にフェライト粉末と有機ビヒクルからな
るスラリー13をドクターブレード法により塗工する。 フェライト粉末の組成は、Fe2 O3 50モル%、
NiO20モル%、ZnO20モル%、CuO10モル
%からなるものを用い、有機ビヒクルはポリビニルブチ
ラール樹脂とトルエンおよびエタノールからなるものを
用いた。塗工方法はドクターブレード法を用いたが、後
計量系の平坦化コータ(Leveling Coate
r)なら他の方式でもよい。
FIG. 1 is a cross-sectional view showing the procedure of applying a slurry to the base film as described above by a doctor blade method and printing a conductive paste according to the method of the present invention, and 14 in FIG. Doctor blade, arrow indicates the direction of travel of the base film. That is, a slurry 13 made of ferrite powder and an organic vehicle is applied onto the base film 11 by a doctor blade method. The composition of the ferrite powder is Fe2O3 50 mol%,
A material consisting of 20 mol % of NiO, 20 mol % of ZnO, and 10 mol % of CuO was used, and an organic vehicle consisting of polyvinyl butyral resin, toluene, and ethanol was used. The coating method used was the doctor blade method, but a leveling coater with a post-metering system was used.
r), other methods may be used.

【0015】次に、乾燥処理しベースフィルム11から
はがしたグリーンシート1の所定の場所に層間の接続を
行うためのスルーホール2を金型により開けた(同図(
b)および(c)参照)。
[0015] Next, through holes 2 for making connections between layers were made with a mold at predetermined locations in the green sheet 1 which had been dried and peeled off from the base film 11 (see Fig.
b) and (c)).

【0016】ベースフィルムの凸部12によって形成さ
れたグリーンシート1の凹部にスクリーン印刷機を用い
て導体パターン3用のペーストを印刷した(同図(d)
参照)。ペーストはAg粉末とエチルセルロースと溶剤
からなる。
A screen printer was used to print paste for the conductor pattern 3 on the concave portions of the green sheet 1 formed by the convex portions 12 of the base film (FIG. 1(d)).
reference). The paste consists of Ag powder, ethyl cellulose, and a solvent.

【0017】印刷されたグリーンシート片および印刷さ
れていないシートを前記図3により説明した従来の要領
に従って積層し圧着し、切断してチップ状の成形体を得
た。圧着条件は 100℃、250kg/cm2 とし
た。
The printed green sheet pieces and the unprinted sheet were laminated, pressed and cut in accordance with the conventional procedure explained above with reference to FIG. 3 to obtain a chip-shaped molded body. The pressure bonding conditions were 100°C and 250kg/cm2.

【0018】次いでチップ状の成形体を 900℃で1
時間焼成した後、外部電極ペーストを塗布し 800℃
で焼付けた。外部電極ペーストはAgを主成分とするも
のを用い、外部電極にはさらにNiメッキと半田メッキ
を施した。
[0018] Next, the chip-shaped molded body was heated at 900°C for 1
After baking for an hour, apply external electrode paste and heat to 800℃.
Burnt with. The external electrode paste was mainly composed of Ag, and the external electrode was further plated with Ni and solder.

【0019】以上により本発明の方法に基づく積層チッ
プインダクタが得られ、図5(a)、(b)および(c
)に積層分解断面図、積層圧着後のチップ素体断面図お
よび焼成後の断面図を示したが成形体の成形密度は一定
であり、焼成体におけるクラックや応力の発生は見られ
なかった。
As described above, a multilayer chip inductor based on the method of the present invention was obtained, and FIGS. 5(a), (b) and (c)
) shows an exploded cross-sectional view of the lamination, a cross-sectional view of the chip body after lamination and pressure bonding, and a cross-sectional view after firing, and the compacting density of the compact was constant, and no cracks or stress were observed in the fired compact.

【0020】従来の積層チップインダクタと本発明の方
法による積層チップインダクタについて比較試験を行っ
た。結果は下記の表の通りであった。
A comparative test was conducted on a conventional multilayer chip inductor and a multilayer chip inductor produced by the method of the present invention. The results were as shown in the table below.

【0021】[0021]

【0022】[0022]

【発明の効果】以上説明したように、本発明の方法によ
れば印刷後のグリーンシートの上面がほぼ平面になるた
め、チップ素子焼成時の収縮の際、クラックが発生しな
いので製品の信頼性が高く、また印刷パターン周辺に発
生する応力もないので、同じ構造の従来品に比しインダ
クタンスおよびQが高い製品が得られる。
[Effects of the Invention] As explained above, according to the method of the present invention, the top surface of the green sheet after printing becomes almost flat, so that no cracks occur during shrinkage during chip element firing, thereby increasing the reliability of the product. Since the inductance is high and there is no stress generated around the printed pattern, a product with higher inductance and Q can be obtained compared to conventional products with the same structure.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】(a)〜(d)は本発明の一実施例における導
電ペーストをグリーンシートに印刷する手順を示す断面
図である。
FIGS. 1A to 1D are cross-sectional views showing a procedure for printing conductive paste on a green sheet in an embodiment of the present invention.

【図2】本発明の方法に用いられるベースフィルムを示
し、(a)は断面図、(b)は平面図である。
FIG. 2 shows a base film used in the method of the present invention, with (a) being a cross-sectional view and (b) being a plan view.

【図3】(a)〜(f)は従来の積層セラミック電子部
品の製造工程の概要を示す斜視図である。
FIGS. 3(a) to 3(f) are perspective views showing an outline of the manufacturing process of a conventional multilayer ceramic electronic component.

【図4】(a)は従来の製造工程におけるグリーンシー
トの積層分解断面図、(b)は積層圧着後の成形体の断
面図、(c)は焼成後のチップ素子の断面図である。
FIG. 4(a) is an exploded cross-sectional view of green sheets laminated in a conventional manufacturing process, (b) is a cross-sectional view of a molded body after lamination and pressure bonding, and (c) is a cross-sectional view of a chip element after firing.

【図5】(a)は本発明の製造工程におけるグリーンシ
ートの積層分解断面図、(b)は積層圧着後の成形体の
断面図、(c)は焼成後のチップ素子の断面図である。
FIG. 5 (a) is an exploded cross-sectional view of the lamination of the green sheet in the manufacturing process of the present invention, (b) is a cross-sectional view of the molded body after lamination and pressure bonding, and (c) is a cross-sectional view of the chip element after firing. .

【符号の説明】[Explanation of symbols]

1‥‥グリーンシート片 2‥‥スルーホール 3‥‥導体パターン 4‥‥積層体 5‥‥チップ 6‥‥焼成体 7‥‥外部電極 8‥‥成形密度が大きい領域 9‥‥クラック 10‥‥応力 11‥‥ベースフィルム 12‥‥ベースフィルム上の凸部 13‥‥スラリー 14‥‥ドクターブレード 1. Green sheet piece 2.Through hole 3. Conductor pattern 4. Laminated body 5. Chip 6. Fired body 7. External electrode 8. Area with high molding density 9. Crack 10... Stress 11‥‥Base film 12.Protrusions on the base film 13. Slurry 14‥‥Doctor Blade

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  誘電体セラミックグリーンシートもし
くはフェライト磁性体グリーンシート上に導電ペースト
で導体パターンあるいはコイルパターンを印刷し、これ
らを積層、圧着して成形体とした後、チップ形状に裁断
し、得られた成形体を乾燥、焼成してチップ素子とし、
その端部に接続用端子電極を形成することからなる積層
セラミック電子部品の製造方法において、グリーンシー
ト乾燥後のグリーンシートと上記パターンとの段差を無
くすように、グリーンシートの上記パターンを印刷する
部分に予め凹部を形成しておき、この凹部に該パターン
を印刷することを特徴とする積層セラミック電子部品の
製造方法。
Claim 1: A conductive pattern or a coil pattern is printed on a dielectric ceramic green sheet or a ferrite magnetic green sheet using a conductive paste, and these are laminated and pressed to form a molded body, which is then cut into a chip shape. The molded body is dried and fired to form a chip element,
In a method for manufacturing a multilayer ceramic electronic component comprising forming connection terminal electrodes at the ends of the green sheet, the portion of the green sheet where the pattern is printed so as to eliminate the level difference between the green sheet and the pattern after drying. 1. A method for manufacturing a multilayer ceramic electronic component, comprising forming a recess in advance in the recess, and printing the pattern on the recess.
JP41067790A 1990-12-14 1990-12-14 Manufacture of laminated ceramic electronic part Pending JPH04215414A (en)

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JPH04215414A true JPH04215414A (en) 1992-08-06

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1113712A2 (en) 1999-12-27 2001-07-04 Tridonic Bauelemente GmbH Process for manufacturing conductive lines
WO2001088222A1 (en) * 2000-05-13 2001-11-22 Korea Institute Of Science And Technology High density ceramic thick film fabrication method by screen printing
US7326310B2 (en) 2003-08-28 2008-02-05 Tdk Corporation Method for manufacturing ceramic green sheet and method for manufacturing electronic part using that ceramic green sheet
US7387870B2 (en) 2003-08-28 2008-06-17 Tdk Corporation Method for manufacturing ceramic green sheet and method for manufacturing electronic part using that ceramic green sheet
US7540931B2 (en) 2003-01-31 2009-06-02 Tdk Corporation Method of producing ceramic green sheet and method of producing electronic component using this ceramic green sheet

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6047413A (en) * 1983-08-25 1985-03-14 関西日本電気株式会社 Method of producing laminar ceramic condenser
JPH02100306A (en) * 1988-10-07 1990-04-12 Murata Mfg Co Ltd Manufacture of laminated electronic component

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6047413A (en) * 1983-08-25 1985-03-14 関西日本電気株式会社 Method of producing laminar ceramic condenser
JPH02100306A (en) * 1988-10-07 1990-04-12 Murata Mfg Co Ltd Manufacture of laminated electronic component

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1113712A2 (en) 1999-12-27 2001-07-04 Tridonic Bauelemente GmbH Process for manufacturing conductive lines
EP1113712A3 (en) * 1999-12-27 2003-08-13 TridonicAtco GmbH & Co. KG Process for manufacturing conductive lines
WO2001088222A1 (en) * 2000-05-13 2001-11-22 Korea Institute Of Science And Technology High density ceramic thick film fabrication method by screen printing
US6749798B2 (en) 2000-05-13 2004-06-15 Korea Institute Of Science And Technology High density ceramic thick film fabrication method by screen printing
US7540931B2 (en) 2003-01-31 2009-06-02 Tdk Corporation Method of producing ceramic green sheet and method of producing electronic component using this ceramic green sheet
US7326310B2 (en) 2003-08-28 2008-02-05 Tdk Corporation Method for manufacturing ceramic green sheet and method for manufacturing electronic part using that ceramic green sheet
US7387870B2 (en) 2003-08-28 2008-06-17 Tdk Corporation Method for manufacturing ceramic green sheet and method for manufacturing electronic part using that ceramic green sheet

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