JPH0420671U

JPH0420671U -

Info

Publication number: JPH0420671U
Application number: JP5870490U
Authority: JP
Priority date: 1990-06-01
Filing date: 1990-06-01
Publication date: 1992-02-20

Description

[Brief explanation of the drawing]

第１図は本考案の一実施例のブロツク図、第２
図は第１図に示す実施例のシステム接続図、第３
図は従来のフロツピーデイスクのピークシフトエ
ラー検出装置のブロツク図である。１……パルス間隔測定回路、２……パルス間隔
１Ｔのピークシフト下限許容量設定スイツチ、３
……パルス間隔１Ｔのピークシフト上限許容量設
定スイツチ、４……パルス間隔１．５Ｔのピーク
シフト下限許容量設定スイツチ、５……パルス間
隔１．５Ｔのピークシフト上限許容量設定スイツ
チ、６……パルス間隔２Ｔのピークシフト下限許
容量設定スイツチ、７……パルス間隔２Ｔのピー
クシフト上限許容量設定スイツチ、８……パルス
間隔１Ｔの下限比較回路（Ａ＜Ｂ）、９……パル
ス間隔１Ｔの上限比較回路（Ａ＞Ｃ）、１０……
パルス間隔１．５Ｔの下限比較回路（Ａ＜Ｄ）、
１１……パルス間隔１．５Ｔの上限比較回路（Ａ
＞Ｅ）、１２……パルス間隔２Ｔの下限比較回路
（Ａ＜Ｆ）、１３……パルス間隔２Ｔの上限比較
回路（Ａ＞Ｇ）、１４……ピークシフトエラー判
定回路、１５……リード信号禁止回路、１６……
リードライトテスタ、１７……ピークシフトエラ
ー検出、１８……フロツピーデイスクドライブ、
１９……中央処理装置（ＣＰＵ）、２０……パル
ス間隔測定値格納メモリ、Ａ……パル間隔測定値
、Ｂ……パルス間隔１Ｔ下限許容値、Ｃ……パル
ス間隔１Ｔ上限許容値、Ｄ……パルス間隔１．５
Ｔ下限許容値、Ｅ……パルス間隔１．５Ｔ上限許
容値、Ｆ……パルス間隔２Ｔ下限許容値、Ｇ……
パルス間隔２Ｔ上限許容値、ａ……リードデータ
信号、ｂ……Ａ＜Ｂの比較信号、ｃ……Ａ＞Ｃの
比較信号、ｄ……Ａ＜Ｄの比較信号、ｆ……Ａ＜
Ｆの比較信号、ｅ……Ａ＞Ｅの比較信号、ｇ……
Ａ＞Ｇの比較信号、ｈ……ピークシフトエラー発
生信号、ｉ……ピークシフトエラー発生時にリー
ドデータ信号ａが停止された信号。 Figure 1 is a block diagram of one embodiment of the present invention;
The figure shows the system connection diagram of the embodiment shown in Fig. 1, and the system connection diagram of the embodiment shown in Fig. 3.
The figure is a block diagram of a conventional floppy disk peak shift error detection device. 1... Pulse interval measurement circuit, 2... Peak shift lower limit tolerance setting switch for pulse interval 1T, 3
... Peak shift upper limit allowable amount setting switch for pulse interval 1T, 4... Peak shift lower limit allowable amount setting switch for pulse interval 1.5T, 5... Peak shift upper limit allowable amount setting switch for pulse interval 1.5T, 6... ...Peak shift lower limit allowable amount setting switch for pulse interval 2T, 7...Peak shift upper limit allowable amount setting switch for pulse interval 2T, 8...Lower limit comparison circuit (A<B) for pulse interval 1T, 9...Pulse interval 1T Upper limit comparison circuit (A>C), 10...
Lower limit comparison circuit with pulse interval 1.5T (A<D),
11... Upper limit comparison circuit with a pulse interval of 1.5T (A
>E), 12...Lower limit comparison circuit with pulse interval 2T (A<F), 13...Upper limit comparison circuit with pulse interval 2T (A>G), 14...Peak shift error determination circuit, 15...Read signal Prohibited circuit, 16...
Read/write tester, 17... Peak shift error detection, 18... Floppy disk drive,
19...Central processing unit (CPU), 20...Pulse interval measurement value storage memory, A...Pulse interval measurement value, B...Pulse interval 1T lower limit allowable value, C...Pulse interval 1T upper limit allowable value, D... ...Pulse interval 1.5
T lower limit allowable value, E...Pulse interval 1.5T upper limit allowable value, F...Pulse interval 2T lower limit allowable value, G...
Pulse interval 2T upper limit allowable value, a...read data signal, b...comparison signal of A<B, c...comparison signal of A>C, d...comparison signal of A<D, f...A<
Comparison signal of F, e...Comparison signal of A>E, g...
Comparison signal of A>G, h: Peak shift error occurrence signal, i: Signal where read data signal a is stopped when a peak shift error occurs.

Claims

[Scope of utility model registration request]

a pulse interval measuring device for measuring a pulse interval of read data from a floppy disk drive; a 1T lower limit allowable amount setting means for setting a peak shift lower limit allowable amount for a 1T pulse interval of the read data; and a pulse interval of the read data. a 1T upper limit allowable amount setting means for setting a 1T peak shift upper limit allowable amount; and a pulse interval 1 of the read data.
1.5 to set the peak shift lower limit tolerance of 5T
T lower limit allowable amount setting means, 1.5T upper limit allowable amount setting means for setting a peak shift upper limit allowable amount for a pulse interval of 1.5T of the read data, and a peak shift lower limit allowable amount for a pulse interval of 2T for the read data. 2T lower limit allowable amount setting means for setting, and 2T upper limit allowable amount setting means for setting a peak shift upper limit allowable amount for the pulse interval 2T of the read data;
a 1T lower limit comparison circuit that compares a measured pulse interval measured by the pulse interval measuring device with a peak shift lower limit allowable amount for the pulse interval 1T; and a 1T lower limit comparison circuit that compares the measured pulse interval and a peak shift upper limit allowable amount for the pulse interval 1T. an upper limit comparison circuit, a 1.5T lower limit comparison circuit that compares the measurement pulse interval and the peak shift lower limit allowable amount of the pulse interval 1.5T, and the measurement pulse interval and the pulse interval 1.5T.
1.5T comparing peak shift upper limit tolerance of T
an upper limit comparison circuit, a 2T lower limit comparison circuit that compares the measured pulse interval and the peak shift lower limit allowable amount of the pulse interval 2T, and a 2T upper limit comparison circuit that compares the measured pulse interval and the peak shift upper limit allowable amount of the pulse interval 2T. circuit, the 1T lower limit comparison circuit, the 1T upper limit comparison circuit, the 1.5T lower limit comparison circuit, the 1.5T upper limit comparison circuit, the 2T lower limit comparison circuit, and the 2T upper limit comparison circuit; 1. A peak shift error detection device for a floppy disk, comprising a peak shift error determination circuit for determining a peak shift error in data.