JPS6415315U - - Google Patents
Info
- Publication number
- JPS6415315U JPS6415315U JP10961187U JP10961187U JPS6415315U JP S6415315 U JPS6415315 U JP S6415315U JP 10961187 U JP10961187 U JP 10961187U JP 10961187 U JP10961187 U JP 10961187U JP S6415315 U JPS6415315 U JP S6415315U
- Authority
- JP
- Japan
- Prior art keywords
- jitter
- storage means
- pulse width
- data processing
- measures
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003287 optical effect Effects 0.000 claims description 2
- 238000005259 measurement Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
- 238000007493 shaping process Methods 0.000 description 1
Landscapes
- Optical Recording Or Reproduction (AREA)
Description
第1図および第2図は本考案のジツタ測定回路
の一実施例を示す構成図および動作波形図、第3
図および第4図は従来のジツタ測定回路の一例を
示す構成図である。
1……光デイスク、2……測定ヘツド、3……
パルス整形回路、4……パルス幅測定回路、5…
…データ処理部、6……記憶手段。
1 and 2 are a configuration diagram and an operating waveform diagram showing an embodiment of the jitter measuring circuit of the present invention, and FIG.
1 and 4 are configuration diagrams showing an example of a conventional jitter measuring circuit. 1... Optical disk, 2... Measuring head, 3...
Pulse shaping circuit, 4...Pulse width measuring circuit, 5...
...Data processing unit, 6...Storage means.
Claims (1)
生してジツタの測定を行なうジツタ測定回路にお
いて、再生されたパルス信号のパルス幅を順次測
定するパルス幅測定回路と、このパルス幅測定回
路により得られた測定データを一時的に記憶する
記憶手段と、この記憶手段から順次測定データを
読み出し所定のデータ処理を行なうデータ処理部
とを具備してなるジツタ測定回路。 In a jitter measurement circuit that measures jitter by reproducing a signal written on an optical disk at a constant cycle, there is a pulse width measurement circuit that sequentially measures the pulse width of the reproduced pulse signal, and a 1. A jitter measuring circuit comprising: a storage means for temporarily storing measured data; and a data processing section that sequentially reads the measured data from the storage means and performs predetermined data processing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10961187U JPS6415315U (en) | 1987-07-17 | 1987-07-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10961187U JPS6415315U (en) | 1987-07-17 | 1987-07-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6415315U true JPS6415315U (en) | 1989-01-26 |
Family
ID=31346010
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10961187U Pending JPS6415315U (en) | 1987-07-17 | 1987-07-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6415315U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59125142A (en) * | 1982-12-30 | 1984-07-19 | Sony Corp | Jitter detector |
-
1987
- 1987-07-17 JP JP10961187U patent/JPS6415315U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59125142A (en) * | 1982-12-30 | 1984-07-19 | Sony Corp | Jitter detector |
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