JPH04206652A - Socket for testing high frequency ic - Google Patents

Socket for testing high frequency ic

Info

Publication number
JPH04206652A
JPH04206652A JP33511390A JP33511390A JPH04206652A JP H04206652 A JPH04206652 A JP H04206652A JP 33511390 A JP33511390 A JP 33511390A JP 33511390 A JP33511390 A JP 33511390A JP H04206652 A JPH04206652 A JP H04206652A
Authority
JP
Japan
Prior art keywords
socket
ground
terminal
high frequency
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP33511390A
Other languages
Japanese (ja)
Other versions
JPH0766950B2 (en
Inventor
Teruo Masuno
舛野 煕夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MINATO ELECTRON KK
Original Assignee
MINATO ELECTRON KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MINATO ELECTRON KK filed Critical MINATO ELECTRON KK
Priority to JP2335113A priority Critical patent/JPH0766950B2/en
Publication of JPH04206652A publication Critical patent/JPH04206652A/en
Publication of JPH0766950B2 publication Critical patent/JPH0766950B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Connecting Device With Holders (AREA)

Abstract

PURPOSE:To supply a power source having low noise to an IC to be measured by mounting a chip capacitor between a power terminal of a socket for testing the IC and a ground, and placing the IC thereon. CONSTITUTION:A chip type capacitor 13 is mounted between a power terminal and a ground terminal in a space 10-1 of the inner surface under a socket body 10 for testing an IC. When the IC 3 is placed on the body 10 mounted on a printed board 4, the capacitor 13 connected to the power terminal of the IC 3 inserted between the 2-1 and 2-2 of the contactor 2 of the socket is connected the ground without intermediary of a lead. As a result, high frequency noise on a power source line can be efficiently bypassed, and influence of high frequency to the power source line is reduced. Thus, power having low noise can be supplied to the IC to be measured.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は高周波用IC試験用ソソケット関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a high frequency IC test socket.

[従来の技術] 従来、高周波用ICの機能テストにはバーンイン用のI
Cソケットである第5図に示すDIP型(Dual I
n Package )バーンインソケット(以下DI
PICソケットう)又は第7図に示すSOP型(Sma
ll 0utline Package ) ハーンイ
ンソケいられていた。
[Conventional technology] Conventionally, burn-in I was used for functional testing of high-frequency ICs.
The DIP type (Dual I) shown in Fig. 5 is a C socket.
n Package) Burn-in socket (hereinafter DI
PIC socket) or SOP type (Sma
ll 0utline Package ) I was in trouble.

前記DIPICソケット第5図すに示す衆知のDIP型
IC3の両側の端子イ3−1及び端子口3−2が嵌挿さ
れる、複数の接触子2が内面両側に形成された第5図a
に示すプラスチック材のソケット本体1と、該ソケット
本体1の内面両側の複数の溝に嵌入し且つソケット本体
lの下面に突出する接触子用端子2′を有する弾性接触
片イ2−1及び弾性接触片口2−2とから形成される前
記接触子2とからなり、該接触子2は第5図Cに示す如
く一体に形成されているが、矢印Xの方向から前記DI
P型IC3の端子が嵌挿される。
A plurality of contacts 2 are formed on both sides of the inner surface into which the terminals 3-1 and terminal openings 3-2 on both sides of the well-known DIP type IC 3 shown in FIG. 5A are inserted.
A socket body 1 made of a plastic material as shown in FIG. The contact piece 2 is formed from a contact opening 2-2, and the contact piece 2 is integrally formed as shown in FIG. 5C.
The terminal of the P-type IC3 is inserted.

該DIP型ハーンインソケントは、第6図に示すごとく
、プリント基板4上に装着され、前記接触子用端子2′
に接続される信号ラインを介して、該ソケット上に搭載
されるIC3の機能テストが行われる。
The DIP type hahn insocket is mounted on the printed circuit board 4 as shown in FIG. 6, and the contact terminal 2'
A functional test of the IC3 mounted on the socket is performed via a signal line connected to the socket.

又第9図に示される如く、従来例としてDTP型バーン
インソケットの下面に空間を設は該空間に又は該ソケッ
トの下方でプリント基板の下部にコンデンサーを装着し
たものがある。
As shown in FIG. 9, there is a conventional example in which a space is provided on the lower surface of a DTP type burn-in socket, and a capacitor is mounted in the space or below the socket and below the printed circuit board.

[発明が解決しようとする課題] ICテスタのテストスピードは、従来30MHz前後で
あったが現在は60〜100M)Izと非常に早くなり
、従来例の様なバーンイン用のICソケットやハンドラ
ー用のリーフ型コンタクタ−では、インピーダンス整合
が行われていないため、信号の反射現象が大きくテスタ
ー本来の性能が出せないという欠点があった。
[Problem to be solved by the invention] The test speed of IC testers used to be around 30 MHz, but now it is extremely fast, reaching 60-100 MHz. Leaf-type contactors have the disadvantage that impedance matching is not performed, so the signal reflection phenomenon is large and the tester cannot achieve its original performance.

本発明の目的は前記欠点を解消し、テスターの性能に合
った、反射の少ない、又電源ラインやグランドラインに
ノイズの少ない高周波用IC試験用ソケットを提供する
にある。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a high-frequency IC testing socket that meets the performance of the tester, has less reflection, and has less noise in the power supply line and ground line.

[課題を解決するための手段] 本発明は前記課題を解決するため、高周波用IC試験用
ソケットを、搭載したICの端子と接触する試験用ソケ
ットの接触子端子を通して信号ラインにより該ICの機
能テストを行う試験用ソケットにおいて、該試験用ソケ
ット本体の下部内側面に空間を設け、該空間に配置され
た接触子に接続するコンデンサーを装着して構成した請
求項1の発明と、試験用ソケツトの接触子間に分布容量
用の導体を設けて構成した請求項2の発明と、試験用ソ
ケット本体の周囲及び下面にグラウンド(以下グランド
という)強化用導体を設けて構成した請求項1及び請求
項2の発明とで構成したのである。
[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention connects a high-frequency IC test socket to a terminal of a mounted IC by connecting a signal line to a contact terminal of the test socket that contacts the terminal of the mounted IC. The invention according to claim 1, wherein a test socket for performing a test is configured by providing a space on the lower inner surface of the test socket main body and mounting a capacitor connected to a contact placed in the space, and the test socket. The invention of claim 2, in which a conductor for distributed capacitance is provided between the contacts of the test socket, and the invention of claim 1, in which a conductor for reinforcing the ground (hereinafter referred to as ground) is provided around and under the test socket body. The present invention is composed of the invention described in Section 2.

[作 用] 前記の通り構成された請求項1の発明は、該試験用ソケ
・ノドを用いてICの高周波機能テストを行う場合に、
前記空間に配置されたコンデンサーにはリード線を介す
る事がなく、グランドに接続されるため電源ラインの高
周波分を効率良くバイパス出来、電源ラインが高周波の
影響を受けるのを減少させるのに効果があり、請求項2
の発明は、該試験用ソケットを用いてICの機能テスト
を行う場合に、信号ラインのインピーダンス不整合によ
る信号波の反射現象をインピーダンス整合によりおさえ
て信号情報を正しく伝達させる効果があり、インピーダ
ンス整合が完全でなくとも従来型のバーンイン用のIC
ソケットやハンドラー用のリーフ型コンタクタ−と異な
り分布容量を持たせる事で反射減少を減少させるため、
伝達信号の歪みが減少し伝達信号の信顧性向上が可能と
なり、請求項3の発明は、接触子から短い距離で表面積
の大きいグランドに接続できるため、グランドの高周波
インピーダンスを減少させ伝達信号の信頼性向上が可能
となり、又、各請求項の発明を任意に組み合わせて併用
することで更に高周波機能テストの信顧性が向上できる
のである。
[Function] The invention of claim 1 configured as described above, when performing a high frequency function test of an IC using the test socket and throat,
Since the capacitor placed in the space is connected to the ground without passing through a lead wire, the high frequency components of the power line can be efficiently bypassed, which is effective in reducing the influence of high frequencies on the power line. Yes, claim 2
The invention has the effect of correctly transmitting signal information by suppressing the reflection phenomenon of signal waves due to impedance mismatch of signal lines by impedance matching when performing a functional test of an IC using the test socket. IC for conventional burn-in even if the burn-in is not complete
Unlike leaf-type contactors for sockets and handlers, it has distributed capacitance to reduce reflection loss.
Distortion of the transmitted signal is reduced and the reliability of the transmitted signal can be improved.The invention according to claim 3 allows connection to a ground with a large surface area at a short distance from the contact, thereby reducing the high frequency impedance of the ground and improving the reliability of the transmitted signal. Reliability can be improved, and by arbitrarily combining the inventions of each claim, the reliability of the high frequency function test can be further improved.

[実施例] 本発明の一実施例を図面と共に説明する。[Example] An embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の斜視図、第2図は本発明の
一実施例の正面図、第3図は本発明の平面図、第4図は
本発明の実施例の部分拡大断面図、第9図は本発明の実
施例によるICの測定例のデータである。
Fig. 1 is a perspective view of an embodiment of the present invention, Fig. 2 is a front view of an embodiment of the invention, Fig. 3 is a plan view of the invention, and Fig. 4 is a partially enlarged view of the embodiment of the invention. The cross-sectional view, FIG. 9, is data of an example of measurement of an IC according to an embodiment of the present invention.

第1図〜第4図において、叢は接触子、3はrc、4は
プリント基板で従来例と同じである。IC3はDIP型
ICである。10はソケット本体であり第5図で示した
従来例のソケット本体1と外形、寸法等変わらないが、
一部構造を変えたので符号を変更した。11はグランド
を形成する導体イではソケット本体10上に無電解メツ
キで形成しても良い。12は導体口でありソケット本体
1oの中央長手方向内部の凹部に設けられている。1〇
−1は空間であってソケット本体10の下部内面に設け
られていて、空間10−1には必要な箇所にチップ型コ
ンデンサー13が装着される。
In FIGS. 1 to 4, numeral 3 is a contact, 3 is an rc, and 4 is a printed circuit board, which are the same as in the conventional example. IC3 is a DIP type IC. Reference numeral 10 denotes a socket body, which is the same in external shape and dimensions as the conventional socket body 1 shown in FIG.
The sign has been changed because some structures have been changed. A conductor 11 forming a ground may be formed on the socket body 10 by electroless plating. Reference numeral 12 denotes a conductor port, which is provided in a recessed portion inside the socket body 1o in the central longitudinal direction. Reference numeral 10-1 is a space provided on the lower inner surface of the socket body 10, and a chip type capacitor 13 is mounted in the space 10-1 at a necessary location.

プリント基板4上に取り付けられたIC試験用ソケット
にIC3が搭載されその端子イ、口が接触子Iの接触片
イ2−1、口2−2に挿入されると、接触子の端子2′
で図示されない信号ラインに接続され、又導体イ11及
び口12はプリント基板4のグランドと接続される。
When the IC 3 is mounted on the IC testing socket mounted on the printed circuit board 4 and its terminal A and opening are inserted into the contact piece A 2-1 and the opening 2-2 of the contact I, the terminal 2' of the contact
The conductor 11 and the opening 12 are connected to the ground of the printed circuit board 4.

接触子2′の信号ラインとグランドでICソケットの周
囲が端子間にグランドを設けた場合はマイクロストリッ
プラインを形成し、又ICソケットの周囲と端子間にグ
ランドを設けた場合はストリップラインを形成するため
、ソケット接触子の信号ラインのインピーダンス整合が
可能である。
If a ground is provided between the terminals around the IC socket with the signal line of the contact 2' and the ground, a microstrip line is formed, and a strip line is formed when a ground is provided between the terminals and the area around the IC socket. Therefore, impedance matching of the signal line of the socket contact is possible.

グランドライン低インピーダンス化が必要な場合、グラ
ンド用接触子の位置に、チップ型コンデンサー13の代
わりに導体を挿入し、接触子2の端子2′を通してのグ
ランド接続の他、グランド用接触子2′から前記化わり
の導体を介してのグランド接続や、図示していないが接
触子の一部を変形させ、ソケットに設けたグランド用導
体に直接接続させる方法等により、グランド強化、即ち
グランドラインの低インピーダンス化が可能である。
If it is necessary to lower the impedance of the ground line, insert a conductor instead of the chip capacitor 13 at the position of the ground contact, and in addition to the ground connection through the terminal 2' of the contact 2, the ground contact 2' The ground can be strengthened, that is, the ground line can be strengthened by connecting the ground via the above-mentioned substitute conductor, or by deforming a part of the contact (not shown) and directly connecting it to the ground conductor provided in the socket. Low impedance is possible.

以上DIP型ソケットの場合について説明したが、SO
P型ソケット及びリーフ型コンタクタ等についても本発
明の要旨は実施可能であり、その詳細な説明は省略する
The case of DIP type socket has been explained above, but SO
The gist of the present invention can also be implemented with P-type sockets, leaf-type contactors, etc., and detailed explanation thereof will be omitted.

[発明の効果] 本発明を前記の通り構成したので、請求項1の発明は被
測定ICにノイズの少ない電源供給が可能となり測定結
果の信顧性が向上する効果がある。
[Effects of the Invention] Since the present invention is configured as described above, the invention according to claim 1 has the effect of making it possible to supply power with less noise to the IC under test and improving the reliability of measurement results.

請求項2の発明は信号ラインのICソケットでのインピ
ーダンス不整合による反射現象を減少させる事で、ソケ
ットでの信号の歪みを減少させるためテスターからの信
号をより正確に被測定ICに伝達する事が可能となり高
周波測定がより正確になるという効果がある。
The invention of claim 2 reduces the reflection phenomenon caused by impedance mismatching of the signal line at the IC socket, thereby reducing signal distortion at the socket, thereby transmitting the signal from the tester to the IC under test more accurately. This has the effect of making high frequency measurements more accurate.

第10図は本発明の実施例による測定結果を示す比較図
である。
FIG. 10 is a comparison diagram showing measurement results according to an example of the present invention.

第10図において、■は従来例■は本発明の実施例■は
■を更に改善した例である。この測定はTDR測定でお
こなった。図からICソケットでの反射量の改善が明ら
かである。
In FIG. 10, (2) is a conventional example (2) is an embodiment of the present invention (2) is an example in which (2) is further improved. This measurement was performed by TDR measurement. From the figure, it is clear that the amount of reflection at the IC socket is improved.

請求項3の発明は被測定ICのグランドをICソケット
の接触子付近まで強化し、ICソケットのグランドライ
ンを高周波インピーダンスの低いグランドラインに構成
できる効果がある。
The invention of claim 3 has the effect of strengthening the ground of the IC to be measured to the vicinity of the contacts of the IC socket, and configuring the ground line of the IC socket as a ground line with low high frequency impedance.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の斜視図、第2図は本発明の
一実施例の正面図、第3図は本発明の平面図、第4図は
本発明の実施例の部分拡大断面図、第5図は従来のDI
P型バーンインソケットの斜視図、第6図はプリント基
板上に装着したDIP型バーンインソケットの一部切り
欠き側面図、第7図aはSOP型ソケットの正面図、第
7図すはSOP型ソケットの平面図、第8図aはハンド
ラー用のリーフ型コンタクター−の正面図、第8図すは
ハンドラー用のリーフ型コンタクタ−の平面図、第9図
aは従来の下面空間にコンデンサーを装着したDIP型
ソケットの正面図、第9図すは従来の下面空間にコンデ
ンサーを装着したDIP型ソケットの平面図、第10図
は本発明の実施例による測定結果を示す比較図である。 1・・・ソケット本体、I・・・接触子、2−1・・・
接触片イ、2−2・・・接触片口、2′・・・端子、3
・・・IC13−1・・・端子イ、3−2・・・端子口
、4・・・プリント基板、10・・・ソケット本体、1
0−1・・・チップ型コンデンサー、11・・・導体イ
、12・・・導体口、13・・・端子部、14・・・コ
ンデンサー本発明の1実施例の斜視図 1 接触子 第 1 図     2′、接触子端子本発明の1実施
例の正面図 第2図 本発明の1実施例の平面図 第3図 =2−1 本発明の実施例の部分拡大断面図 第4図 1 ソケ・/ト本体 第6図 従来のDIP型バーンインノケットの斜視図第5図 第8図b      第8図Q sop型ノケノトの正面図 第7図0 sop型ノケノトの平面図 第7図b 1 ノケノト本体 311C 14コンデンサー 14−1  リード 従来のド面空間にコンデンサーを装着したDIP型ツク
ックドの平面図第9図Q 従来の下m1空間にコンデンサーを装着したDIP型ノ
ケノ[・の平面図第9図す 第10図
Fig. 1 is a perspective view of an embodiment of the present invention, Fig. 2 is a front view of an embodiment of the invention, Fig. 3 is a plan view of the invention, and Fig. 4 is a partially enlarged view of the embodiment of the invention. Cross-sectional view, Figure 5 is a conventional DI
A perspective view of a P-type burn-in socket, Fig. 6 is a partially cutaway side view of a DIP-type burn-in socket mounted on a printed circuit board, Fig. 7a is a front view of an SOP-type socket, and Fig. 7A is a SOP-type socket. Figure 8a is a front view of a leaf-type contactor for a handler, Figure 8a is a plan view of a leaf-type contactor for a handler, and Figure 9a is a conventional condenser installed in the lower space. FIG. 9 is a front view of a DIP type socket, FIG. 9 is a plan view of a conventional DIP type socket in which a capacitor is mounted in the lower surface space, and FIG. 10 is a comparison diagram showing measurement results according to an embodiment of the present invention. 1... Socket body, I... Contact, 2-1...
Contact piece A, 2-2...Contact piece mouth, 2'...Terminal, 3
...IC13-1...Terminal A, 3-2...Terminal opening, 4...Printed circuit board, 10...Socket body, 1
0-1... Chip type capacitor, 11... Conductor A, 12... Conductor opening, 13... Terminal portion, 14... Capacitor Perspective view of one embodiment of the present invention 1 Contactor No. 1 Figure 2': Contact terminal Front view of one embodiment of the present invention Figure 2 Plan view of one embodiment of the present invention Figure 3 = 2-1 Partially enlarged sectional view of the embodiment of the present invention Figure 4 1 Socket Figure 6. Perspective view of conventional DIP type burn-in socket. Figure 5. Figure 8.b. Figure 8. Q. Front view of sop type. Main body 311C 14 Capacitor 14-1 Lead Plan view of the DIP type Tsukukudo with a condenser installed in the conventional do surface space Figure 9 Figure 10

Claims (1)

【特許請求の範囲】 1、搭載したICの端子と接触する試験用ソケットの接
触子端子を通して信号ラインにより該ICの機能テスト
を行う試験用ソケットにおいて、該試験用ソケット本体
の下部内側面に空間を設け、 該空間に配置された接触子に接続するコンデンサーを装
着して構成したことを特徴とする高周波用IC試験用ソ
ケット。 2、試験用ソケットの接触子間に分布容量用の導体を設
けて構成した請求項1の高周波用IC試験用ソケット。 3、試験用ソケット本体の周囲及び下面にグラウンド強
化用導体を設けて構成した請求項1及び請求項2の高周
波用IC試験用ソケット。
[Claims] 1. In a test socket in which the function of the IC is tested by a signal line through the contact terminal of the test socket that contacts the terminal of the mounted IC, a space is provided on the lower inner surface of the test socket main body. A socket for high frequency IC testing, characterized in that the socket is provided with a capacitor connected to a contact disposed in the space. 2. The high frequency IC test socket according to claim 1, further comprising a conductor for distributed capacitance between the contacts of the test socket. 3. The high-frequency IC test socket according to claim 1 and claim 2, wherein a ground reinforcing conductor is provided around and on the lower surface of the test socket main body.
JP2335113A 1990-11-30 1990-11-30 High frequency IC test socket Expired - Lifetime JPH0766950B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2335113A JPH0766950B2 (en) 1990-11-30 1990-11-30 High frequency IC test socket

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2335113A JPH0766950B2 (en) 1990-11-30 1990-11-30 High frequency IC test socket

Publications (2)

Publication Number Publication Date
JPH04206652A true JPH04206652A (en) 1992-07-28
JPH0766950B2 JPH0766950B2 (en) 1995-07-19

Family

ID=18284918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2335113A Expired - Lifetime JPH0766950B2 (en) 1990-11-30 1990-11-30 High frequency IC test socket

Country Status (1)

Country Link
JP (1) JPH0766950B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001006599A2 (en) * 1999-07-16 2001-01-25 Molex Incorporated Connectors with reduced noise characteristics

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55109287U (en) * 1979-01-29 1980-07-31

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55109287U (en) * 1979-01-29 1980-07-31

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001006599A2 (en) * 1999-07-16 2001-01-25 Molex Incorporated Connectors with reduced noise characteristics
WO2001006599A3 (en) * 1999-07-16 2001-05-31 Molex Inc Connectors with reduced noise characteristics
US6379184B1 (en) 1999-07-16 2002-04-30 Molex Incorporated Connectors with reduced noise characteristics

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