JPH04205896A - Sample and hold circuit - Google Patents

Abstract

PURPOSE:To obtain highly accurate measurements which do not receive any influence from other signals by sampling a reference voltage and signals to be sampled by turning on/off switches for sampling having the same constitution and differentially outputting the output by means of a differential circuit. CONSTITUTION:When signals to be sampled inputted from an signal input terminal are sampled by inputting a sampling pulse input terminal 2a sampling pulse, the same magnitude of noise is generated at a switch 2b for sampling signals and another switch 2c for sampling reference voltages, since both switches 2b and 2c have the same size and same constitution. Accordingly, the signals to be sampled and a reference voltage affected by the cross talk are held by means of a capacitor 3 for holding signals and capacitor 4 for holding reference voltages and the output is differentially outputted to a differential circuit 8. Therefore, a real value containing no influence of a sampling pulse is removed can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improvements in sample-and-hold circuits.

[Prior Art] FIG. 2 shows an example of the configuration of a conventional sample-and-hold circuit. In the figure, (1) is the signal input terminal into which the sampled signal is input, and (2b) is the signal input terminal (1).
is connected to one side of the sampling switch,
<2al turns on the sampling switch (2b),
Sampling pulse input terminal for inputting a control signal to turn off, (3) is a sampling switch (2b)
A hold capacitor is connected to the other side of the non-grounded side to keep the sampled signal hole-routed (
Reference numeral 10) is an output terminal connected to the ungrounded terminal of the hold capacitor (3) for outputting a held signal.

Next, the operation will be explained. The sampled signal is input from the signal input terminal (1), and the sampling switch (2
b) is controlled by inputting a sampling pulse to the sampling pulse input terminal, and the sampling switch (2b)
The level of the sampled signal when is turned on is charged to the hold capacitor (3) and outputted from the output terminal (lO).

[LE to be solved by the invention Since the conventional sample/hold circuit is configured as shown below, noise (sampling pulse crosstalk) is generated when the sampling switch (2b) turns on and off from the sampling pulse. However, when the sampled signal is a small signal, this noise affects the signal held in the hold capacitor (3), and there is a problem in that the true value cannot be obtained.

This invention was made to eliminate the above-mentioned bending point, and even if the sleeve sample signal is a small signal, it is possible to obtain the true sample value without being affected by noise caused by the sampling switch. Intended as a sampling/hold circuit.

[Means for Solving the Problems] A sample/hold circuit according to the present invention includes a sampling switch S1 that samples and holds a sampled signal, and a reference voltage that samples and holds a reference voltage that has the same configuration as a signal hold capacitor. A sampling switch S2 and a reference voltage hold capacitor are provided, and the sampling switches S1 and S2 are configured to be controlled by the same equal sign, and the noise of the sampling notch S] that occurs when the sampled signal is sampled is Noise of the same magnitude occurs in the sampling switch S2, and the output of the capacitor is differentially outputted to the signal hold capacitor that holds the signal affected by the noise of the sampling pulse and the reference voltage hole by the differential amplifier. This is how it was done.

[Effect]

The sample-and-hold circuit in this invention samples the sampled signal and the reference voltage using a sampling switch with the same configuration, and then passes the sampled signal through a differential amplifier to accurately accurately measure the sampled signal without being affected by the noise of the sampling switch. sample and hold.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

In Figure 1, (1) is a signal input terminal, (2b) is a signal sample/hold switch whose one side is connected to this signal input terminal, and (2C) is one side connected to a reference voltage source (5). Both (2b) and (2C) are connected to the sampling pulse input terminal (2a).

The other side of the signal sample and hold switch (2b) is connected to the non-grounded side of the signal hold capacitor (3) and the positive phase input terminal of the buffer (6), and the reference voltage sample and hold switch (2b) The other side of the 2C) is the reference voltage hold capacitor (4) and the buffer (7).
) is connected to the positive phase input terminal of the The output of the buffer (6) is connected to the negative phase input side of the differential circuit (8), and the output of the buffer (7) is connected to the positive phase input side of the differential circuit (8). The output of the idler circuit (8) is connected to the signal pressure terminal.

Next, the operation will be explained. The sampled signal input from the signal input terminal is input to the sampling pulse input terminal (2a
) When a sampling pulse is input and sampled, the signal sampling switch (2b) and the reference voltage sampling switch (2c) are the same size and have the same configuration, so both switches have the same amount of noise (sampling pulse).・When crosstalk occurs, the sampled signal and reference voltage affected by the crosstalk are held in the signal hold capacitor and reference voltage hold capacitor, and the output is input to the differential circuit and output as a differential output. By doing this, it is possible to obtain a true value from which the influence of the sampling pulse has been removed.

Further, in the above embodiment, the case of sampling pulse noise (crosstalk) has been explained, but the same effects as in the above embodiment can be obtained even when removing the influence of droop or the like in a hold state in a sample/hold circuit.

[Effects of the Invention] As described above, according to the present invention, the reference voltage and the sampled signal can be turned on and off by the sampling switch having the same configuration.
Since the configuration is such that sampling is performed and the output is differentially outputted by a differential circuit, highly accurate measurement values can be obtained without being influenced by other signals.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a sample and hold circuit according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional sample and hold circuit. In the figure, (1) is a signal input terminal, (2a
) is the sampling pulse input terminal, (2b) is the signal sampling switch, (2C) is the reference voltage sampling switch, (3) is the signal hold capacitor, (4
) is the reference voltage hold capacitor, (5) is the reference voltage power supply 1, (6) is the buffer 1, (7) is the buffer 2, (8
) is a differential circuit, (9) is a reference voltage power supply 2, and (lO) is a signal output terminal. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Agent Masuo Oiwa Figure 1 Figure 2

Claims (1)

[Claims] From the signal input terminal via the sampling switch S1,
a sample/hold circuit connected to the non-grounded side of the signal hold capacitor and the positive phase input side of buffer 1;
A sample/hold circuit is connected from the signal input terminal to the ungrounded side of the reference voltage hold capacitor and the positive phase input side of the buffer 2 via the sampling switch S2 to which the sampling switch S1 and the control section are connected. , A sample and hold circuit characterized in that the outputs of the buffers 1 and 2 are connected to their negative phase inputs and positive phase inputs, and their outputs are connected to their output terminals.