JPH04204490A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To realize the liquid crystal display being always excellent and having an excellent display quality by displaying a number of periodic lines of an M signal required to obtain an excellent liquid crystal display at a different value every the total line number of one screen. CONSTITUTION:The device has an M generation circle 14 by which the total line number is automatically detected and an M signal 15 switching in a cycle of the optimized line number is generated. The total line number on one screen is obtained by counting a horizontal clock 5 during a period of the top signal 11 and since corresponding to the count number the optimized line number is given as a period of a frequency divider generating the M signal, the optimized M signal is obtained even in the case that the total line number of the display screen is different. Hence even in the case that a different total line number is switched and displayed, the optimized M signal is always generated and the excellent display is carried out.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a liquid crystal display device, and particularly to a liquid crystal display device that is optimal for displaying various screen sizes on the same system.

[Conventional technology]

Conventionally, a voltage averaging method has been used in time-division driving liquid crystal displays, and this involves AC driving every frame or every few lines, as described in Japanese Patent Laid-Open No. 61-50119. ing. The above driving method will be explained in detail below using FIGS. 2 to 6.

FIG. 2 is a block diagram of a conventional liquid crystal display device, where l is display data, 2 is a data clock, 3 is a data latch circuit, and 4 is latch data. It is captured at the falling edge and output as latch data 4. Reference numeral 5 denotes a horizontal clock, and one pulse is output at the timing of dividing one horizontal portion of display data. 6 is a horizontal latch circuit, 7 is 1 horizontal data, and horizontal latch circuit.

The latch circuit 6 takes in the latch data 4 at the falling edge of the horizontal clock 5 and outputs it as 1 horizontal data 7. 8
is the X drive circuit, 9 is the 4-level X voltage, and 15 is the AC “
With the M signal indicating "+" and "-", the X drive circuit 8 outputs "1" and "0" of one horizontal data 7.

Select one level from the four levels of X voltage 9 by combining l'' and '0'' of M signal 15, and select X display voltage X1 to X640.
Output as . 10 is a Y drive circuit, 11 is a leading signal that becomes "L" once per frame period, which is the scanning period of one screen, and 12 is a two-level Y voltage. The selection signal 11, which becomes "1" once every year, is taken in at the falling edge of the horizontal clock 11, and its "1" state is shifted at the next rising edge of the horizontal clock 11. (
At this time, other than the "]" state is '0'). By the combination of this '1' or '0' and the M signal 15, the I level is selected from the two levels of the Y voltage 12, and the line voltage Yl-Y200 is
Output as . 13 is a liquid crystal panel with X display voltage Xi~
At the intersection of X640 and line voltages Y1 to Y2O0, the display ON state and display OFF state are indicated by the effective value of the potential difference. FIG. 3 is a diagram showing potential differences between four levels v1 to V of the X voltage 9, v, and vg of the Y voltage 12, and FIG. FIG. 5 is a diagram illustrating voltage selection in the Y drive circuit 10, in which the M signal 15 is set to "1" and "0" for each frame.
This is a diagram showing the display applied voltage on the liquid crystal panel 13 as the 1O line when repeating the following: dot A indicates the applied voltage of the first dot where the data of one row is displayed in ON/OFF state, 1 indicates OFF state, and dot B indicates the applied voltage All the data in one row is the voltage applied to the first dot in the display OFF state. 6th
In contrast to FIG. 5, the figure shows that the M signal]5 is set to
'', ``0'' and () are diagrams showing the applied voltages of dots A and B when the voltage is repeated.

Fig. 2 is a block diagram of a 640 x 200 dot liquid crystal display device, in which a data latch circuit 3 sequentially converts display data l into I horizontal 640 dots at the falling edge of data clock 2.
A dot is captured, and the captured data is transferred to the horizontal latch circuit 6 at the falling edge of the horizontal clock 5 output at that time.
1 and outputs it as horizontal data 7. Frequency divider 16
divides the horizontal clock 5 and outputs “l” and “0” every few lines.
The X drive circuit 8 generates an M signal 15 that repeats “.
1 horizontal data 7 for X display voltages X1 to X640 outputs the XON voltage for “l” and the
)1″.

0", the level is different. That is, the combination of 1 horizontal data 7 and M signal 15 selects and outputs I level from 4 levels of X voltage 9. On the other hand, Y drive circuit l
O captures the "1" state of the leading signal 11 at the falling edge of the horizontal clock, sets the line voltage Y1 as the Y selection voltage, and sets the other line voltages Y2 to Y2O0 as the Y non-selection voltage. The timing of this one horizontal period is determined by the X drive circuit 8, which displays the X display voltage Xl-X640 according to the display data of the first line.
This is the timing when the N or display OFF voltage is output.

Following the subsequent falling edge of the horizontal clock 5, the Y drive circuit 10 changes the Y selection voltage to the line voltage Y2゜Y3...Y2.
It shifts to O0. At this time, in each one horizontal period, the X drive circuit 8 outputs a display ON or display OFF voltage to the X display voltages X1 to X640 according to the display data of the second and third lines. In the Y drive circuit 10,
By “1” or “0” of the M signal 15, the Y selection voltage and the Y
Since the level of the non-selection voltage is alternated, the selection is from 2 levels to 1 level. The liquid crystal panel 8 has an X display voltage of 1 dot (X1-X640) and a line voltage of Y1 to Y2.
The effective value of the potential difference at the intersection of O0 turns on the display of that dot.
N state 9 indicates OFF state. Next, the applied waveform will be explained in detail using FIGS. 3 to 6. Note that, due to the description of the waveform diagram, the description will be made in terms of 10 lines on one screen. FIG. 3 shows four levels of voltages ■1 to V4 of X voltage 9. Two-level voltage V5 of Y voltage 12. This is a diagram showing the relationship between the potential differences between V6 and V5. V, , vg, v, , v2 are set with a potential difference of V with each V 6 at the center. As shown in FIG. 4, these voltages are used in different ways depending on whether the M signal 15 is "0" or "1".
When signal 15="0", ■1 is XON voltage, v is XO
FF voltage, V6 is Y non-selection voltage, v is Y selection voltage, and when M signal 15="1", ■2 is XON voltage, V,
is the X0FF voltage, 6 is the Y selection voltage, and V5 is the Y non-selection voltage. Now, the row of X display voltage X1 is displayed ON and displayed O
If the first dot whose display is ON after repeating FF is dot A, the voltage applied waveform will be 1 in Fig. 5.
As shown in the frame, when the M signal 15="1", the line voltage Yl is set to the Y selection voltage V6 in the first horizontal period.
．． The X display voltage X1 becomes the display ON voltage V2, and the dot A
A voltage of v6-v2=v, +v is applied to , and the following 1
During the horizontal return, the line voltage Y1 becomes the Y non-selection voltage 6, the X display voltage XI becomes the display OFF voltage 4, and the dot A is applied with V, -V, = -V, and the next 1 During horizontal return, the line voltage Y1 becomes the Y non-selection voltage 5 as in the second line, the X display voltage X1 becomes the display ON voltage v2, and v, -v2=V is applied to the dot A. Thereafter, the applied voltages of the second and third lines are repeatedly applied up to the 10th line.Next, the applied waveform of dot A when the M signal 15 is "0" is as shown in the second frame of FIG. In the first line, the line voltage is Y selection voltage V5.
Since the display voltage Xi is the X0IJ voltage Vl, V5-V,
=, -(vb +v,), and on the second line, line voltage Y1 is Y non-selection voltage V, , X display voltage X1 is X0
Since the FF voltage is V, -V3=V. On the third line, line voltage Y1 is equal to Y as on the second line.
The non-selection voltage V6° and the X display voltage XI become the XON voltage ■1, which is V6-V.

-1■, yell. That is, in the case of M signal 15 - "0", when the line voltage is the selection voltage, and the display dot is ON, "-(■5 +■, )" is applied, and the non-selection voltage is In this case, "-■6" is applied when the display state of the other dots is ON, and "v," is applied when the display state of the other dots is OFF. That is, in the case of the M signal 15-"0", the applied waveform is a waveform with the polarity of the applied waveform of M-"'l" reversed.

Next, in the row of X display voltage
As shown in the frame, when M=“1”, the line selection voltage Yl is the Y selection voltage V6 in the first horizontal period.
Therefore, since the display is OFF, the X display voltage X2 is
Since the OFF voltage is higher than 4, the applied voltage is v6-v4'
=v, -v.

From the second line onwards, the line voltage Y1 is the Y non-selection voltage V,
, X display voltage X2 is all display OFF, so X0
Since the FF voltage becomes 4, V, -V, = -■.

In the second frame, since the M signal 15 is "0", the line voltage Y1 = Y is applied to dot B in the first horizontal period.
Selection voltage V,, X display voltage X 2 = X0FF voltage V
3, so V, -V, = -(V, -V,), and from the second line onwards, the line voltage Y1 = Y non-selection voltage V,,X
Display voltage = XOFF voltage V, the time V, −V,
=V.

is applied. Therefore, to dot B, M signal 15=
In the case of "l", when the line voltage Y1 is the selection voltage (V, -
When V,) is a non-selection voltage, an applied voltage of 1 is applied, and when the M signal 15-"O" is applied, the waveform becomes a waveform with the polarity of the applied waveform of M-"l" reversed.

To summarize the above, when the M signal 15 is "1", when a certain dot is selected (when the line voltage is the Y selection voltage), the display O
In the case of N (■. 10 ■,) 1 In the case of display OFF (V, -
V, ) is applied as the applied voltage when it is not selected (when the line voltage is the Y non-selection voltage), when the X display voltage is the XON voltage, V, and when it is the X0FF voltage, -V is applied. M signal 15="
0'', the applied voltage with the polarity reversed is applied. Therefore, in the voltage averaging method, the applied voltage when not selected is IV, 1 regardless of the X display voltage at that time.
Effective value is always constant, display ON, display OFF
is the applied voltage 1 (vb+v,)l at the time of selection.

Controlled by 1Vb-V, l.

As explained above, dots A and B in FIG. 5 are displayed in the display ON and OFF states, respectively, but when the applied waveform of dot A and the applied waveform of dot B are compared, their frequency components are different. If there is a difference in frequency components as described above, the number of occurrences of voltage distortion due to a transient phenomenon at the time of voltage waveform switching differs, resulting in uneven display. Therefore, in the liquid crystal display device, the horizontal clock 5 is connected to the divider 1G as shown in FIG.
The M signal 15 is switched every several lines by using the polarity of the voltage applied to the liquid crystal with "1" and "0" of the M signal 15. Figure 6 shows dots A and B in Figure 5.
On the other hand, these are the applied voltage waveforms when the M signal i5 is switched every three lines and the frequency components are made close to each other. In this way, the M signal 15 is switched every few lines to suppress the occurrence of display unevenness. However, the number of lines in the period of the M signal 15 has an optimal value that depends on the total number of lines in one frame. For example, for 200 lines, 13 lines,
For 240 lines, there is an example of a line period of 21 lines.

(Problems to be Solved by the Invention) In the above-mentioned prior art, the number of lines in the cycle of the M signal 15 is fixed, and switching and displaying screens with different total numbers of lines on one screen was not considered.

For example, when using a liquid crystal display device on a personal computer, since the personal computer is based on a CRT, some computers use a blanking period in which no display is performed and perform software processing. The total number of lines is increasing. For example, in a 400-line display, the total number of lines is 4.
If the number of display lines is different, such as 400 lines in an 80-line display or a 350-line display, the number of display lines will also be different.

Therefore, when switching and displaying different numbers of display lines on the same liquid crystal display device, it is necessary to change the cycle of the M signal [5]. However, in conventional liquid crystal displays, this point has not been taken into consideration.

An object of the present invention is to provide a liquid crystal display device that always generates an optimal M signal 15 and provides good display even when switching and displaying different total lines.

(Means for Solving the Problems) The above object can be achieved by automatically detecting the total number of lines and generating the signal 15 that switches at the cycle of the optimum number of lines.

[Effect]

The total number of lines on one screen can be obtained by counting the horizontal clock between the periods of the first signal 11, and according to the count value, the optimal number of lines can be given as the period of the frequency divider that generates the M signal I5. , even if the total number of lines on the display screen is different, the optimal M signal 15 can always be obtained.

[Examples] Examples of the present invention will be described below with reference to FIGS. 1 and 7 to 10. FIG. 1 shows a liquid crystal display device to which an embodiment of the present invention is applied, and 14 uses a leading signal 111 and a horizontal clock 5 to detect the total number of lines and generate an M signal 15 with a period corresponding to the optimum number of lines. In the M generation circuit, other symbols are
Same as Figure 2. FIG. 7 is a block diagram of one embodiment of the M generation circuit 14, in which 17 is a line counter, ]8 is a frame clear signal, and 19 is an output of the line counter 17 for directing the line count.

20 is a line latch, 21 is the output of the line latch 20 and is a line value, 22 is an M decoder that decodes the optimum number of lines according to the line value of the line value 21, and 23 is an output of the M decoder 22 and is the number of M periodic lines. , 24 is an M frequency divider that divides the horizontal clock 5 by a period of 23 M period lines. FIG. 8 is a timing diagram explaining the operation of the M generation circuit j4 in FIG. The value 27 is a comparator that compares the number of M period lines 23 and the frequency division value 26, and when they are equal, sets the equal signal 28 to l'';
29 is a flip-flop A, 30 is its output M clock, 31 is N0TA which inverts the M clock 30, 32
1. tN0TA3] is a frequency division clear signal, 33 is N0TB which inverts the horizontal clock 5, 34 is an inverted horizontal clock, and 35 is a flip-flop B.

In FIG. 1, display data l is sequentially fetched into the data latch circuit by the data clock 2, and when horizontal data is fetched, that data is fetched into the horizontal latch circuit 6 at the falling edge of the horizontal clock 5. . The l horizontal data 7, which is the output of the horizontal latch circuit 6, is changed sequentially at the falling edge of the horizontal clock 5, and the “0”
1 level is selected from 4 levels of X voltage 9 by the combination of
is output as Yw, the dynamic circuit IO takes in "1" of the first line signal 11 at the falling edge of the horizontal clock 5, sets the line voltage Y1 as the Y selection voltage, and then sets the Y selection voltage at the subsequent falling edge of the horizontal clock 5. Line voltage Y2. It shifts to Y3... Note that the line voltages other than the line voltages that are Y selection voltages are Y non-selection voltages.

Further, the levels of the Y selection voltage and the Y non-selection voltage are alternately changed by the M signal 15. Therefore, the Y drive circuit 10 selects one level by the above shift operation using the two-level Y voltage and by 1'' and ``O'' of the M signal I5. The liquid crystal panel 10 has an X display voltage x1 to x640 and a line voltage Y
The display turns on depending on the effective value of the potential difference at the intersection of 1 to Y2O0,
Displays display OFF.

The above is the same operation as in the conventional example, but next, the operation of the M generation circuit 14, which is a feature of the present invention, will be explained.

The M generation circuit 14 can be realized with the configuration shown in FIG. 7, and its operation will be explained using FIG. 8. Note that for reasons of drawing, one screen will be described as an IO line.

The line counter 17 has a horizontal clock 5 and a leading signal 11.
It is set to "1" by the "0" level of the clear signal 18 of the NAND output of , and is then sequentially counted up by the rising edge of the horizontal clock 5. As shown in FIG. 8, the line count value 1 which is the output of the line counter 17
9 reaches "10°", the head signal 11 rises to "1", and the value "10" of the line count value 19 at that time is latched into the line latch 20 at the rise of the head signal 11.

As a result, the line value 21 becomes °“io”. The line value 21 is updated every frame by the entrusting operation, but
It remains constant unless the total number of lines on the screen is changed. or,
Conversely, if the total number of lines on the screen is changed, the line value 21 will be updated with a delay of one frame period at most.

In accordance with the line value 21, the M decoder 22 sets a value that is smaller by 1'' than the number of lines in the period of the optimal M signal 15 to M.
Output as 23 periodic lines. Next, the operation of the M frequency divider 24 will be explained with reference to FIGS. 9 and 10, assuming that the period of the M signal 15 is 5 lines, and therefore the number of M period lines 23 is "4". In FIG. 9, the frequency dividing counter 25 is
As shown in FIG. 0, when the horizontal clock 5 is counted at the rising edge and its output, the frequency division value 26, becomes "4", the equal signal 28 output from the comparator 27 becomes "1",
The data is taken in by the flip-flop A29 at the rising edge of the inverted horizontal clock 34, that is, at the falling edge of the horizontal clock 5, and the M clock 30 is set to "1". As a result, the frequency division clear signal 32 becomes 7 "O" via the N0TA 31, the division counter 25 is cleared, and the frequency division value 26 becomes O". Therefore, the equal signal 28 also changes to "0" at that timing. Therefore, the M clock 30 becomes "0" at the next falling edge of the horizontal clock 5. By repeating the above, the rising edge of the M clock 30 becomes
As shown in FIG. 10, there are 5 horizontal clock cycles, and the flip-flop B35 divides the M clock 30 to generate the M signal 15, so the cycles of "1" and "O" are also 5.
The horizontal clock has a period of 5 lines.

According to the operation of the M generation circuit 14 explained above, by setting the M decoder 22, it is possible to obtain an M signal with a period of any number of lines by switching for each total number of lines on one screen, and to always obtain a good display. I can do things.

[Effects of the Invention] According to the present invention, M necessary for obtaining a good liquid crystal display
The number of periodic lines of the signal can be displayed as a different value for each total number of lines on one screen, and a liquid crystal display that is always good and has good display quality can be realized.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention, Fig. 2 is a block diagram of a conventional liquid crystal display device, Fig. 3 is a diagram showing the potential relationship between X voltage and Y voltage, and Fig. 4 is a diagram explaining the meaning of each voltage in Figure 3, Figure 5 is a liquid crystal applied voltage waveform diagram when the M signal changes every frame, and Figure 6 is a diagram showing the M signal changing every 3 lines. Figure 7 is a block diagram of one embodiment of the M generation circuit.
8 is a timing diagram explaining the operation of the M generation circuit in FIG. 7, FIG. 9 is a block diagram of one embodiment of the M frequency divider in FIG. 7, and FIG. 10 is a timing diagram for explaining the operation of the M frequency divider in FIG. FIG. 3 is a timing diagram illustrating the operation of the device. 1.Display data 2..Data clock 3.Data latch circuit 4 Latch data 5..Horizontal clock 6..Horizontal latch circuit 7.
・L horizontal data 8...Xff1 motion circuit 9...X
Voltage 10...Y drive circuit 11/start signal 12 Y voltage 13...LCD panel
14...M generation circuit 15...M signal
16. Frequency divider 17... Line counter 18... Frame clear signal 19... Line count value 20... Line latch 2j Line value 22
...M decoder 23・Number of M cycle lines 24
・・M frequency divider 25・Frequency division counter 26・・
・Frequency division value 27 - Comparator 28...Equal signal 3o...M clock

Claims (1)

[Claims] 1. X drive that captures one horizontal line of display data and selects and outputs one level of voltage from a plurality of levels by combining the one horizontal line of display data and an AC signal. circuit, and a Y drive circuit that uses a Y selection voltage to indicate which horizontal line of the liquid crystal panel the output of the X drive circuit corresponds to, the voltage output from the X drive circuit and the output from the Y drive circuit. In a liquid crystal display device that displays data on a liquid crystal panel by applying a potential difference between the current voltage and the voltage applied to the liquid crystal panel, the total number of lines for one screen is automatically detected and the number of lines in the cycle of the AC signal is switched. 1. A liquid crystal display device comprising an alternating current signal generating circuit, wherein when the total number of lines on a display screen changes to a different value, the number of lines in the cycle of the alternating current signal automatically changes to a different value. 2. The liquid crystal display device according to claim 1, wherein the AC signal generation circuit automatically detects the total number of lines to be displayed based on a head signal indicating the head of the screen and a horizontal clock. Device.