JPH04196215A - Semiconductor device - Google Patents

Abstract

PURPOSE:To form transistors whose VTH is different on the same chip by performing one ion implantation operation to a channel region by a method wherein the film thickness of a gate electrode is changed on the same chip. CONSTITUTION:A photoresist 23 is patterned on a transistor 32 whose VTH is high. Only a gate electrode 24 for a transistor 32 whose VTH is low is etched anisotropically; its film thickness is made thin. Then, when N-type ions 26 are implanted, only the gate electrode 24 for the Tr 32 whose VTH is low can be made thin. One part 27 of the N-type ions 27 is passed through the gate electrode 24 and reaches a channel region 30; a channel concentration is lowered; an N<+> type diffusion layer 28 is formed. In this manner, the transistors 31 32 whose V is different can be formed on a silicon substrate 1. Thereby, by performing one ion implanttion operation to the channel region, it is possible to obtain a semiconductor device provided with two or more transistors whose VTH is different.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor device.

[Conventional technology]

FIG. 2 is a cross-sectional view of a conventional semiconductor device.
1 to (d) show manufacturing steps of the above semiconductor device.

In FIG. 2(a), P-type ions (2) such as poron are ion-implanted onto a P-type silicon substrate (1) to form a channel region (3). As a result, T on the lower side of VT□.

Determine the channel concentration of αG.

After patterning the OtoResist l-(4) in the same figure (in BL, low T, αG of V7H), P-type ions (5) such as holons are ion-implanted to form a channel region (6). P-type ion (2) (51 determines the channel concentration of T, 09 on the high side of V7H.

In the same figure (in Cl), after forming the gate insulating film (7) of the transistor on the channel region (3) (6), T7
Polysilicon containing phosphorus etc. (8) which becomes the gate electrode of
After depositing by chemical vapor deposition (VD), a second photoresist (9) is patterned to etch the gate electrode.

In fd) of the same figure, the polysilicon (8) is etched using the photoresist (9) as a mask, and then the resist is removed to form a gate electrode α0). Gate electrode α0
), when implanting N-type ions OD such as A5 for forming the source/train of the transistor, the film thickness is made so that the ions cannot penetrate, so the gate electrode α0) is used as a mask to form an N'' diffusion 0■. do.

Therefore, the channel concentration of the channel region (14) of the transistor αF5 on the low V't□ side is lower than the channel region 03 of the transistor 09 on the high V7H side, and the transistors with different V7H are connected to the same P-type substrate. You can make it up.

[Invention or problem to be solved]

In conventional semiconductor devices, in order to create transistors with different VT□, ions must be implanted into the channel region more than once to change the channel concentration directly under the gate insulating film, which makes the operation complicated. There was a problem with that.

The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a semiconductor device having two or more transistors with different VT□ by one ion implantation into a channel region.

[Means to solve the problem]

The device according to the present invention is formed by etching the gate electrode of the MOS field effect transistor in at least a partial region on the same semiconductor substrate after forming the gate electrode of the MOS field effect transistor, and having a film thickness of two or more. It is characterized by becoming.

[Effect]

In a typical transistor, semiconducting ions are implanted into the substrate through a self-alignment line using the gate electrode as a mask to form a source/train diffusion layer of the transistor. For this reason, the film thickness of the gate electrode is made uniformly thick over the entire surface so that ions do not penetrate the gate electrode even slightly during ion implantation.

In the semiconductor device of the present invention, in order to obtain transistors with different VT, the film thickness of the gate electrode of the lower V7H transistor is thinner than that of the higher V7H transistor. The thickness of the gate electrode film is such that some of the ions (conductivity type opposite to that of the silicon substrate) can penetrate through the gate electrode and the gate insulating film, reach the channel region, and change the channel concentration.

The ease with which ions penetrate during ion implantation is determined by the range (R5
), and it depends on the ion species, the acceleration voltage of the ions, and the substance that it penetrates.

〔Example〕

Hereinafter, this invention will be explained based on the drawings.

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIGS. 1A to 1E show manufacturing steps of the semiconductor device.

In FIG. 1(a), P-type ions (21) such as holons are implanted onto a P-type silicon substrate (1), and a channel region (
22). This determines the channel concentration of the high V 7H transistor (31).

In Figures (b) and (C), the gate insulating film (7),
Polysilicon (8), photoresist (9), and gate electrode 00) are formed.

In the same figure (d), a transistor (3
0) Pattern the upper photoresist (23),
Using the photoresist (23) as a mask, only the gate electrode (24) of the low VTH transistor (32) is subjected to heterochromatic etching to reduce the film thickness.

In the same figure (e), when N-type ions (26) such as A8 are implanted, only the gate electrode (24) of (32) is thinned, so that only the gate electrode (24) of (32) is thinned. 27) penetrates the gate electrode (24) and reaches the channel region (30), reducing the channel concentration. Also N3
A type diffusion layer (28) is formed. In this way, transistors (31) and (32) of different sizes can be fabricated on the silicon substrate (1).

In FIG. 1(b), the film thickness of polysilicon deposited by CVD etc. is determined by the range of ions (26) (PrQjeCI
ion Range). On the other hand, in FIG. 1(d), T on the lower side of VT□ is (3
The gate electrode (24) of 2) was etched to reduce the film thickness.

Therefore, some of the ions (27) during ion implantation penetrate through the electrode (24) and the gate insulating film (7) and reach the channel region (3o) at the lower T of VT□ (32).

Some of the ions (27) are of the N type and therefore have a conductivity type opposite to that of the channel region, and their penetration reduces the impurity concentration in the channel region (27). Therefore, compared to T, (31), which does not cause penetration, T, (32) has a lower VTN, and
You can make different ■A, T,.

Further, the proportion (probability) of ions causing penetration is determined by the film thickness of the gate electrode. In other words, V
Control of TN is caused by the thickness of the polysilicon gate electrode (24). In addition, the probability of penetration is determined by the molecular weight of the ion and the acceleration voltage of the ion, so V
T) I also changes depending on the molecular weight of the ion and the acceleration voltage of the ion.

In the above embodiment, an N-channel transistor on a P-type silicon substrate is shown, but a P-channel transistor on an N-type silicon substrate may be used.

Alternatively, an N-channel transistor or a P-channel transistor on a well may be used.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to fabricate transistors with different VTHs on the same chip by changing the film thickness of the gate electrode on the same chip and by performing ion implantation into the channel region once. It has the effect of being easy to operate.

[Brief explanation of the drawing]

FIGS. 1(a) to (el) are cross-sectional views of a semiconductor device according to an embodiment of the present invention, and FIGS. 2(a) to (d) are cross-sectional views of a conventional semiconductor device. In the figures, (21) is a P-type ion, (22), (2
9), (30) is the channel region, (23) is the photoresist, (24) is the gate electrode, (26) is the N type ion, (27) is a part of the N type ion, (28) is the N+ type diffusion layer. , (29), (30') l;! Channel area, (
31) and (32) are transistors. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] After forming the gate electrode of the MOS field effect transistor,
1. A semiconductor device characterized in that gate electrodes of MOS field effect transistors in at least some regions on the same semiconductor substrate are etched and have two or more different film thicknesses.