JPH04192466A - Semiconductor substrate and manufacture thereof - Google Patents
Semiconductor substrate and manufacture thereofInfo
- Publication number
- JPH04192466A JPH04192466A JP32463490A JP32463490A JPH04192466A JP H04192466 A JPH04192466 A JP H04192466A JP 32463490 A JP32463490 A JP 32463490A JP 32463490 A JP32463490 A JP 32463490A JP H04192466 A JPH04192466 A JP H04192466A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- semiconductor
- insulator
- layer
- insulator layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 105
- 239000000758 substrate Substances 0.000 title claims abstract description 74
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000012212 insulator Substances 0.000 claims abstract description 38
- 239000010409 thin film Substances 0.000 claims description 23
- 150000002500 ions Chemical class 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 7
- 239000007787 solid Substances 0.000 claims description 4
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 238000005229 chemical vapour deposition Methods 0.000 claims description 2
- 238000009740 moulding (composite fabrication) Methods 0.000 claims 1
- 230000005669 field effect Effects 0.000 abstract description 12
- 230000006866 deterioration Effects 0.000 abstract description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 6
- 239000013078 crystal Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000000779 depleting effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
Landscapes
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、特にSOI (Semiconducto
r On 1nsulator)構造の半導体基板およ
びその製造方法に関するものである。[Detailed Description of the Invention] [Field of Industrial Application] This invention is particularly applicable to SOI (Semiconductor
The present invention relates to a semiconductor substrate having a structure (on 1 nsulator) and a method for manufacturing the same.
従来のSo I (Semiconductor On
In5ulator)構造の半導体基板を第4図(a
l、 (blに基づいて説明する。Conventional So I (Semiconductor On
A semiconductor substrate with an in5ulator structure is shown in Figure 4 (a).
l, (explained based on bl.
第4図(al、 (b)は従来の半導体基板の構成を説
明するための断面図である。FIGS. 4A and 4B are cross-sectional views for explaining the structure of a conventional semiconductor substrate.
第4図(a)に示すように、従来の半導体基板Yは、半
導体基体5上に、例えば量化シリコン層(SiN層+
Sit N4層)または酸化シリコン層(SiCL層)
等からなる電気的に絶縁性の高い絶縁物N6が形成され
、この絶縁物層6上に半導体薄膜7か形成されたもので
あり、−船釣にS OI (Semic。As shown in FIG. 4(a), the conventional semiconductor substrate Y has a quantized silicon layer (SiN layer +
Sit N4 layer) or silicon oxide layer (SiCL layer)
A highly electrically insulating insulator N6 is formed, and a semiconductor thin film 7 is formed on this insulator layer 6.
nductor On In5ulator)構造の半
導体基板と呼ばれている。It is called a semiconductor substrate with an inductor-on-inductor structure.
なお、半導体基体5がシリコン単結晶(S i)からな
る場合には、絶縁物層6およびこの絶縁物層6上に形成
した半導体薄膜7は、主に単結晶の形で被着される。Note that when the semiconductor substrate 5 is made of silicon single crystal (Si), the insulating layer 6 and the semiconductor thin film 7 formed on the insulating layer 6 are mainly deposited in the form of a single crystal.
そして、このような半導体基板Yを用いて、第4図(b
)に示すように、半導体薄膜7上にゲート酸化膜8およ
びゲート電極9が形成され、また半導体薄膜7中に不純
物をイオン注入することによりドレインlOおよびソー
ス11が形成される。これにより、電界効果型トランジ
スタ等に代表される半導体装置が形成される。Then, using such a semiconductor substrate Y, as shown in FIG.
), a gate oxide film 8 and a gate electrode 9 are formed on the semiconductor thin film 7, and a drain lO and a source 11 are formed by ion-implanting impurities into the semiconductor thin film 7. As a result, a semiconductor device typified by a field effect transistor or the like is formed.
近年、このようなS OT (Semiconduct
or On 1nsulator)構造の半導体基板Y
を有した電界効果型トランジスタ等に代表される半導体
装置において、半導体基板Yの表面部分となる半導体薄
膜7には、膜厚0.l〔μm〕以下の極めて薄いものか
用いられている。これにより、ゲート電極9の下部の活
性領域全域を空乏化することにより、駆動力等の性能を
飛躍的に向上させた電界効果型トランジスタを得ている
。In recent years, such SOT (Semiconductor
or On 1nsulator) structure semiconductor substrate Y
In a semiconductor device typified by a field effect transistor or the like, the semiconductor thin film 7 forming the surface portion of the semiconductor substrate Y has a film thickness of 0. Extremely thin materials of 1 [μm] or less are used. As a result, by depleting the entire active region under the gate electrode 9, a field effect transistor is obtained in which performance such as driving force is dramatically improved.
しかしなから、このように駆動力の高い電界効果型トラ
ンジスタは、ゲート電極9の下部のソース11およびド
ルイン10間のチャネル領域すなわち活性領域に大電流
が流れることにより、キャリアと電子、格子が衝突して
多くのフォノンを励起し、これにより発熱し素子全体が
高温になる。However, in a field effect transistor with such a high driving force, carriers, electrons, and lattices collide when a large current flows through the channel region, that is, the active region between the source 11 and the drain in 10 below the gate electrode 9. This excites many phonons, which generate heat and raise the temperature of the entire device.
高温になれば、フォノンによるキャリアの散乱か増大し
、キャリアの移動度か低下することにより、電界効果型
トランジスタの駆動力等の性能か低下する。このような
トランジスタ特性の劣化を防止するには、駆動時に素子
に発生する熱を効率良く発散させることが必要となる。When the temperature rises, scattering of carriers by phonons increases, carrier mobility decreases, and performance such as driving force of the field effect transistor decreases. In order to prevent such deterioration of transistor characteristics, it is necessary to efficiently dissipate the heat generated in the element during driving.
ところが、従来のSOI構造の半導体基板Yを有した電
界効果型トランジスタ等に代表される半導体装置は、ト
ランジスタの周囲が熱伝導度の低い絶縁物(例えば酸化
シリコン層等)に囲まれているため、駆動時に発生した
熱は良好に発散されず、ゲート電極9の下部の活性領域
が非常に高温になるという問題があった。なお、Sol
構造の半導体基板のうち、サファイア上にシリコンをエ
ピタキシャル成長させたS OS (Silicon−
On−3apphire)構造の半導体基板は除く。However, in semiconductor devices such as field-effect transistors that have a semiconductor substrate Y with a conventional SOI structure, the transistor is surrounded by an insulator with low thermal conductivity (for example, a silicon oxide layer). However, there is a problem in that the heat generated during driving is not dissipated well, and the active region under the gate electrode 9 becomes extremely hot. In addition, Sol
Of the semiconductor substrates with this structure, SOS (Silicon-) is made by epitaxially growing silicon on sapphire.
Semiconductor substrates with an on-3apphire structure are excluded.
この発明の目的は、上記問題点に鑑み、半導体装置の駆
動時に発生する熱を効率良く発散することにより半導体
装置を高性能に維持することのできる半導体基板および
その製造方法を提供することである。SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a semiconductor substrate and a method for manufacturing the same that can maintain high performance of a semiconductor device by efficiently dissipating heat generated when the semiconductor device is driven. .
請求項(11記載の半導体基板は、半導体基体と、この
半導体基体上に形成した良熱伝導性および高電気抵抗性
の絶縁物からなる絶縁物層と、この絶縁物層上に形成し
た半導体薄膜とを備えたものである。The semiconductor substrate according to claim 11 comprises a semiconductor substrate, an insulating layer formed on the semiconductor substrate and made of an insulator having good thermal conductivity and high electrical resistance, and a semiconductor thin film formed on the insulating layer. It is equipped with the following.
請求項(2)記載の半導体基板の製造方法は、半導体基
体の表面に、絶縁物形成用イオンを照射することにより
、半導体基板中に良熱伝導性および高電気抵抗性の絶縁
物層を形成するとともに絶縁物層上に半導体基板の一部
からなる半導体薄膜を残存させることを特徴とする
請求項(3)記載の半導体基板の製造方法は、固体基体
の表面に化学気相成長法またはスパッタ法により良熱伝
導性および高電気抵抗性の絶縁物からなる絶縁物層を形
成し、この絶縁物層上に半導体薄膜を形成する。The method for manufacturing a semiconductor substrate according to claim (2) includes forming an insulator layer with good thermal conductivity and high electrical resistance in the semiconductor substrate by irradiating the surface of the semiconductor substrate with ions for forming an insulator. The method for manufacturing a semiconductor substrate according to claim (3), characterized in that a semiconductor thin film consisting of a part of the semiconductor substrate is left on the insulating layer, the semiconductor substrate is formed by chemical vapor deposition or sputtering on the surface of the solid substrate. An insulator layer made of an insulator with good thermal conductivity and high electrical resistance is formed by a method, and a semiconductor thin film is formed on this insulator layer.
この発明の構成によれば、半導体基体と、この半導体基
体上に形成した良熱伝導性および高電気抵抗性の絶縁物
からなる絶縁物層と、この絶縁物層上に形成した半導体
薄膜とを備えることにより、半導体基板に発生した熱を
良熱伝導性の絶縁物層から半導体基体方向に効率良く発
散させることができる。According to the structure of the present invention, a semiconductor substrate, an insulator layer formed on the semiconductor substrate and made of an insulator having good thermal conductivity and high electrical resistance, and a semiconductor thin film formed on the insulator layer are provided. By providing this, heat generated in the semiconductor substrate can be efficiently dissipated from the insulating layer having good thermal conductivity toward the semiconductor substrate.
この発明の一実施例を第1図ないし第3図に基づいて説
明する。An embodiment of the present invention will be described based on FIGS. 1 to 3.
第1図はこの発明の一実施例の半導体基板の構成を示す
断面図である。FIG. 1 is a sectional view showing the structure of a semiconductor substrate according to an embodiment of the present invention.
第1図に示すように、半導体基板Xは半導体基体1と、
この半導体基体1上に形成した良熱伝導性および高電気
抵抗性の絶縁物からなる絶縁物層2と、この絶縁物層2
上に形成した半導体薄膜3とを備えたものである。As shown in FIG. 1, a semiconductor substrate X includes a semiconductor substrate 1,
An insulator layer 2 made of an insulator with good thermal conductivity and high electrical resistance formed on this semiconductor substrate 1;
It is provided with a semiconductor thin film 3 formed thereon.
絶縁物層2を構成する絶縁物は、窒化アルミニウムまた
は窒化アルミニウムとシリコンとの複合体であり、半導
体薄膜3は、シリコン単結晶またはシリコン多結晶であ
る。The insulator constituting the insulator layer 2 is aluminum nitride or a composite of aluminum nitride and silicon, and the semiconductor thin film 3 is silicon single crystal or silicon polycrystal.
このように構成した半導体基板Xの半導体薄膜3に従来
と同様の電界効果型トランジスタ(図示せず)を形成し
、この電界効果型トランジスタを駆動した場合、トラン
ジスタを構成するゲート!極の下部の活性領域で発生し
た熱は、絶縁物層2から半導体基体1方向に効率良く発
散する。したがって、トランジスタの周辺付近の温度は
上昇することなく、温度上昇によるトランジスタ特性の
劣化を防止することができる。When a conventional field effect transistor (not shown) is formed on the semiconductor thin film 3 of the semiconductor substrate X configured in this manner and this field effect transistor is driven, the gates forming the transistor! The heat generated in the active region at the bottom of the pole is efficiently dissipated from the insulating layer 2 toward the semiconductor substrate 1. Therefore, the temperature near the periphery of the transistor does not rise, and deterioration of transistor characteristics due to temperature rise can be prevented.
第2図(al〜(C)はこの発明の第1の実施例の半導
体基板の製造方法を説明するための断面図である。FIGS. 2A to 2C are cross-sectional views for explaining the method of manufacturing a semiconductor substrate according to the first embodiment of the present invention.
第2図falに示すSi(シリコン)等の半導体基体l
に、第2図(blに示すように、絶縁物形成用イオン4
となるアルミニウム(1)イオンおよび窒素(N)イオ
ンを照射することにより、半導体基体1中に絶縁物層2
を形成するとともに絶縁物層2上に半導体基体1の一部
からなる半導体薄膜3を残存させる(第2図(C)参照
)。Semiconductor substrate l such as Si (silicon) shown in Figure 2 fal
As shown in FIG. 2 (bl), insulator forming ions 4
By irradiating aluminum (1) ions and nitrogen (N) ions, an insulating layer 2 is formed in the semiconductor substrate 1.
At the same time, a semiconductor thin film 3 consisting of a part of the semiconductor substrate 1 is left on the insulator layer 2 (see FIG. 2(C)).
絶縁物層2はアルミニウム(1)、窒素(N)。The insulator layer 2 is made of aluminum (1) and nitrogen (N).
シリコン(S i)からなる混晶またはアモルファスか
らなり、良熱伝導性および高電気抵抗性の特性を有する
。It is made of mixed crystal or amorphous silicon (Si) and has good thermal conductivity and high electrical resistance.
絶縁物形成用イオン4の照射量は、半導体基体l中に注
入できる充分な量であり、例えばI Xl017(/a
n” ) 〜I X 10 ” (/an’ )である
。また半導体薄膜3の膜厚は、絶縁物形成用イオン4の
加速エネルギーの設定値により制御することができる。The irradiation dose of the insulator-forming ions 4 is a sufficient amount to be implanted into the semiconductor substrate l, for example, IXl017(/a
n") to IX10"(/an'). Further, the thickness of the semiconductor thin film 3 can be controlled by the set value of the acceleration energy of the insulator-forming ions 4.
また、半導体基体lに対する温度条件は、室温。Further, the temperature condition for the semiconductor substrate l is room temperature.
低温または高温状態である。また、この半導体基体1に
電気炉等の設備により熱処理を追加しても良い。The condition is low or high temperature. Further, heat treatment may be added to this semiconductor substrate 1 using equipment such as an electric furnace.
このように形成した半導体基板Xの表面の半導体薄膜3
に、電界効果型トランジスタ等に代表される半導体装置
(図示せず)を形成する。The semiconductor thin film 3 on the surface of the semiconductor substrate X formed in this way
Then, a semiconductor device (not shown) typified by a field effect transistor or the like is formed.
第3図(al〜(b)はこの発明の第2の実施例の半導
体基板の製造方法を説明するための断面図である。FIGS. 3A to 3B are cross-sectional views for explaining a method of manufacturing a semiconductor substrate according to a second embodiment of the present invention.
第3図fatに示す固体基体1′上に、第3図(blに
示すように、CVD法(化学気相成長法)等により窒化
アルミニウム(A I N)を堆積することにより、絶
縁物層2′を形成する。As shown in FIG. 3 (bl), an insulating layer is formed by depositing aluminum nitride (AIN) on the solid substrate 1' shown in FIG. 2' is formed.
この窒化アルミニウムからなく絶縁物層2′は良熱伝導
性および高電気抵抗性の特性を有する。This insulating layer 2', which is not made of aluminum nitride, has the properties of good thermal conductivity and high electrical resistance.
その後、この窒化アルミニウム(A I!N)からなる
絶縁物層2′上にCVD法またはスパッタ法により半導
体薄膜となるSi (シリコン)の薄膜(図示せず)を
形成し、第2図(C1と同様の構造の半導体基板を得る
。このような半導体基板に電界効果型トランジスタ等に
代表される半導体装置(図示せず)を形成する。Thereafter, a thin film of Si (silicon) (not shown), which will become a semiconductor thin film, is formed on the insulating layer 2' made of aluminum nitride (AI!N) by CVD or sputtering. A semiconductor substrate having a similar structure is obtained.A semiconductor device (not shown), typified by a field effect transistor or the like, is formed on such a semiconductor substrate.
なお、第2の実施例の半導体基板は、この半導体基板上
に形成するべき半導体装置が単結晶薄膜を必要としない
場合に用いられる。Note that the semiconductor substrate of the second embodiment is used when a semiconductor device to be formed on this semiconductor substrate does not require a single crystal thin film.
この発明の半導体基板およびその製造方法によれば、半
導体基板を半導体基体と、この半導体基体上に形成した
良熱伝導性および高電気抵抗性の絶縁物からなる絶縁物
層と、この絶縁物層上に形成した半導体薄膜とから構成
することにより、半導体基板に発生した熱を良熱伝導性
の絶縁物層から半導体基体方向に効率良く発散させるこ
とができる。その結果、この半導体基板を用いてトラン
ジスタ等を形成した半導体装置は、トランジスタを駆動
させても、トランジスタ周辺の温度が上昇することがな
い。したがって、温度上昇によるトランジスタ特性の劣
化を防ぐことができる。According to the semiconductor substrate and the manufacturing method thereof of the present invention, the semiconductor substrate includes a semiconductor substrate, an insulator layer formed on the semiconductor substrate and made of an insulator having good thermal conductivity and high electrical resistance, and the insulator layer. By forming the semiconductor thin film formed thereon, heat generated in the semiconductor substrate can be efficiently dissipated from the insulator layer with good thermal conductivity toward the semiconductor substrate. As a result, in a semiconductor device in which a transistor or the like is formed using this semiconductor substrate, the temperature around the transistor does not rise even when the transistor is driven. Therefore, deterioration of transistor characteristics due to temperature rise can be prevented.
第1図はこの発明の一実施例の半導体基板の構成を示す
断面図、第2図(al〜(C1はこの発明の第1の実施
例の半導体基板の製造方法を説明するための断面図、第
3図(a)〜(blはこの発明の第2の実施例の半導体
基板の製造方法を説明するための断面図、第4図(al
、 (blは従来の半導体基板の構成を説明するための
断面図である。
l、・・・半導体基体、l゛・・・固体基体、2,2′
・・・絶縁物層、3・・・半導体薄膜、4・・・絶縁物
形成用イオン
第2図
(c)
第3図
(a)
(b)FIG. 1 is a cross-sectional view showing the structure of a semiconductor substrate according to an embodiment of the present invention, and FIG. , FIGS. 3(a) to (bl) are cross-sectional views for explaining the method of manufacturing a semiconductor substrate according to the second embodiment of the present invention, and FIG.
, (bl is a cross-sectional view for explaining the structure of a conventional semiconductor substrate. l, ... semiconductor substrate, l゛ ... solid substrate, 2, 2'
... Insulator layer, 3... Semiconductor thin film, 4... Ion for forming insulator Fig. 2 (c) Fig. 3 (a) (b)
Claims (3)
伝導性および高電気抵抗性の絶縁物からなる絶縁物層と
、この絶縁物層上に形成した半導体薄膜とを備えた半導
体基板。(1) A semiconductor substrate comprising a semiconductor substrate, an insulator layer made of an insulator with good thermal conductivity and high electrical resistance formed on the semiconductor substrate, and a semiconductor thin film formed on the insulator layer.
することにより、前記半導体基板中に良熱伝導性および
高電気抵抗性の絶縁物層を形成するとともに前記絶縁物
層上に前記半導体基板の一部からなる半導体薄膜を残存
させることを特徴とする半導体基板の製造方法。(2) By irradiating the surface of the semiconductor substrate with ions for forming an insulator, an insulator layer with good thermal conductivity and high electrical resistance is formed in the semiconductor substrate, and the semiconductor substrate is formed on the insulator layer. A method for manufacturing a semiconductor substrate, characterized in that a semiconductor thin film consisting of a part of the substrate remains.
法により良熱伝導性および高電気抵抗性の絶縁物からな
る絶縁物層を形成し、この絶縁物層上に半導体薄膜を形
成することを特徴とする半導体基板の製造方法。(3) Forming an insulator layer made of an insulator with good thermal conductivity and high electrical resistance on the surface of a solid substrate by chemical vapor deposition or sputtering, and forming a semiconductor thin film on this insulator layer. A method for manufacturing a semiconductor substrate, characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2324634A JP3071818B2 (en) | 1990-11-26 | 1990-11-26 | Semiconductor substrate manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2324634A JP3071818B2 (en) | 1990-11-26 | 1990-11-26 | Semiconductor substrate manufacturing method |
Publications (2)
Publication Number | Publication Date |
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JPH04192466A true JPH04192466A (en) | 1992-07-10 |
JP3071818B2 JP3071818B2 (en) | 2000-07-31 |
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JP2324634A Expired - Fee Related JP3071818B2 (en) | 1990-11-26 | 1990-11-26 | Semiconductor substrate manufacturing method |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7005671B2 (en) | 2001-10-01 | 2006-02-28 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device, electronic equipment, and organic polarizing film |
US7465482B2 (en) | 2001-10-10 | 2008-12-16 | Semiconductor Energy Laboratory Co., Ltd. | Film, packaging material, container, lens, window, spectacles, recording medium, and deposition apparatus |
-
1990
- 1990-11-26 JP JP2324634A patent/JP3071818B2/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7005671B2 (en) | 2001-10-01 | 2006-02-28 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device, electronic equipment, and organic polarizing film |
US7800099B2 (en) | 2001-10-01 | 2010-09-21 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device, electronic equipment, and organic polarizing film |
US7465482B2 (en) | 2001-10-10 | 2008-12-16 | Semiconductor Energy Laboratory Co., Ltd. | Film, packaging material, container, lens, window, spectacles, recording medium, and deposition apparatus |
Also Published As
Publication number | Publication date |
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JP3071818B2 (en) | 2000-07-31 |
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