JPH04188833A - Wiring formation method - Google Patents

Abstract

PURPOSE:To avoid the formation of hillocks and voids by a method wherein a first aluminum film is deposited to be etched back while a second aluminum film is deposited on the first aluminum film to form a wiring pattern and then a passivation film is deposited on the whole surface. CONSTITUTION:An interlayer insulating film 11 is provided on a silicon substrate 10 and then a contact hole is made in the film 11 to expose an impurity diffused layer 10a. Next, the first aluminum film 12 deposited in the contact hole is heat-treated to bring the layer 10a into ohmic contact with the film 12. Next, the film 12 is etched back to be left in the contact hole. Next, a second aluminum film 14 is deposited on the films 12, 11 so as to pattern the aluminum wiring. Next, a passivation film 15 is deposited on the whole surface. Through these procedures, the whole body need not be heat-treated after the formation of the film 15 thereby enabling the formation of hillocks and voids due to the difference in the thermal expansion coefficient to be avoided.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming wiring, and more particularly to a method for forming aluminum-based wiring in a manufacturing process of a semiconductor device.

[Summary of the Invention] The present invention provides a method for forming a wiring that makes contact with an underlying wiring across an insulating film, which includes a step of depositing a first aluminum-based film in a wiring opening formed in an insulating film, and a heat treatment. a step of applying said first
a step of etching back the aluminum-based film, a step of depositing a second aluminum-based film on the etched-back first aluminum-based film, and a step of forming a wiring pattern and depositing a passivation film. This reduces voids and hillocks caused by the difference in thermal expansion coefficient between the passivation film and the aluminum-based wiring.

[Prior Art] Conventionally, as shown in FIG. 2, in a method for forming this type of wiring, a 5iOz insulating film 2 is first formed on a silicon substrate 1, and then this S i O is formed as an insulating film 2. A contact hole 2a is opened to expose the impurity diffusion layer 1a formed in the silicon substrate l. Next, an aluminum film 3 is formed in the contact hole 2a and on the Sin and insulating film 2 by, for example, bias sputtering, and then wiring is patterned. Then, after forming, for example, a SiN-based paving film 4 on the patterned aluminum film 3 by plasma CVD, for the purpose of obtaining ohmic contact between the impurity diffusion layer 1a and the aluminum film 3,
In order to eliminate dangling voids in the device, 40
A heat treatment (called sintering when carried out in a hydrogen atmosphere) is performed by applying a temperature of about 0 to 430° C. for several minutes.

[Problems to be Solved by the Invention] However, in such a conventional wiring formation method, stress concentration due to the difference in thermal expansion coefficient between the aluminum film 3 and the passivation film 4 occurs during heat treatment. A protruding hillock 3a as shown in FIG.
There was a problem in that voids 5 as shown in the figure were generated. In particular, hillocks include vertical hillocks (particle hillocks) as shown in Figure 2, as well as lateral hillocks (lateral hillocks) that protrude in the width direction of the wiring, and these hillocks can cause short circuits with other wiring. and impede reliability. Further, voids have the problem of causing disconnection of wiring and the like.

In addition, as a method to suppress the occurrence of hillocks, there is a method of coating the surface of the aluminum film with a high melting point metal or a high melting point metal compound such as TiSi, but this increases the number of manufacturing steps and is difficult to perform etching. However, since it is difficult to form a high melting point metal or the like on the side surfaces of the aluminum film with good coverage, there has been a problem in that hillock growth on the side surfaces cannot be suppressed.

The present invention was devised in view of these conventional problems, and aims to provide a method for forming wiring that does not cause hillocks or voids between the passivation film and the aluminum-based wiring.

[Means for Solving the Problems] Therefore, the present invention provides a step of depositing a first aluminum-based film in a wiring opening formed in an insulating film, a step of performing heat treatment, and a step of depositing a first aluminum-based film in an opening for wiring formed in an insulating film. , a step of depositing a second aluminum-based film on the etched-back first aluminum-based film, and a step of forming a wiring pattern and depositing a passivation film. , this is the solution.

[Operation] By performing heat treatment after depositing the first aluminum-based film, ohmic contact can be obtained between the underlying wiring and the first aluminum-based film. Further, at this time, A diffusion occurs in the A grains in the aluminum-based film, and hillocks grow. In the next etch-back process, the hillocks are removed and the first aluminum-based film is planarized. By depositing the second aluminum film, the film has a thickness suitable for wiring, and by patterning, an aluminum-based wiring is formed. Since no heat treatment is performed after the passivation film is deposited, hillocks and voids are avoided.

[Example] Hereinafter, details of the method for forming wiring according to the present invention will be described based on an example shown in the drawings.

First, in this example, a glabellar insulating film 11 made of 5iO7 is formed on a silicon substrate IO, and a contact hole lla is opened in the interlayer insulating film 11 using a well-known technique to diffuse impurities formed in the silicon substrate IO. Layer 10a is exposed.

Then, as shown in FIG. 1A, the first aluminum film 12 is formed into contact holes Ila by high-temperature sputtering.
Pile it up to a height that fills the inside.

Next, heat treatment (for example, at a temperature of 430°C for several tens of minutes)
sintering) to establish ohmic contact between the impurity diffusion layer 10a and the first aluminum film 12. At this time, hillocks 12λ grow on the surface of the aluminum film 12, as shown in FIG. 1B.

Next, as shown in FIG. 1C, the first aluminum film 1
Apply resist (mask material) on top of 2 and make it flat.
After etching back, an aluminum film 12 with a flat top surface is formed in the contact hole Ila as shown in FIG. 1D.
so that it remains.

Next, as shown in FIG. 1E, the first aluminum film 1
2 and glabellar insulation [second aluminum film I4 on 11]
is deposited again by the high-temperature suvabutsu method. Note that by performing high-temperature sputtering in this manner, the grain size of the aluminum film is increased and migration resistance is improved.

Thereafter, the aluminum wiring is patterned using lithography and etching techniques.

Next, as shown in FIG. 1F, a SiN-based passivation film I5, for example, is formed over the entire surface by plasma CVD.

Although the embodiments have been described above, the present invention is not limited thereto, and various design changes are possible.

For example, in the above embodiment, the present invention is applied to an example in which an impurity diffusion layer and an aluminum wiring are connected through a contact hole, but the present invention may also be applied to forming the uppermost wiring in a multilayer wiring structure. Of course it's good.

Further, in the above embodiment, the first aluminum film 1
2 was formed by high-temperature sputtering, but it may be formed by other methods such as plasma CVD.

Further, in the above embodiments, a SiN-based film was used as the passivation film, but the passivation film is not limited to this, and may include a plasma-excited SiO film, a plasma-excited TEO3 film, a sputtered 5
iOt! i etc. may also be used.

[Effects of the Invention] As is clear from the above explanation, according to the wiring formation method according to the present invention, there is no need to perform heat treatment after forming the passivation film, and the difference in thermal expansion coefficient between the passivation film and the aluminum film can be This has the effect of preventing the occurrence of hillocks and voids.

[Brief explanation of drawings]

1A to 1F are cross-sectional views showing each step of an embodiment of the wiring forming method according to the present invention, and FIGS. 2 and 3 are cross-sectional views of a conventional example. 11... Interlayer insulating film, 12.14... Aluminum film, +2a... Hillock, [5-river passivation film. 110 contact hole Figure 1 B (T, 3 'V') Figure 1 C (Pu (2 'I') Figure 1 D (P c, ii '1) Figure 1 F 4 feet 1st night 11th! Shimmenguchi A running from 1st night 11th sectional view Figure 3

Claims (1)

[Claims] (1) a step of depositing a first aluminum-based film in a wiring opening formed in an insulating film, a step of performing heat treatment, and a step of etching back the first aluminum-based film;
A second layer is formed on the first aluminum film that has been etched back.
1. A method for forming wiring, comprising: a step of depositing an aluminum-based film; and a step of forming a wiring pattern and depositing a passivation film.