JPH0418790A - Electronic device mounting method - Google Patents
Electronic device mounting methodInfo
- Publication number
- JPH0418790A JPH0418790A JP12246890A JP12246890A JPH0418790A JP H0418790 A JPH0418790 A JP H0418790A JP 12246890 A JP12246890 A JP 12246890A JP 12246890 A JP12246890 A JP 12246890A JP H0418790 A JPH0418790 A JP H0418790A
- Authority
- JP
- Japan
- Prior art keywords
- electronic device
- package
- lead wire
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 13
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000000853 adhesive Substances 0.000 claims abstract description 8
- 230000001070 adhesive effect Effects 0.000 claims description 6
- 229910000679 solder Inorganic materials 0.000 abstract description 15
- 230000002950 deficient Effects 0.000 abstract description 2
- 230000008646 thermal stress Effects 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011295 pitch Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、電子デバイスのプリント基板への実装方法
に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for mounting an electronic device on a printed circuit board.
第２図は、例えば雑誌（Ｊｏｕｒｎａ／！ｏｆ Ｍａｔ
ｅｒｉａｌＳｃｉｅｎｃｅ Ｖａｔ ｆ１２．ＮＱｌｌ
、１９８７年、第８９０１頁〜第８９０６頁）に示され
た従来の電子デバイスのプリント基板への実装方法ケ示
すものである。Figure 2 shows, for example, a magazine (Journa/!of Mat).
erialScience Vat f12. NQll
, 1987, pp. 8901-8906), the conventional method for mounting an electronic device onto a printed circuit board is shown.
図において、１１１はＩＣ−’ＰＬＳＩなどの電子デバ
イスのパッケージ、１２１ｉｄリード線、＋３１１’ｊ
プリント基板、＋４１１″ｉプリント基板（３）上に配
置されたパッド、＋７１ Ｆｉリード線１２）とパッド
（４）を接合するためのはんだである。In the figure, 111 is a package of an electronic device such as IC-'PLSI, 121id lead wire, +311'j
This is solder for joining the pad (4) to the pad (+71 Fi lead wire 12) placed on the printed circuit board, +411″i printed circuit board (3).
次に動作について説明する。パッケージ＋１１はプリン
ト基板１３）とリード（２１全介して接合されている。Next, the operation will be explained. The package +11 is bonded to the printed circuit board 13) through all the leads (21).
リード１２）はプリント基板（３）上に配置されたパッ
ド１４１にはんだ（７）により接合されている。The leads 12) are bonded to pads 141 arranged on the printed circuit board (3) by solder (7).
′ｉｔ子デバイスの接合及び電気的特性は、はんだ＋７
）による接合によって確保されている。'The bonding and electrical characteristics of the child device are solder +7
) is secured by joining.
従来の電子デバイスの実装方法は、以」二のようにはん
だを用いて接合されているため、パッケージとプリント
基板に温度差が生じると１両者の線膨張係数の差により
、リードの接合部に熱負加が力１わり、熱疲労破壊が生
じる問題点があった。また、はんだ接合部の強度を確保
するために、はんだの量？多くすると、リードピッチ間
ではんだが接触するプリクジがおこるなどの問題点があ
った。Conventional electronic device mounting methods use solder to bond the package and printed circuit board, so if there is a temperature difference between the package and the printed circuit board, the difference in linear expansion coefficients between the two causes the leads to bond at the joint. There was a problem in that the heat load was equal to 1 force, resulting in thermal fatigue failure. Also, the amount of solder to ensure the strength of the solder joint? If the number is increased, there are problems such as bulges where the solder contacts between the lead pitches.
この発明は、上記のような問題点を解消するためになさ
れたもので、はんだ接合部の熱疲労破壊やブリッジを防
止することのでき８′電子デバイスの実装方法全提供し
％信頼性の高い製品ヲ（＠ること金目的とする。This invention was made in order to solve the above-mentioned problems, and provides a complete mounting method for electronic devices that can prevent thermal fatigue failure and bridging of solder joints, and is highly reliable by 8%. Product wo (@ is aimed at making money.
Ｃの発明による、電子デバイスの実装方法はパッケージ
とプリント基板を接着材を用いて接合し％電子デバイス
の電気的特性は、リード線のばね力により確保するよう
にしたものである。In the method for mounting an electronic device according to the invention of C., the package and the printed circuit board are bonded together using an adhesive, and the electrical characteristics of the electronic device are ensured by the spring force of the lead wire.
この発明による電子デバイスの実装方法ではパッケージ
とプリント基板の接合に、はんだを用いず接着材全使用
し、また、電気的特性をリード線のは′ね力で、バッド
とリード線が接触接合することにより確保するので、は
んだ金柑いることによって生じる熱疲労破壊や、ブリッ
ジといった問題点が解消できる。In the electronic device mounting method according to the present invention, the package and the printed circuit board are bonded without using solder, and all adhesive materials are used, and the electrical characteristics are determined by the spring force of the lead wires, and the pads and the lead wires are brought into contact and bonded. Since the solder is secured by this method, problems such as thermal fatigue fracture and bridging caused by soldering can be solved.
以下、この発明の一実施例１ζよる電子デノ（イスの実
装方法を図について説明する。Hereinafter, a method for mounting an electronic device according to Embodiment 1ζ of the present invention will be explained with reference to the drawings.
第１図において、１１１はｌ＋１１えはｉＣやＬＳＩな
どの中、子デバイスのパッケージ、ｉ２１１ｉ ’）−
ド線、３）ハブリント配置されたプリント基板、（４）
はフリント水板１３１上に配置されたバッド、１６目づ
パッケージ目１とプリント基板１３）を接合するための
接着祠である。In Fig. 1, 111 is l+11, i211i')-
3) Printed circuit board with hub print placed, (4)
is an adhesive pad placed on the flint water plate 131 for bonding the 16th package 1 and the printed circuit board 13).
次に動作について説明する。Next, the operation will be explained.
パッケージ（１１ハブリント基板・３１上の規定の位首
ＶＣ１接庸祠１５）により接合する。リード線ｉ２１と
バンド、４１は、リード線のばね力によって接触接合す
る。このため、パッケージ山やプリント基板・３）に温
度変化が生じた場合、肉者の保膨張係数の差による熱応
力が発生せず、熱疲労破壊の問題点が解消できる。４た
はんだを使用しないので、リード（２１間のブリッジが
なくな９、不良率が大幅ＶＣ低減できる。They are bonded using a package (11 hub printed circuit board 31 with specified position VC1 bonding pad 15). The lead wire i21 and the band 41 are brought into contact with each other by the spring force of the lead wire. Therefore, when a temperature change occurs in the package stack or the printed circuit board (3), thermal stress due to the difference in coefficient of expansion does not occur, and the problem of thermal fatigue fracture can be solved. Since no solder is used, there is no bridge between the leads (21), and the defective rate can be significantly reduced.
リード（２１とバッド（４）の接合部を杷縁ラバーでコ
ーティングすれば、ｕＬ電気的特性十分に確保すること
ができる。If the joint between the lead (21 and the pad (4)) is coated with lumber rubber, sufficient uL electrical characteristics can be ensured.
以上のように、この発明によれ（げ、電子デバイスケプ
リント基板に接着材を用いて接合し、リード線のばね力
により電子デバイスの電気的特性を確保するようにした
ので、熱疲労破壊やプリクジといった従来のはんだ接合
を用いることによって生じる問題点を解消し、信頼性の
高い製品を得ることのできる電子デバイスの実装方法を
枦供できる効果がある。As described above, according to the present invention, an electronic device is bonded to a printed circuit board using an adhesive, and the electrical characteristics of the electronic device are ensured by the spring force of the lead wire. The present invention has the effect of solving the problems caused by using conventional solder joints such as solder joints, and providing a method for mounting electronic devices that allows highly reliable products to be obtained.
第１図はこの発明の一実施例による電子デバ・イスの実
装方法ＶＣより実装した電子デバイスとプリント基板を
示す断面図、第２図は従来のは／した接合により実装し
た電子デバイスとプリント基板を示す断面図である。
１１ｉ＠子デバイスのパッケージ、２１はリード。
３１はプリント基板、１４１ｉ’ｊバツド、・６）は接
着材である。
なお、図中、同一符号は１目」−又は（目当部分ｉ＝り
くｔｏFIG. 1 is a cross-sectional view showing an electronic device and a printed circuit board mounted by the electronic device mounting method VC according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing an electronic device and a printed circuit board mounted by a conventional fast bonding method. FIG. 11i@Child device package, 21 is lead. 31 is a printed circuit board, 141i'j butts, and 6) are adhesives. In addition, in the figure, the same reference numerals are "1" - or (target part i = rikuto
Claims (1)
板に接合すると共に、リード線のばね力により上記電子
デバイスと上記プリント基板間の電気的特性を確保する
ようにした電子デバイスの実装方法。A method for mounting an electronic device, in which a package of an electronic device is bonded to a printed circuit board using an adhesive, and electrical characteristics between the electronic device and the printed circuit board are secured by a spring force of a lead wire.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12246890A JPH0418790A (en) | 1990-05-11 | 1990-05-11 | Electronic device mounting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12246890A JPH0418790A (en) | 1990-05-11 | 1990-05-11 | Electronic device mounting method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0418790A true JPH0418790A (en) | 1992-01-22 |
Family
ID=14836598
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12246890A Pending JPH0418790A (en) | 1990-05-11 | 1990-05-11 | Electronic device mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0418790A (en) |
-
1990
- 1990-05-11 JP JP12246890A patent/JPH0418790A/en active Pending
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