JP2570468B2 - Manufacturing method of LSI module - Google Patents
Manufacturing method of LSI moduleInfo
- Publication number
- JP2570468B2 JP2570468B2 JP2144869A JP14486990A JP2570468B2 JP 2570468 B2 JP2570468 B2 JP 2570468B2 JP 2144869 A JP2144869 A JP 2144869A JP 14486990 A JP14486990 A JP 14486990A JP 2570468 B2 JP2570468 B2 JP 2570468B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- solder
- organic resin
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はLSIモジュールの製造方法に関し、特に電子
機器に用いられるICまたはLSIなどの集積回路の実装に
適用されるLSIモジュールの製造方法に関する。The present invention relates to a method for manufacturing an LSI module, and more particularly to a method for manufacturing an LSI module used for mounting an integrated circuit such as an IC or an LSI used in electronic equipment.
従来、この種のモジュールは複数のハンダバンプが形
成されたセラミックモジュールをセラミック・エポキシ
またはポリイミドなどからなるプリント配線基板表面に
直接ハンダ付けされた構造となっていた。Conventionally, this type of module has a structure in which a ceramic module on which a plurality of solder bumps are formed is directly soldered to the surface of a printed wiring board made of ceramic epoxy or polyimide.
すなわち、第３図に示すような従来技術による構成で
は、プリント配線基板10とセラミックチップキャリア20
とに生成されたハンダバンプ用パッド11・21の間に、ハ
ンダバンプ30をはさみ加圧・加熱して接合している。従
って、プリント配線基板10とセラミックチップキャリア
20との熱膨張差がハンダバンプ30に直接加わるため、し
ばしば接続不良につながっていた。特に、プリント配線
基板がエポキシまたはポリイミド等の樹脂基板の場合
は、その熱膨張差が著しく違うため全く使用不可能であ
り、さらにセラミック基板の場合でも、ハンダバンプの
品質・信頼性上は不安な点が残っていた。That is, in the configuration according to the prior art as shown in FIG.
The solder bumps 30 are sandwiched between the solder bump pads 11 and 21 generated as above, and are joined by pressing and heating. Therefore, the printed wiring board 10 and the ceramic chip carrier
Since the difference in thermal expansion from 20 is directly applied to the solder bump 30, it often leads to poor connection. In particular, if the printed wiring board is a resin board such as epoxy or polyimide, the difference in thermal expansion is so different that it cannot be used at all, and even if it is a ceramic board, the quality and reliability of the solder bumps are uncertain. Was left.
上述した従来のモジュールの製造方法は、LSIのセラ
ミックモジュールとプリント配線基板とが複数のハンダ
バンプ部分でのみ接続されているため、製造工程中の加
熱により、プリント配線基板とセラミックモジュールと
の熱膨張差から生じる応力が直接ハンダ接続部に加わ
り、ハンダ接続部の劣化・断線または接触不良を生じ、
品質・信頼性上の問題となっていた。In the conventional module manufacturing method described above, since the ceramic module of the LSI and the printed wiring board are connected only at a plurality of solder bumps, the difference in thermal expansion between the printed wiring board and the ceramic module due to heating during the manufacturing process. Is applied directly to the solder connection, causing deterioration, disconnection or poor contact of the solder connection,
This was a quality and reliability problem.
本発明の第一の発明のモジュールの製造方法は、内部
に多層配線を有するプリント配線基板の表面のうち予め
定められたところにハンダバンプ用パッドを形成する工
程と、前記プリント配線基板の表面の前記ハンダバンプ
用パッドが形成されないところに有機樹脂を形成する工
程と、前記プリント配線基板の表面の前記有機樹脂が形
成されないところにハンダバンプを形成する工程と、前
記有機樹脂とハンダバンプとの表面を研磨する工程と、
予め定められたところに有機樹脂とハンダバンプとが形
成され研磨されたセラミックチップキャリアを前記プリ
ント配線基板上に位置決めする工程と、前記位置決めさ
れたプリント配線基板とセラミックチップキャリアを加
熱・加圧してそれぞれのハンダバンプおよび前記有機樹
脂を接合させる工程とを備えて構成される。A method for manufacturing a module according to a first aspect of the present invention includes the steps of: forming a solder bump pad at a predetermined place on a surface of a printed wiring board having multilayer wiring therein; and forming the pad on the surface of the printed wiring board. A step of forming an organic resin where solder pad pads are not formed, a step of forming solder bumps where the organic resin is not formed on the surface of the printed wiring board, and a step of polishing the surface of the organic resin and solder bumps When,
A step of positioning the polished ceramic chip carrier on which the organic resin and the solder bumps are formed in a predetermined place on the printed wiring board, and heating and pressurizing the positioned printed wiring board and the ceramic chip carrier, respectively. Bonding the solder bumps and the organic resin.
本発明の第二の発明のLSIモジュールの製造方法は、
前記有機樹脂がポリイミド樹脂であることを備えて構成
される。The method for manufacturing an LSI module according to the second invention of the present invention,
The organic resin is a polyimide resin.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図は本発明の一実施例のモジュールの実装構造の
構成を示す断面図である。FIG. 1 is a sectional view showing the configuration of a module mounting structure according to an embodiment of the present invention.
第１図において、内部に多層配線を有しているセラミ
ックあるいはエポキシまたはポリイミドなどで形成され
たプリント配線基板10の表面の予め設計された部分に、
ハンダバンプ用パッド11およびハンダバンプ12、さらに
ハンダバンプ12の周囲にポリイミド樹脂などの有機樹脂
13が形成される。又、内部にLSIが実装・配線されてい
るセラミックチップキャリア20の、プリント配線基板10
と対向する面の予め設計された部分に、ハンダバンプ用
パッド21およびハンダバンプ22が形成され、さらにハン
ダバンプ22の周囲にポリイミド樹脂等の有機樹脂23が形
成される。かようにしてプリント配線基板と決められた
いくつかの位置で接合されたセラミックチップキャリア
の実装構造を示したものである。In FIG. 1, a pre-designed portion of the surface of a printed wiring board 10 formed of ceramic or epoxy or polyimide having a multilayer wiring inside,
Pad 11 for solder bump and solder bump 12, and organic resin such as polyimide resin around solder bump 12
13 is formed. The printed circuit board 10 of the ceramic chip carrier 20 in which the LSI is mounted and wired
A solder bump pad 21 and a solder bump 22 are formed on a pre-designed portion of the surface facing the solder bump 22, and an organic resin 23 such as a polyimide resin is formed around the solder bump 22. This shows a mounting structure of a ceramic chip carrier bonded to a printed wiring board at several determined positions.
この構造であれば、プリント配線基板とセラミックモ
ジュールとの熱膨張率の違いによる応力は、ハンダ接続
部の中間の有機樹脂の全てに分散されるため、ハンダ接
続部分の応力は減少されることになる。又、万一ハンダ
接続部に加わる応力が大きく、ハンダ接続部の破壊につ
ながるような場合でも、この有機樹脂が破壊を防止する
効果もある。With this structure, the stress due to the difference in the coefficient of thermal expansion between the printed wiring board and the ceramic module is dispersed in all of the organic resin in the middle of the solder connection, so that the stress at the solder connection is reduced. Become. Also, even in the event that the stress applied to the solder connection portion is large and may lead to the destruction of the solder connection portion, the organic resin also has an effect of preventing the breakage.
次に本発明のモジュールの製造方法の一実施例につい
て説明する。Next, an embodiment of a method for manufacturing a module according to the present invention will be described.
第２図（ａ）から第２図（ｆ）は本発明のモジュール
の製造方法の工程を示す断面図である。2 (a) to 2 (f) are cross-sectional views showing steps of a method for manufacturing a module according to the present invention.
第２図（ａ）は、内部に多層配線を有するセラミック
あるいはエポキシまたはポリイミド等有機樹脂などから
なるプリント配線基板10の表面の予め設計されたところ
に、ハンダバンプ用パッド11が形成された図を示す。次
に、この基板の表面のハンダバンプ用パッド11以外の部
分に、有機樹脂13を形成する。材料としてはポリイミド
樹脂などが用いられ、穴部の直径は10〜1000μm,厚さ10
〜500μｍの場合が多く用いられる（第２図（ｂ））。
次に、第２図（ｂ）で形成された穴部にハンダ12を供給
ずる（第２図（ｃ））。次に、この表面をポリイミド表
面とハンダ表面が平滑になるよう、物理的・化学的方法
にて平坦化する（第２図（ｄ））。FIG. 2 (a) shows a view in which solder bump pads 11 are formed on a pre-designed surface of a printed wiring board 10 made of ceramic or organic resin such as epoxy or polyimide having multilayer wiring inside. . Next, an organic resin 13 is formed on the surface of the substrate other than the solder bump pads 11. Polyimide resin is used as the material, the diameter of the hole is 10 to 1000 μm, and the thickness is 10
The case of about 500 μm is often used (FIG. 2B).
Next, the solder 12 is supplied to the hole formed in FIG. 2B (FIG. 2C). Next, this surface is flattened by a physical / chemical method so that the polyimide surface and the solder surface become smooth (FIG. 2 (d)).
一方、上述と同じ方法にて有機樹脂23およびハンダ22
が形成されており、内部にLSIが実装されたセラミック
モジュール20（たとえばLCC:リードレスチップキャリ
ア）を位置決めし、両者を重ね合せる（第２図
（ｅ））。この際、セラミックモジュール20に適当な圧
力（荷重）を加えながらハンダを溶融させると、ハンダ
同士は溶融，再合金され、ポリイミド部分は熱重合され
それぞれ接着される（第２図（ｆ））。On the other hand, the organic resin 23 and the solder 22 are formed in the same manner as described above.
Are formed, and a ceramic module 20 (for example, LCC: leadless chip carrier) in which an LSI is mounted is positioned, and both are superposed (FIG. 2 (e)). At this time, when the solder is melted while applying an appropriate pressure (load) to the ceramic module 20, the solders are melted and re-alloyed, and the polyimide portion is thermally polymerized and bonded to each other (FIG. 2 (f)).
以上説明したように本発明は、プリント配線基板にセ
ラミックチップキャリアをハンダ接合させる場合、予め
プリント配線基板およびセラミックチップキャリアの表
面にポリイミド樹脂およびハンダバンプを形成しておき
これらを重ね合せてモジュールを実装することにより、
ハンダ接合部の品質・信頼性を向上させるという効果が
ある。As described above, according to the present invention, when a ceramic chip carrier is soldered to a printed wiring board, a polyimide resin and solder bumps are formed in advance on the surfaces of the printed wiring board and the ceramic chip carrier, and these are overlapped to mount a module. By doing
This has the effect of improving the quality and reliability of the solder joint.
第１図は本発明の一実施例のモジュールの実装構造の構
成を示す断面図、第２図（ａ）〜第２図（ｆ）は本発明
のモジュールの製造方法の工程を示す断面図、第３図は
従来技術によるモジュールの実装構造の構成を示す断面
図。 10……プリント配線基板、11・12……ハンダバンプ用パ
ッド、12・22……ハンダバンプ、13・23……有機樹脂、
20……セラミックチップキャリア。FIG. 1 is a cross-sectional view showing the structure of a module mounting structure according to an embodiment of the present invention, and FIGS. 2 (a) to 2 (f) are cross-sectional views showing steps of a module manufacturing method according to the present invention. FIG. 3 is a cross-sectional view showing the configuration of a module mounting structure according to the prior art. 10 …… Printed wiring board, 11 ・ 12 …… Solder bump pad, 12 ・ 22 …… Solder bump, 13 · 23 …… Organic resin,
20 ... Ceramic chip carrier.
Claims (2)
の表面のうち予め定められたところにハンダバンプ用パ
ッドを形成する工程と、前記プリント配線基板の表面の
前記ハンダバンプ用パッドが形成されないところに有機
樹脂を形成する工程と、前記プリント配線基板の表面の
前記有機樹脂が形成されないところにハンダバンプを形
成する工程と、前記有機樹脂とハンダバンプとの表面を
研磨する工程と、予じめ定められたところに前記有機樹
脂とハンダバンプとが形成され研磨されたセラミックチ
ップキャリアを前記プリント配線基板上に位置決めする
工程と、前記位置決めされたプリント配線基板とセラミ
ックチップキャリアを加熱・加圧してそれぞれのハンダ
バンプおよび前記有機樹脂を接合させる工程とを備えて
成ることを特徴とするLSIモジュールの製造方法。A step of forming a solder bump pad on a predetermined surface of a printed wiring board having a multilayer wiring therein, and an organic pad on a surface of the printed wiring board where the solder bump pad is not formed. A step of forming a resin, a step of forming a solder bump on the surface of the printed wiring board where the organic resin is not formed, and a step of polishing the surface of the organic resin and the solder bump, where the predetermined Positioning the polished ceramic chip carrier on which the organic resin and the solder bumps are formed and polished on the printed wiring board, and heating and pressing the positioned printed wiring board and the ceramic chip carrier to form the respective solder bumps and the solder bumps. And a step of bonding the organic resin. Method of manufacturing the LSI module that.
とを特徴とする請求項１記載のLSIモジュールの製造方
法。2. The method according to claim 1, wherein said organic resin is made of a polyimide resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2144869A JP2570468B2 (en) | 1990-06-01 | 1990-06-01 | Manufacturing method of LSI module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2144869A JP2570468B2 (en) | 1990-06-01 | 1990-06-01 | Manufacturing method of LSI module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0437148A JPH0437148A (en) | 1992-02-07 |
| JP2570468B2 true JP2570468B2 (en) | 1997-01-08 |
Family
ID=15372283
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2144869A Expired - Lifetime JP2570468B2 (en) | 1990-06-01 | 1990-06-01 | Manufacturing method of LSI module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2570468B2 (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0817860A (en) * | 1994-06-30 | 1996-01-19 | Oki Electric Ind Co Ltd | Manufacture of electronic part |
| JP2763020B2 (en) * | 1995-04-27 | 1998-06-11 | 日本電気株式会社 | Semiconductor package and semiconductor device |
| US20050161814A1 (en) | 2002-12-27 | 2005-07-28 | Fujitsu Limited | Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus |
| CN102044413B (en) * | 2002-12-27 | 2012-11-21 | 富士通株式会社 | Substrate processing apparatus |
| JP4697789B2 (en) * | 2005-10-26 | 2011-06-08 | シチズン電子株式会社 | Semiconductor device and manufacturing method thereof |
| JP4768546B2 (en) * | 2006-08-16 | 2011-09-07 | 富士通株式会社 | Manufacturing method of semiconductor device |
| WO2010013728A1 (en) * | 2008-07-31 | 2010-02-04 | 日本電気株式会社 | Semiconductor device and method for manufacturing same |
| JP5286382B2 (en) * | 2011-04-11 | 2013-09-11 | 株式会社日立製作所 | Semiconductor device and manufacturing method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2640973B2 (en) * | 1988-11-17 | 1997-08-13 | 新日本製鐵株式会社 | Semiconductor element connection structure |
-
1990
- 1990-06-01 JP JP2144869A patent/JP2570468B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0437148A (en) | 1992-02-07 |
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