JPH0418694B2 - - Google Patents
Info
- Publication number
- JPH0418694B2 JPH0418694B2 JP1782385A JP1782385A JPH0418694B2 JP H0418694 B2 JPH0418694 B2 JP H0418694B2 JP 1782385 A JP1782385 A JP 1782385A JP 1782385 A JP1782385 A JP 1782385A JP H0418694 B2 JPH0418694 B2 JP H0418694B2
- Authority
- JP
- Japan
- Prior art keywords
- corners
- pad
- rounded
- pads
- insulating plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 claims abstract description 16
- 239000004065 semiconductor Substances 0.000 claims description 22
- 239000000853 adhesive Substances 0.000 claims description 13
- 230000001070 adhesive effect Effects 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000010949 copper Substances 0.000 abstract description 24
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 22
- 229910052802 copper Inorganic materials 0.000 abstract description 22
- 238000009413 insulation Methods 0.000 abstract description 5
- 239000000758 substrate Substances 0.000 abstract description 3
- 238000005530 etching Methods 0.000 abstract description 2
- 238000004080 punching Methods 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 14
- 238000010586 diagram Methods 0.000 description 7
- 239000000919 ceramic Substances 0.000 description 5
- 230000017525 heat dissipation Effects 0.000 description 5
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- NEIHULKJZQTQKJ-UHFFFAOYSA-N [Cu].[Ag] Chemical compound [Cu].[Ag] NEIHULKJZQTQKJ-UHFFFAOYSA-N 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- -1 etc. Substances 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60017823A JPS61177762A (ja) | 1985-02-01 | 1985-02-01 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60017823A JPS61177762A (ja) | 1985-02-01 | 1985-02-01 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61177762A JPS61177762A (ja) | 1986-08-09 |
JPH0418694B2 true JPH0418694B2 (US20100223739A1-20100909-C00005.png) | 1992-03-27 |
Family
ID=11954445
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60017823A Granted JPS61177762A (ja) | 1985-02-01 | 1985-02-01 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61177762A (US20100223739A1-20100909-C00005.png) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5906310A (en) * | 1994-11-10 | 1999-05-25 | Vlt Corporation | Packaging electrical circuits |
US5876859A (en) * | 1994-11-10 | 1999-03-02 | Vlt Corporation | Direct metal bonding |
US5945130A (en) | 1994-11-15 | 1999-08-31 | Vlt Corporation | Apparatus for circuit encapsulation |
JP2732823B2 (ja) * | 1995-02-02 | 1998-03-30 | ヴィエルティー コーポレーション | はんだ付け方法 |
WO1998011605A1 (fr) | 1995-06-19 | 1998-03-19 | Ibiden Co., Ltd. | Carte de circuit permettant le montage de pieces electroniques |
EP1814153A3 (en) * | 1996-09-12 | 2008-09-24 | Ibiden Co., Ltd. | Circuit board for mounting electronic parts |
JP2017130633A (ja) * | 2016-01-22 | 2017-07-27 | 豊田合成株式会社 | 発光装置 |
JP6673100B2 (ja) * | 2016-08-24 | 2020-03-25 | トヨタ自動車株式会社 | 半導体装置 |
SG10201910815QA (en) | 2018-11-19 | 2020-06-29 | Skyworks Solutions Inc | High durability solder terminals |
-
1985
- 1985-02-01 JP JP60017823A patent/JPS61177762A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS61177762A (ja) | 1986-08-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7759778B2 (en) | Leaded semiconductor power module with direct bonding and double sided cooling | |
KR970010678B1 (ko) | 리드 프레임 및 이를 이용한 반도체 패키지 | |
JP2664754B2 (ja) | 高密度電子パッケージ及びその製造方法 | |
US6249041B1 (en) | IC chip package with directly connected leads | |
JPH0883818A (ja) | 電子部品組立体 | |
JPS59141249A (ja) | 電力チツプ・パツケ−ジ | |
US4748538A (en) | Semiconductor module | |
US5296737A (en) | Semiconductor device with a plurality of face to face chips | |
US5783466A (en) | Semiconductor device and method of manufacturing the same | |
JPH05326735A (ja) | 半導体装置及びその製造方法 | |
WO2002049108A1 (en) | Semiconductor device package and lead frame with die overhanging lead frame pad | |
JPH0418694B2 (US20100223739A1-20100909-C00005.png) | ||
JPH0444347A (ja) | 半導体装置及びその製造方法 | |
JPS60167454A (ja) | 半導体装置 | |
US6168975B1 (en) | Method of forming extended lead package | |
JP2501953B2 (ja) | 半導体装置 | |
JPH05343558A (ja) | 半導体パッケージ | |
JPH09186288A (ja) | 半導体装置 | |
JPH07176664A (ja) | 半導体装置およびその製造方法 | |
JPH0638458B2 (ja) | チツプキヤリアとその製造方法 | |
KR100244826B1 (ko) | 반도체장치 및 그 제조방법 | |
JP2690248B2 (ja) | 表面実装型半導体装置 | |
JPH0318344B2 (US20100223739A1-20100909-C00005.png) | ||
JPH0786497A (ja) | インテリジェントパワーモジュール | |
JPS61270850A (ja) | 半導体チツプ実装用パツケ−ジ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |