JPH04183195A - Amplifier circuit - Google Patents
Amplifier circuitInfo
- Publication number
- JPH04183195A JPH04183195A JP2313382A JP31338290A JPH04183195A JP H04183195 A JPH04183195 A JP H04183195A JP 2313382 A JP2313382 A JP 2313382A JP 31338290 A JP31338290 A JP 31338290A JP H04183195 A JPH04183195 A JP H04183195A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- power supply
- circuit
- amplifier circuit
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 8
- 230000003321 amplification Effects 0.000 description 4
- 238000003199 nucleic acid amplification method Methods 0.000 description 4
- SEPPVOUBHWNCAW-FNORWQNLSA-N (E)-4-oxonon-2-enal Chemical compound CCCCCC(=O)\C=C\C=O SEPPVOUBHWNCAW-FNORWQNLSA-N 0.000 description 1
- LLBZPESJRQGYMB-UHFFFAOYSA-N 4-one Natural products O1C(C(=O)CC)CC(C)C11C2(C)CCC(C3(C)C(C(C)(CO)C(OC4C(C(O)C(O)C(COC5C(C(O)C(O)CO5)OC5C(C(OC6C(C(O)C(O)C(CO)O6)O)C(O)C(CO)O5)OC5C(C(O)C(O)C(C)O5)O)O4)O)CC3)CC3)=C3C2(C)CC1 LLBZPESJRQGYMB-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 102220110933 rs151253274 Human genes 0.000 description 1
Landscapes
- Amplifiers (AREA)
- Interface Circuits In Exchanges (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
正負の複数電圧を印加して動作する増幅回路に関し、
増幅回路に印加する直流動作電圧に比例した逆極性の電
圧を得て、増幅回路の他方の電源端子に印加し、歪の少
ない出力を得る増幅回路を提供することを目的とし、
一方・他方の電源電圧か供給される増幅回路において、
一方の電源電圧レベルに比例し、且つ該電源電圧とは逆
極性の電圧を発生する電圧発生回路を具備し、該電圧発
生回路出力を増幅回路の他方の電源電圧として供給する
二とて構成する。[Detailed Description of the Invention] [Summary] Regarding an amplifier circuit that operates by applying a plurality of positive and negative voltages, a voltage of opposite polarity proportional to the DC operating voltage applied to the amplifier circuit is obtained, and the other power supply terminal of the amplifier circuit is The purpose is to provide an amplifier circuit that obtains an output with little distortion by applying a power supply voltage to
comprising a voltage generating circuit that generates a voltage proportional to the power supply voltage level of one of the power supplies and having a polarity opposite to the power supply voltage, and supplying the output of the voltage generating circuit as the power supply voltage of the other power supply voltage of the amplifier circuit; .
本発明は正負の複数電圧を印加して動作する増幅回路に
関する。The present invention relates to an amplifier circuit that operates by applying a plurality of positive and negative voltages.
加入者回路用の信号増幅回路に使用する集積回路のよう
にアナログ信号を忠実に増幅するとき、電源の制約上大
振幅信号に対して歪を発生する場合かある。歪のない増
幅出力を得るための電源回路について技術開発すること
の要望か生じた。When analog signals are faithfully amplified by integrated circuits used in signal amplification circuits for subscriber circuits, distortion may occur for large amplitude signals due to power supply constraints. A request arose to develop technology for power supply circuits to obtain distortion-free amplified output.
ディジタル交換機の加入者回路においてもＬＳＩを使用
することか研究され、高耐圧と素子間の絶縁を考慮した
回路を使用する必要かある。加入者回路のうち特にＢＳ
Ｈ（ｂａｔｔｅｒｙ ｆｅｅｄ ／５ｕｐｅｒｖｉｓ
ｏｒｙ ／ｈｙｂｒｉｄ）部のＬＳＩは６０Ｖ耐圧のバ
イポーラ型アナログ回路で構成している。その２線４線
変換部分における信号増幅回路として、例えは第６図に
示すように演算増幅器を使用している。第６図において
、１は演算増幅器、２は信号入力端子、３は増幅信号出
力端子、４はＶｃｃの正端子、５は■６６の負端子、６
は外部電源正端子を示す。■。６は一５■電源である。The use of LSIs in the subscriber circuits of digital exchanges is also being studied, and it is necessary to use circuits that take into account high voltage resistance and insulation between elements. Among subscriber circuits, especially BS
H(battery feed/5upervis
The LSI in the (ory/hybrid) section is composed of a bipolar analog circuit with a withstand voltage of 60V. As a signal amplification circuit in the 2-wire/4-wire conversion section, an operational amplifier is used, for example, as shown in FIG. In FIG. 6, 1 is an operational amplifier, 2 is a signal input terminal, 3 is an amplified signal output terminal, 4 is a positive terminal of Vcc, 5 is a negative terminal of 66, 6
indicates the external power supply positive terminal. ■. 6 is 15■ power supply.
Ｖ ＥＥ電源を内蔵する方法として一４８Ｖから抵抗分
割をして得ている場合は、−４８Ｖの電圧ＶＢＢに依存
する。またツェナダイオードにより一５Ｖの一定電圧を
発生させそれを使用することもある。Ｖｃｃは通常子５
ｖであるのて、第７図に示すように出力信号の振幅の大
きさに応じて、Ｖｃｃを矢印の方向即ち正の高電圧の方
向に変化させ、正振幅の信号に歪を発生させないように
している。If the VEE power source is built-in and obtained by resistor division from -48V, it depends on the voltage VBB of -48V. Alternatively, a constant voltage of -5V may be generated by a Zener diode and used. Vcc is normal child 5
As shown in Fig. 7, Vcc is changed in the direction of the arrow, that is, in the direction of a positive high voltage, so as not to cause distortion to a signal with a positive amplitude. I have to.
第７図においてＶ、の電圧は変化しないため、大振幅の
出力信号に対し負方向の信号に大きな歪を発生している
。したかって加入者回路において大振幅の入力信号に対
し伝送特性を悪くし、Ｓ／Ｎか低下する二ととなる。In FIG. 7, since the voltage V does not change, a large distortion occurs in the negative direction signal with respect to the large amplitude output signal. As a result, the transmission characteristics of the subscriber circuit deteriorate for large-amplitude input signals, and the S/N ratio decreases.
本発明の目的は前述の欠点を改善し、増幅回路に印加す
る直流動作電圧に比例した逆極性の電圧を得て、増幅回
路の他方の電源端子に印加し、歪の少ない出力を得る信
号増幅回路を提供することにある。The purpose of the present invention is to improve the above-mentioned drawbacks, and to provide a signal amplification system in which a voltage of opposite polarity proportional to the DC operating voltage applied to an amplifier circuit is obtained and applied to the other power supply terminal of the amplifier circuit, thereby obtaining an output with less distortion. The purpose is to provide circuits.
第１図は本発明の原理構成を示す図である。第１図にお
いて、ｌは信号増幅回路、４は一方のＶｃｃの正端子、
５は他方の■６．の負端子、７は電圧発生回路を示す。FIG. 1 is a diagram showing the basic configuration of the present invention. In FIG. 1, l is a signal amplification circuit, 4 is one Vcc positive terminal,
5 is the other ■6. , and 7 indicates a voltage generation circuit.
一方・他方の電源電圧４，５か供給される増幅回路ｌに
おいて、本発明は下記の構成とする。即ち、
一方の電源電圧４のレベルに比例し、且つ該電源電圧と
は逆の極性の電圧を発生する電圧発生回路７を具備し、
該電圧発生回路７の出力を増幅回路Ｉの他方の電源電圧
として供給する二とて構成する。The amplifier circuit l to which one and the other power supply voltages 4 and 5 are supplied has the following configuration according to the present invention. That is, it includes a voltage generation circuit 7 that generates a voltage that is proportional to the level of one power supply voltage 4 and has a polarity opposite to that power supply voltage,
The output of the voltage generating circuit 7 is supplied as the other power supply voltage of the amplifier circuit I.
第１図において電源電圧発生回路７は、一方の電源の電
圧端子４の電圧Ｖ。０か入力されたとき、その電圧レベ
ルに比例し、且つ逆極性の電圧を発生させる。そのため
電圧発生回路７の出力を増幅回路１の他方の電源電圧Ｖ
、とじて端子５に供給する。したかって端子５には電圧
Ｖ。の電源を接続することなく増幅回路１は動作する。In FIG. 1, a power supply voltage generating circuit 7 generates a voltage V at a voltage terminal 4 of one power supply. When 0 is input, a voltage proportional to that voltage level and of opposite polarity is generated. Therefore, the output of the voltage generating circuit 7 is set to the other power supply voltage V of the amplifier circuit 1.
, and supplies it to terminal 5. Therefore, there is a voltage V at terminal 5. The amplifier circuit 1 operates without connecting the power source.
そして増幅回路１か大振幅信号を出力するとき、”Ｖ
ｃｃに応じてＶ、も変化するので、第２図に示すように
信号か増幅される。即ち、Ｖ ｃ ｃが正の方向に大き
く変化したときＶ ＥＥは対応して負の方向に変化する
。When amplifier circuit 1 outputs a large amplitude signal, “V
Since V also changes according to cc, the signal is amplified as shown in FIG. That is, when V c c changes significantly in the positive direction, V EE correspondingly changes in the negative direction.
そのため増幅された信号の振幅には歪か生じない。Therefore, no distortion occurs in the amplitude of the amplified signal.
第３図は本発明の第１実施例を示す回路図である。第３
図において、８は演算増幅器、９，１０は抵抗素子を示
す。演算増幅器８の反転入力端子に正電圧Ｖ ｃｃを印
加したとき、出力端子には一■ばか得られ、即ち電圧■
６ｏとなる。そのため■ＥＥはｖｃｃに比例して逆に変
化する。FIG. 3 is a circuit diagram showing a first embodiment of the present invention. Third
In the figure, 8 represents an operational amplifier, and 9 and 10 represent resistive elements. When a positive voltage Vcc is applied to the inverting input terminal of the operational amplifier 8, a voltage of 1 is obtained at the output terminal, that is, a voltage of
It will be 6o. Therefore, ■EE changes inversely in proportion to vcc.
次に第４図は本発明の他の実施例として電圧発生回路の
他の例を示す。第４図において、１）〜１４はトランジ
スタＱ１〜Ｑ４．２１〜２４は抵抗素子を示す。トラン
ジスタ（Ｑｌ）１）からトランジスタ（Ｑ２）１２と抵
抗素子２３を介して電源Ｖ ＢＢに至る流路と、トラン
ジスタ（Ｑｌ）１）から抵抗素子２２、トランジスタ（
Ｑ３）１３゜抵抗素子２４を介して電源ＶＢＢに至る流
路とが、所謂カレントミラー回路を構成している。電源
Ｖ。。から抵抗素子２１に流れる電流を１０とすると、
１、＝ （Ｖｃｃ−Ｖ、、。、）／Ｒ２゜抵抗素子２２
の両端の電圧をトランジスタ（Ｑ４）１４を介して取り
出すと、■、。は下記のように計算される。Next, FIG. 4 shows another example of a voltage generating circuit as another embodiment of the present invention. In FIG. 4, 1) to 14 are transistors Q1 to Q4, and 21 to 24 are resistance elements. A flow path from the transistor (Ql) 1) to the power supply VBB via the transistor (Q2) 12 and the resistance element 23, and a flow path from the transistor (Ql) 1) to the resistance element 22 and the transistor (
Q3) The flow path leading to the power supply VBB via the 13° resistance element 24 constitutes a so-called current mirror circuit. Power supply V. . If the current flowing through the resistive element 21 is 10, then
1, = (Vcc-V,,.,)/R2゜Resistance element 22
When the voltage across both ends of is taken out through the transistor (Q4) 14, . is calculated as follows.
Ｖｏ＝Ｖ１．Ｑ、−（Ｉｏ （Ｒ，３／Ｒ２４）Ｒ２２
（Ｒ２，＝Ｒ２，のとき９
Ｖ ＣＣを＋５ｖとしたとき、■５ヨか一５ｖとなるよ
うに抵抗素子２１＋２２を調節しておけは、■ｃｃかよ
り大となったときＶＥｕは負の方向に、Ｖ ＣＣの変化
に比例した値たけより大となる。Vo=V1. Q, -(Io (R,3/R24)R22
(When R2, = R2, 9 V When CC is +5v, ■ If you adjust the resistance elements 21 + 22 so that it becomes 5V or -5V, VEu becomes negative when it becomes larger than ■CC.) in the direction, by a value proportional to the change in V CC.
次に第５図は本発明の更に他の実施例を示す。Next, FIG. 5 shows still another embodiment of the present invention.
第５図において、１５〜２０はトランジスタＱ５〜Ｑ１
０．３１〜３４は抵抗素子を示す。Ｖ ＣＣから抵抗素
子３１に流れる電流をＩ。とすると、Ｉ ０＝ （Ｖ−
ｏＶｅＥｏｓ） ／ Ｒ３１ここてＲ３２＝Ｒ３４とす
ればＶ。、はＶＥ−＝ＶＢＥ Ｒ３２（■ｏ−ｙａＦ
、） ／ＲＰＩ ２Ｖ、、。In FIG. 5, 15 to 20 are transistors Q5 to Q1.
0.31 to 34 indicate resistance elements. The current flowing from VCC to the resistive element 31 is I. Then, I 0 = (V-
oVeEos) / R31 Here, if R32=R34, then V. , is VE-=VBE R32 (■o-yaF
,) /RPI 2V,,.
更にＲ３１” Ｒ２□とすれば
Ｖ ＢＢ＝ ＶＣＣ
となり、■Ｆ、。をＶ ｃｃに比例させることか出来る
。Furthermore, if R31" R2□, then VBB=VCC, and ■F, can be made proportional to Vcc.
なお、第５図の回路についてその動作を更に改善するた
め、トランジスタ（Ｑ７）１７．）ランジスタ（Ｑ８）
１８の部分をダーリントン回路とすること、及びトラン
ジスタ（Ｑ６）、、トランジスタ（Ｑ９）１９の部分を
ベース電流補償型回路とすることが望ましい。その構成
変更によりトランジスタのベース電流による比例電圧値
の誤−差を防止する二とかてきる。Note that in order to further improve the operation of the circuit shown in FIG. 5, transistor (Q7) 17. )Ran resistor (Q8)
It is desirable that the portion 18 be a Darlington circuit, and that the portions of the transistor (Q6) and transistor (Q9) 19 be a base current compensation type circuit. By changing the configuration, it is possible to prevent errors in the proportional voltage value due to the base current of the transistor.
このようにして本発明によると、電源の正電圧を大に変
化させると、電圧発生回路出力の負電圧か自動的に大き
く負に変化するから、そのような電圧か供給されている
増幅回路の動作として、歪のない大振幅の増幅出力を得
ることか出来る。刀しントミラー回路のように比較的簡
易な回路により構成することかできるから、電話交換機
の加入者回路に使用して、歪のない信号を得ることに有
効である。また例えは−５Ｖの電源を格別に設ける必要
かなく、＋５Ｖの正電源端子と一４８Ｖ端子のみて良い
から、電源回路の構成が簡単になるという効果を有する
。In this way, according to the present invention, when the positive voltage of the power supply is greatly changed, the negative voltage of the output of the voltage generating circuit automatically changes to a large negative value. In operation, it is possible to obtain a distortion-free, large-amplitude amplified output. Since it can be constructed using a relatively simple circuit such as a sharp mirror circuit, it is effective for use in subscriber circuits of telephone exchanges to obtain distortion-free signals. Further, for example, there is no need to provide a -5V power supply, and only a +5V positive power supply terminal and a -48V terminal are required, which has the effect of simplifying the configuration of the power supply circuit.
第１図は本発明の原理構成を示す図、
第２図は第１図の動作波形図、
第３図は本発明の実施例の構成を示す図、第４図・第５
図は本発明の他の実施例の構成を示す図、
第６図は従来の回路構成を示す図、
第７図は第６図の動作波形図である。
１−増幅回路
４−一方のＶ ｃｃの正端子
５−他方のＶＥＥの負端子
７−電圧発生回路
特許出願人 富士通株式会社
代 理 人 弁理士 鈴木栄祐
本発明ジ）１！７４１７１梠成１に１
第１０
第１図の動作波形し１
隻２図
第３図
第４因
ａａ
実施例
￥５３Figure 1 is a diagram showing the principle configuration of the present invention, Figure 2 is an operation waveform diagram of Figure 1, Figure 3 is a diagram showing the configuration of an embodiment of the present invention, Figures 4 and 5.
6 is a diagram showing the configuration of another embodiment of the present invention, FIG. 6 is a diagram showing a conventional circuit configuration, and FIG. 7 is an operation waveform diagram of FIG. 6. 1 - Amplifier circuit 4 - One Vcc positive terminal 5 - Other VEE negative terminal 7 - Voltage generating circuit Patent applicant Fujitsu Ltd. Agent Patent attorney Eisuke Suzuki Inventor 1!74171 To Sei Kakashi 1 1 10 Operation waveform of Figure 1 1 Ship 2 Figure 3 Figure 4 Factor aa Example ¥53
Claims (1)
幅回路（１）において、 一方の電源電圧（４）レベルに比例し、且つ該電源電圧
とは逆極性の電圧を発生する電圧発生回路（７）を具備
し、 該電圧発生回路（７）出力を増幅回路（１）の他方の電
源電圧（５）として供給すること を特徴とする増幅回路。 ２、請求項１記載の電圧発生回路は、カレントミラー回
路で構成され、該カレントミラー回路の一方の流路に挿
入した抵抗素子の両端の電圧だけ逆極性に変化する電圧
を得ることを特徴とする電圧発生回路を具備する増幅回
路。[Claims] 1. In the amplifier circuit (1) to which one and the other power supply voltages (4) and (5) are supplied, the level of the power supply voltage (4) is proportional to the level of one of the power supply voltages (4), and is opposite to the power supply voltage. An amplifier circuit comprising: a voltage generating circuit (7) that generates a polar voltage; and supplying the output of the voltage generating circuit (7) as the other power supply voltage (5) of the amplifier circuit (1). 2. The voltage generating circuit according to claim 1 is constituted by a current mirror circuit, and obtains a voltage whose polarity changes in the opposite direction by the voltage across a resistive element inserted into one flow path of the current mirror circuit. An amplifier circuit equipped with a voltage generation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2313382A JPH04183195A (en) | 1990-11-19 | 1990-11-19 | Amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2313382A JPH04183195A (en) | 1990-11-19 | 1990-11-19 | Amplifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04183195A true JPH04183195A (en) | 1992-06-30 |
Family
ID=18040593
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2313382A Pending JPH04183195A (en) | 1990-11-19 | 1990-11-19 | Amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04183195A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5892108A (en) * | 1981-11-27 | 1983-06-01 | Hitachi Ltd | Amplifier |
| JPS6123690A (en) * | 1984-07-12 | 1986-02-01 | Masaya Kuno | Novel method for treating crude oil |
-
1990
- 1990-11-19 JP JP2313382A patent/JPH04183195A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5892108A (en) * | 1981-11-27 | 1983-06-01 | Hitachi Ltd | Amplifier |
| JPS6123690A (en) * | 1984-07-12 | 1986-02-01 | Masaya Kuno | Novel method for treating crude oil |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4339677A (en) | Electrically variable impedance circuit with feedback compensation | |
| JPS5831789B2 (en) | Transmission bridge for subscriber circuits | |
| US6300811B1 (en) | Differential amplifier | |
| JPS6135058A (en) | Current characteristic shaping circuit | |
| US5070308A (en) | Working point adjusting circuit for a power amplifier | |
| JPH04183195A (en) | Amplifier circuit | |
| JPS643387B2 (en) | ||
| US4340869A (en) | Amplifier for use in a line circuit | |
| JPS59205815A (en) | Integrated circuit for generating terminal voltage adjustable by digital signal | |
| JPS59135910A (en) | Amplifier unit | |
| JP3260098B2 (en) | BTL amplifier | |
| JPH06169225A (en) | Voltage current conversion circuit | |
| JP2853485B2 (en) | Voltage-current converter | |
| JP3290264B2 (en) | Gamma correction circuit | |
| JP2591411Y2 (en) | Video signal clipping circuit | |
| JP2902277B2 (en) | Emitter follower output current limiting circuit | |
| JPH018027Y2 (en) | ||
| JPS61214645A (en) | Darlington connecting circuit in transmitting amplifying circuit | |
| JPS62104311A (en) | Switch circuit | |
| JPH0411150B2 (en) | ||
| JPS6380613A (en) | Simplified device for generating tone signal | |
| JPH05129961A (en) | Unipolar/bipolar conversion circuit | |
| JPS61108244A (en) | Integrated circuit for transmitting signal | |
| JPH0410763B2 (en) | ||
| JPS5862936A (en) | Electronic switch circuit |