JPH04181179A - Measuring method for electric characteristic of semiconductor device - Google Patents
Measuring method for electric characteristic of semiconductor deviceInfo
- Publication number
- JPH04181179A JPH04181179A JP30970890A JP30970890A JPH04181179A JP H04181179 A JPH04181179 A JP H04181179A JP 30970890 A JP30970890 A JP 30970890A JP 30970890 A JP30970890 A JP 30970890A JP H04181179 A JPH04181179 A JP H04181179A
- Authority
- JP
- Japan
- Prior art keywords
- curve tracer
- diode
- tracer
- simple circuit
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims description 10
- 239000004065 semiconductor Substances 0.000 title claims description 7
- 239000000700 radioactive tracer Substances 0.000 claims abstract description 29
- 230000005669 field effect Effects 0.000 claims abstract description 6
- 238000005259 measurement Methods 0.000 claims description 5
- 230000002457 bidirectional effect Effects 0.000 claims description 4
- 230000009977 dual effect Effects 0.000 abstract description 6
- 230000003068 static effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の電気特性測定方法に関し、特に入
力端に双方向ダイオードによる保護回路を備えたデュア
ルゲート型の電界効果トランジスタの電気特性測定方法
に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for measuring the electrical characteristics of a semiconductor device, and in particular to a method for measuring the electrical characteristics of a dual-gate field effect transistor equipped with a protection circuit using a bidirectional diode at the input terminal. Regarding the method.
従来、この種の電界効果トランジスタく以下、デュアル
ゲートFETという)チエツク方法は、DC電源装置と
トランジスタカーブトレーサを用いて波形を観測して良
否の測定していた。Conventionally, the method of checking this type of field effect transistor (hereinafter referred to as dual gate FET) has been to observe the waveform using a DC power supply and a transistor curve tracer to measure the quality.
上述した従来の半導体装置の電気特性測定方法では、大
量の測定を要する場合に、DC電源装置とトランジスタ
カーブトレーサの設備を大量必要としていた。In the conventional method for measuring electrical characteristics of semiconductor devices described above, when a large amount of measurement is required, a large amount of equipment such as a DC power supply device and a transistor curve tracer is required.
本発明の半導体装置の電気特性の測定方法は、第1及び
第2のゲートとソース間にそれぞれ双方向ダイオードに
よる過電性保護回路を備えた被試験電界効果トランジス
タに電圧−電流特性測定用のカーブトレーサを接続する
半導体装置の電気特性測定方法に於いて、前記カーブト
レーサとしてダイオードカーブトレーサを用い、該ダイ
オードカーブトレーサと前記電界効果トランジスタとの
間に、前記ダイオードカーブトレーサの正側測定端子に
カソードを接続し前記第1のゲート間にアノードを接続
したダイオードと、一端が前記カソードに他端が前記第
2のゲートに接続する抵抗と前記ダイオードカーブトレ
ーサの負側測定端子及び前記ソース間を接続する配線と
を有する簡易回路を挿入して、前記ダイオードカーブト
レーサの表示する電圧−電流特性曲線の形状により良又
否を分類して構成されている。The method for measuring the electrical characteristics of a semiconductor device according to the present invention includes a method for measuring voltage-current characteristics of a field-effect transistor to be tested, which is equipped with an overvoltage protection circuit using bidirectional diodes between a first gate and a second gate and a source, respectively. In a method for measuring electrical characteristics of a semiconductor device in which a curve tracer is connected, a diode curve tracer is used as the curve tracer, and a positive side measurement terminal of the diode curve tracer is connected between the diode curve tracer and the field effect transistor. A diode with a cathode connected and an anode connected between the first gate, a resistor with one end connected to the cathode and the other end connected to the second gate, and the negative side measurement terminal of the diode curve tracer and the source. A simple circuit having connecting wiring is inserted, and the diode curve tracer classifies pass or fail based on the shape of the voltage-current characteristic curve displayed.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例を説明するための測定装置の
ブロック図である。FIG. 1 is a block diagram of a measuring device for explaining one embodiment of the present invention.
被試験のデュアルゲートFET5を、ダイオード2と抵
抗をそれぞれ第1ゲートG1と第2ゲー) G 2とダ
イオードカーブトレーサ4の正側端子間に接続する簡易
回路1を介して、ダイオードカーブトレーサ4に接続し
、電圧印加と電圧−電流特性の波形を描かせ、第2図に
示すような静特性の波形の判定基準により特性分類を行
う。The dual gate FET 5 under test is connected to the diode curve tracer 4 via a simple circuit 1 that connects the diode 2 and the resistor between the first gate G1 and the second gate G2 and the positive terminal of the diode curve tracer 4, respectively. The voltage application and voltage-current characteristic waveforms are drawn, and the characteristics are classified based on the criteria for determining the static characteristic waveforms as shown in FIG.
第2図(a)は良品の場合を、第2図(b)〜(f)は
それぞれソースS断線、ダイオードD1.G、−3断線
、Dl及びG1素子部、G1−8短絡、ダイオードD2
.G2−3断線、D2及びG2素子部、G2−3短絡の
場合を示している。FIG. 2(a) shows the case of a non-defective product, and FIGS. 2(b) to (f) show the case where the source S is disconnected and the diode D1. G, -3 disconnection, Dl and G1 element section, G1-8 short circuit, diode D2
.. The case where G2-3 is disconnected, D2 and G2 element portion, and G2-3 are short-circuited is shown.
以上説明したように本発明は、簡易回路とダイオードカ
ーブトレーサを使用することにより、簡単な回路でデュ
アルゲートFETの電気特性の測定ができる。As explained above, the present invention makes it possible to measure the electrical characteristics of a dual gate FET with a simple circuit by using a simple circuit and a diode curve tracer.
第1図は本発明の一実施例を説明するための測定装置の
ブロック図、第2図(a)〜(f)は第1図のダイオー
ドカーブトレーサに表示されるFETの電圧−電流特性
図である。
1・・・簡易回路、2・・・ダイオード、3・・・抵抗
器、4・・・ダイオードカーブトレーサ、5・・・デュ
アルゲートFET、6・・・双方向ダイオード。
代理人 弁理士 内 原 音
6ノノカ向り゛イオ斗
方 1 図
」呵 ? 図Figure 1 is a block diagram of a measuring device for explaining one embodiment of the present invention, and Figures 2 (a) to (f) are voltage-current characteristic diagrams of the FET displayed on the diode curve tracer in Figure 1. It is. 1... Simple circuit, 2... Diode, 3... Resistor, 4... Diode curve tracer, 5... Dual gate FET, 6... Bidirectional diode. Agent Patent Attorney Uchihara Oto 6 Directed to Nonoka ゛Io Toka 1 fig. figure
Claims (1)
イオードによる過電性保護回路を備えた被試験電界効果
トランジスタに電圧−電流特性測定用のカーブトレーサ
を接続する半導体装置の電気特性測定方法に於いて、前
記カーブトレーサとしてダイオードカーブトレーサを用
い、該ダイオードカーブトレーサと前記電界効果トラン
ジスタとの間に、前記ダイオードカーブトレーサの正側
測定端子にカソードを接続し前記第1のゲート間にアノ
ードを接続したダイオードと、一端が前記カソードに他
端が前記第2のゲートに接続する抵抗と前記ダイオード
カーブトレーサの負側測定端子及び前記ソース間を接続
する配線とを有する簡易回路を挿入して、前記ダイオー
ドカーブトレーサの表示する電圧−電流特性曲線の形状
により良又否を分類することを特徴とする半導体装置の
電気特性測定方法。A method for measuring electrical characteristics of a semiconductor device in which a curve tracer for measuring voltage-current characteristics is connected to a field-effect transistor under test that is equipped with an overcurrent protection circuit using bidirectional diodes between the first and second gates and sources, respectively. A diode curve tracer is used as the curve tracer, a cathode is connected to the positive side measurement terminal of the diode curve tracer, and an anode is connected between the first gate and the diode curve tracer. Inserting a simple circuit having a connected diode, a resistor with one end connected to the cathode and the other end connected to the second gate, and wiring connecting between the negative side measurement terminal of the diode curve tracer and the source, A method for measuring electrical characteristics of a semiconductor device, characterized in that it is classified as good or bad based on the shape of a voltage-current characteristic curve displayed by the diode curve tracer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2309708A JP2582474B2 (en) | 1990-11-15 | 1990-11-15 | Method for measuring electrical characteristics of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2309708A JP2582474B2 (en) | 1990-11-15 | 1990-11-15 | Method for measuring electrical characteristics of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04181179A true JPH04181179A (en) | 1992-06-29 |
JP2582474B2 JP2582474B2 (en) | 1997-02-19 |
Family
ID=17996333
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2309708A Expired - Lifetime JP2582474B2 (en) | 1990-11-15 | 1990-11-15 | Method for measuring electrical characteristics of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2582474B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116298766A (en) * | 2023-05-16 | 2023-06-23 | 成都思科瑞微电子股份有限公司 | Test method of insulated gate field effect transistor |
-
1990
- 1990-11-15 JP JP2309708A patent/JP2582474B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116298766A (en) * | 2023-05-16 | 2023-06-23 | 成都思科瑞微电子股份有限公司 | Test method of insulated gate field effect transistor |
Also Published As
Publication number | Publication date |
---|---|
JP2582474B2 (en) | 1997-02-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5381105A (en) | Method of testing a semiconductor device having a first circuit electrically isolated from a second circuit | |
KR100529615B1 (en) | Test circuit for measuring degradation of transistors | |
US5801536A (en) | Test method for power integrated devices | |
US4578637A (en) | Continuity/leakage tester for electronic circuits | |
US6833722B2 (en) | Electronic circuit device with a short circuit switch using transistors and method of testing such a device | |
JPH04181179A (en) | Measuring method for electric characteristic of semiconductor device | |
US5412337A (en) | Semiconductor device providing reliable conduction test of all terminals | |
US20010054904A1 (en) | Monitoring resistor element and measuring method of relative preciseness of resistor elements | |
JP2512073B2 (en) | Inspection method of surge protection circuit | |
KR970007970B1 (en) | Peak current measurement of on-chip | |
JPH0422306Y2 (en) | ||
JPH11109002A (en) | Semiconductor resin sealed device | |
JP3093559B2 (en) | Test apparatus and test method for semiconductor integrated circuit device | |
JP2897941B2 (en) | Constant current circuit for resistance measurement | |
JPH055371B2 (en) | ||
JPS62110169A (en) | Method for measuring characteristics of line | |
JPH0682534A (en) | Semiconductor integrated circuit device | |
JPS61240170A (en) | Method of testing semiconductor integrated circuit | |
JPH05340992A (en) | Integrated circuit device | |
JPH0519950B2 (en) | ||
JPS58221174A (en) | Testing method of semiconductor device | |
JPS6033067A (en) | Inspecting circuit | |
JPH01170867A (en) | Reliability testing method for semiconductor integrated circuit | |
JPH03255968A (en) | Circuit for evaluating and measuring characteristic of circuit element | |
JPH07191079A (en) | Method and jig for evaluating semiconductor integrated circuit |