JPH04179317A - D/a converter - Google Patents

Abstract

PURPOSE:To improve an S/N by connecting a substrate electrode member to either a ground power lead wire or a non-ground power lead wire and connecting a decoupling capacitor between the substrate electrode member and the other power lead wire. CONSTITUTION:When the substrate electrode member 20 is connected to the non-ground power lead wire T1, the decoupling capacitor 30 is connected between the substrate electrode member 20 and the ground power lead wire T2. The decoupling capacitor 30 operates to set high frequency noise entering the non-ground power lead wire T1 and the substrate electrode member 20 free to a ground potential-side. Thus, the potential of the non-ground power lead wire T1 and that of the substrate electrode member 20 hardly fluctuate by high frequency noise and the introduction of noise to a waveform shaping output and a system clock signal is considerably reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement of a DA converter using oversampling technology and noise-n-aping (delta-sigma modulation) technology.

``Summary of the Invention'' The present invention provides an overlay with an integrated circuit section in which a clock generator, a noise shaper, a waveform shaping circuit, etc. are formed as an integrated circuit, and the integrated circuit board is fixed to a substrate electrode member and housed in a package. In a sampling type DA converter, a substrate electrode member is connected to one of the grounded and non-grounded power supply leads provided on the package, and a decoupler is provided between the substrate electrode member and the other power supply lead. By connecting a ring capacitor, high frequency noise based on the digital input is released to the ground potential side via the decoupling capacitor, thereby improving the S/N ratio.

E. Prior Art] Conventionally, as a DA converter using oversampling technology and noise shaving technology, the one illustrated in FIG. 4 has been proposed.

In FIG. 4, 10 is a digital filter that oversamples the multi-bit digital input DI;
12 is a noise shaper (delta-sigma modulator) that transmits a digital signal B with a reduced number of bits by delta-sigma modulating (differential-integral processing) the multi-bit digital signal A from the digital filter IO; 14 is a noise shaper from the noise shaper 12; A waveform shaping circuit 16 shapes the pulses constituting the digital signal B according to a shaping clock signal; 16 is a system clock 1.1 having a frequency fs; A clock generator 18 that generates a signal φS is a low-pass filter (LPF) that filters the pulse output C from the circuit 14 and converts it into an analog output AO corresponding to the input DI.

The circuit section surrounded by the dashed line IC is configured as a monolithic or hybrid integrated circuit and is arranged in one package, and 16A is a clock generator 16.
This is a crystal resonator that is externally attached to the In some cases, the digital filter 10 and its related parts (the part surrounded by broken lines) are also integrated into an integrated circuit.

The digital input DI is - for example 16 for each sample.
Waveform data containing bit (1 word) data,
The data sending frequency is 44.1 KHz.

Furthermore, the frequency of the system clock signal φS is 16°9
KHz, and the data transmission frequency fa from the digital filter 10 to the noise shaper 12 is usually fs/2 (
For example, 8.45 MHz).

The noise shaper 12 is provided to lower the oversampling frequency in oversampling frequency conversion. When a primary or secondary noise shaper is used as the noise shaper 12, pulse density modulation (bit stream) is used as the noise shaper output B.
An output is obtained, and when a third-order or higher-order noise shaper is used, a pulse width modulated output is obtained as output B.

In the noise shaper 12, the digital signal is converted into a representation with a reduced number of bits, but the error caused by such conversion becomes larger in the high frequency region. That is, FIG. 5 shows the power spectrum of the ideal output of the noise shaper 12, which has a sharp peak Ps at the system clock frequency fs of the noise shaper 12, and
As shown by the solid line, the maximum noise noise is at the frequency of fs/2. This spectrum shape is repeated for each fa as fs, 2fs, 3fs, etc., but is not shown. Furthermore, although white noise that exceeds the ideal state actually exists, it is not shown in FIG.

Noise shaper output B has various noises added to the ideal state due to fluctuations during digital processing, so if output B is directly converted to analog output with LPF 18, errors will occur due to noise components. . Therefore, the noise sensor output B is waveform-shaped by the waveform shaping circuit 14 based on the system clock signal φS, and then L P F
18 to reduce errors caused by noise components.

In the waveform shaping circuit 14, the noise sensor output B is substantially multiplied by the system clock signal φS, and the noise is folded back to the sum and difference frequencies of the respective frequencies.

[Problems to be Solved by the Invention] According to the above-described conventional device, the digital signal sent from the digital filter IO at the sending frequency fa is
In the integrated circuit package, the high frequency noise enters the clock lead (connection terminal of the crystal resonator 16A) from the input lead through the substrate electrode member to which the integrated circuit board is fixed. Therefore, when observing the spectrum of the output of the clock generator 16, what should normally only appear as a frequency component of fs, as shown as Ps in FIG. A component of frequency fa and frequency components near fa appear as noise. When fa is f s / 2, mixed noise based on fa appears at and around f s / 2,
This appearance position corresponds to the location where the noise power is maximum, as shown by the broken line in FIG.

In the waveform shaping circuit 14, aliasing noise is generated by multiplying the noise mixed into the system clock based on fa by the large noise near f s / 2 in FIG. This occurred in the audible frequency band R shown in FIG. 5, and the S/N ratio in this band R was worsened.

In the above, the problem was noise mixed into the system clock based on fa, but in the case where the digital filter 10 is included in an integrated circuit as shown in FIG. The problem is noise mixed into the system clock based on the system clock. That is, the digital input DI has a transmission frequency of, for example, 44.1 kHz in units of samples (words), but since it is normally input in a bit serial format, the transmission frequency in units of bits is about 8 MHz.

Therefore, as in the case of fa, noise is mixed into the system clock signal φS based on fi, and based on this mixed noise, aliasing noise is generated in the audible frequency band R, deteriorating the S/N ratio.

Furthermore, in addition to the noise mixing into the lock lead as described above, high frequency noise also mixes into the power lead based on digital input. For this reason, the power supply potential fluctuates, particularly with respect to the ungrounded power supply lead, which appears as noise in the waveform shaping output C, deteriorating the S/N ratio.

An object of the present invention is to reduce noise contamination in an oversampling type DA converter as described above.
/N ratio.

[Means for Solving the Problems] The present invention includes (a) an integrated circuit board; (b) a package that houses the integrated circuit board in a state where it is fixed to a board electrode member, the package including input leads, output leads, (c) a vibrator for oscillation connected to the clock lead; and (d) a vibrator that utilizes the vibration of this vibrator. a clock generator for generating a system clock signal, the clock generator being formed as an integrated circuit on the integrated circuit board; (e) an oversampled multi-bit digital input routed through the input lead; (f ) a waveform shaping circuit that shapes pulses constituting the digital signal from the noise shaper based on the system clock signal, the circuit being formed as an integrated circuit on the integrated circuit board; In the DA converter, the DA converter is equipped with a conversion means for converting a pulse output sent from the waveform shaping circuit via the output lead into an analog output corresponding to the digital input, wherein one of the grounded and non-grounded power supply leads The device is characterized in that the substrate electrode member is connected to one power supply lead, and a decoupling capacitor is connected between the substrate electrode member and the other power supply lead.

In such a configuration, instead of providing an oversampled digital input from the input lead, the DA
A multi-bit digital input to be converted may be provided. In this case, a digital filter that oversamples the supplied digital input based on the system clock signal may be formed as an integrated circuit on an integrated circuit board, and a multi-bit digital signal from this digital filter may be supplied to the noise shaper.

[Function] According to the configuration of the present invention, when the substrate electrode member is connected to the non-grounded power supply lead, the decoupling capacitor is connected between the substrate electrode member and the grounded power supply lead. In this case, the decoupling capacitor acts to release high frequency noise that has entered the non-grounded power supply lead and substrate electrode member to the ground potential side. Therefore, the potentials of the non-grounded power supply leads and substrate electrode members hardly fluctuate due to high frequency noise, and noise contamination into the waveform shaping output and system clock signal is significantly reduced.

Furthermore, when the substrate electrode member is connected to a grounding power supply lead, the decoupling capacitor is connected between the substrate electrode member and the non-grounding power supply lead. In this case, the decoupling capacitor acts to release high frequency noise that has entered the non-grounded power supply lead to the ground potential side via the substrate electrode member. High frequency noise that has entered the substrate electrode member escapes to the ground potential side via the grounding power supply lead.

Therefore, the potentials of the non-grounded power supply leads and substrate electrode members hardly fluctuate due to high frequency noise, and noise mixing into the waveform shaping output and system clock signal is significantly reduced.

[Example 1] FIG. 1 shows an integrated circuit section of a DA converter according to an embodiment of the present invention. The circuit configuration of this DA converter is the same as that described above with respect to FIG. The explanation will be omitted.

The substrate electrode member 20 and the leads such as the input lead 22, clock lead 24, power supply lead TI, 72, etc. are formed by punching a lead frame material. The power leads Tl and T2 are arranged in parallel with leads such as the input lead 22 and the clock lead 24, for example, in a dual in-line format, but for convenience of explanation, they are shown above the input lead 22 and the clock lead 24, respectively. .

For example, the semiconductor substrate 26 made of silicon is shown in FIG.
A circuit section similar to the above is integrated into an IC (integrated circuit), and is housed in a package 28 made of plastic or ceramics while being fixed to the upper surface of the substrate electrode member 20. 20.22.24. TI.

The leads such as T2 are led out of the package 28 and are connected to corresponding electrodes or wiring on the semiconductor substrate 26 by bonding wires or the like within the package 28. Incidentally, the IC may be implemented by including a digital filter similar to that shown in FIG. 4, or may be implemented in a hybrid format.

Inside the package 28, the substrate electrode member 20 is connected to the power supply lead T1. Such connections may be made outside the package 28. Also, power lead T2
and the substrate electrode member 20, for example, 1,000 to 1
A decoupling capacitor 30 having a capacitance of about 0.0OOpF is connected. Capacitor 30 may be formed on an integrated circuit substrate, such as semiconductor substrate 26;
Alternatively, the connection can be made outside the socket 28 as shown by the broken line.

Figures 2 and 3 show different examples of IC implementation using complementary MO5 type transistors. Figure 2 shows an example of a P-well type, and Figure 3 shows an example of an N-well type. An example is shown. In these figures, the same parts as in FIG. 1 are given the same reference numerals.

In FIG. 2, 26 is an N-type semiconductor substrate, 32 is a P-type well region, S, D, G are the source, drain, gate, Ss, and DN of P-channel transistors.

GN is the source and drain of the N-channel transistor,
A gate, Lg indicates a gate wiring, and Ld indicates a drain wiring, respectively.

The power supply lead Tl is connected to the substrate electrode member 20 and the source S, and is supplied with one power supply potential +VDD. Further, the power supply lead T2 is connected to the source SN and the P-type well region 3.
2, and the other power supply potential=■1. is given.

In this example, the power supply potential -Vms is set as the reference potential (ground potential). A decoupling capacitor 30 is connected between the power supply lead T2 and the substrate electrode member 20.

According to the configuration shown in FIG. 2, even if high frequency noise enters the power supply lead T1 and the substrate electrode member 20 from the input lead 22 as shown in FIG. run away to Therefore,
Since the high frequency noise that enters the clock lead 24 (FIG. 1) via the substrate electrode member 20 is reduced, noise mixing into the system clock signal such as φS in FIG. 4 is reduced, and aliasing noise is also reduced. . Furthermore, since fluctuations in the potential of the power supply lead TI due to high frequency noise are also reduced, noise mixing into the waveform shaping output as shown in FIG. 4C is also reduced.

In FIG. 3, 26 is a P-type semiconductor substrate, 32 is an N-type well region, and the same parts as in FIG. 2 are given the same reference numerals. The structure of FIG. 3 is different from that of FIG. 2, firstly, the conductivity types of the semiconductor substrate 26 and well region 32 are reversed from those of FIG. 2, and secondly, the structure of the substrate electrode member 20 is
is connected to the power supply lead T2 (ground potential side), and the decoupling capacitor 30 is connected between the power supply lead TI and the substrate electrode member 20.

According to the configuration shown in FIG. 3, high frequency noise that has entered the substrate electrode member 20 escapes to the ground potential side via the power supply lead T2. Moreover, the high frequency noise that has entered the power supply lead T1 escapes to the ground potential side via the capacitor 30, the substrate electrode member 20, and the power supply lead T2. Therefore, as in the case of FIG. 2, the effect of reducing noise mixing into the waveform shaping output and the system clock signal can be obtained.

In the embodiment of FIG. 2, capacitor 30 may be connected to the ground potential line of the printed circuit board on which the package is mounted, instead of being connected to power supply lead T2. Also, the third
In the illustrated embodiment, the substrate electrode member 20 is a power supply lead T
2, it may be connected to the ground potential line of the printed circuit board.

In other words, the capacitor 30 or the member 20 only needs to be electrically connected to the grounding power supply lead T2.

In addition, in the embodiment shown in FIG. 2 or 3, the power supply lead T2
Instead, TI may be set to the ground potential side.

[Effects of the Invention] As described above, according to the present invention, a substrate electrode member is connected to one of the grounded and non-grounded power supply leads in the integrated circuit section of an oversampling type DA converter, and A decoupling capacitor is connected between the board electrode member and the other power supply lead to release high frequency noise based on the digital input to the ground potential side, reducing noise intrusion into the waveform shaping output and system clock signal. , it is possible to obtain the effect of making it possible to significantly improve the S/N ratio.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing an integrated circuit section of a DA converter according to an embodiment of the present invention, FIGS. 2 and 3 are cross-sectional views showing different examples of IC integration, and FIG. 4 is a conventional ODA FIG. 5 is a block diagram showing the conversion device. FIG. 5 is a graph showing the power spectrum of the noise shaper output B. FIG. 6 is a graph showing the power spectrum of the clock output. 10., 2 digital filter, 12... noise shaper, 14... waveform shaping circuit, 16... clock generator, 18... low pass filter, 20... substrate electrode member, 22... input Lead, 24...Clock lead, 26...Semiconductor substrate, 28...Package, 3
0...Decoupling capacitor, TI. T2...Power lead.

Claims (1)

[Scope of Claims] 1. (a) An integrated circuit board; (b) A package that accommodates this integrated circuit board in a state where it is fixed to a board electrode member, which includes input leads, output leads, clock leads, and grounding. and (c) an oscillating resonator connected to the clock lead, and (d) generating a system clock signal using the vibration of this resonator. (e) an oversampled multi-bit digital input routed through the input lead, the clock generator being configured as an integrated circuit on the integrated circuit board; a noise shaper that transmits a digital signal with a reduced number of bits by performing delta-sigma modulation based on a clock signal, and is formed as an integrated circuit on the integrated circuit board; (f) a digital signal from the noise shaper; a waveform shaping circuit that shapes pulses constituting a signal based on the system clock signal, the circuit being formed as an integrated circuit on the integrated circuit board; and converting means for converting a pulse output sent from the digital input into an analog output corresponding to the digital input, wherein one of the grounding and non-grounding power supply leads is connected to the substrate electrode. A DA converter, characterized in that the members are connected to each other, and a decoupling capacitor is connected between the substrate electrode member and the other power supply lead. 2. (a) an integrated circuit board, and (b) a package that houses the integrated circuit board in a state where it is fixed to a board electrode member, which includes an input lead, an output lead, a clock lead, and a power source for grounding and non-grounding. (c) an oscillating resonator connected to the clock lead; and (d) a clock generator that generates a system clock signal using the vibration of this resonator. (e) a digital filter having a multi-bit digital input routed through the input lead and oversampling the digital input based on the system clock signal; (f) a multi-bit digital signal from the digital filter is delta-sigma modulated based on the system clock signal to reduce the number of bits; (g) a noise shaper that sends out a digital signal and is formed as an integrated circuit on the integrated circuit board; a waveform shaping circuit formed as an integrated circuit on the integrated circuit board; (h) converting a pulse output sent from the waveform shaping circuit via the output lead into an analog output corresponding to the digital input; In the DA conversion device, the substrate electrode member is connected to one of the grounded and non-grounded power supply leads, and the substrate electrode member and the other power supply lead are connected to each other. A DA converter characterized in that a decoupling capacitor is connected between them.