JPS62276970A - Mos type solid-state image pickup element - Google Patents

Abstract

PURPOSE:To reduce clock noises generated at the outside of a chip by providing an arithmetic means for receiving output components of an output terminal pin and of pins adjacent to said output terminal pin to add the output components between the two pins in opposite phase. CONSTITUTION:An output signal from a photodiode constituting the chip 1 is fed to a preamplifier 4 through an output terminal pin 31. An output of a pin 32 adjacent to the pin 31 is fed to other inputs of the amplifier 4 and the pin 32 is not connected to the chip 1. A signal waveform superimposing a clock noise component N on a signal component S extracted by a drive pulse DP appears at the pin 31. Further, a clock noise bypassed along the path of the package nearly equal to the pin 31 appears at the pin 32. In applying the signal waveform to the amplifier 4 having an arithmetic means, the signals are added in opposite phase and only the signal component excluded with the clock noises appears at the amplifier output.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a MOSm solid-state image sensor, and more specifically, to an MO3 solid-state image sensor with reduced clock noise.

[Prior art]

Conventionally, MO5 type solid-state image sensors have large parasitic capacitance between the driving clock wiring and the output line, so the clock to
There is a problem in that the so-called clock noise caused by the pulses passing around to the output line is large, and the dynamic range of the preamplifier is therefore insufficient.

This clock noise is not only generated within the semiconductor chip, but also comes from outside the chip, such as from the cage, cable, socket, etc., and enters the output line, and its influence is very large.

One solution to reducing these clock noises is to narrow the band of the preamplifier, create a waveform that is compatible with the clock component mixed into the output signal line, and cancel it by adding the opposite phases.

[Problem that the invention seeks to solve]

However, the method described above requires a great deal of effort in dealing with the clock noise generated outside the chip. In other words, since such lock noise has large variations and does not have a constant frequency, it is necessary to adjust the amplitude and phase for each individual element in order to create a waveform for anti-phase addition. Met.

The present invention has been made based on the above-mentioned circumstances.
It is an object of the present invention to provide a MOS type solid-state image sensor that can easily reduce noise and improve productivity.

[Means and effects for solving the problems] That is, the above-mentioned object of the present invention is to provide a MOS type solid-state image pickup device in which a semiconductor chip is housed in a cage, and an output terminal pin and a portion adjacent to the output terminal pin. A MOS type solid-state image sensing element is achieved, which is characterized in that it has arithmetic means to which both output components of the pins are supplied, and the output components between the two pins are added in reverse phase.

That is, in the present invention, the clock noise that enters the outside of the chip, such as in the package and socket, is transmitted through the parasitic capacitance between the respective bins, and that the clock noise between adjacent pins is approximately the same. This was done based on the 5G fact.Therefore, by removing the clock signal by adding the negative phase between the output terminal pin of the cage and the bins adjacent to this pin, the output terminal pin Extract only the signal components from.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 shows a MOS image sensor that is an embodiment of the present invention.

This sensor is constructed by housing a MOS type semiconductor chip 1 in a cage 2 as in the conventional case, and the chip is shown in a simplified block diagram.

The MOS type semiconductor chip 1 may have any conventionally known circuit configuration, and is wire-bonded to conductor terminals (hereinafter referred to as pins) 3 of each electrode, rad, and cage.

An output signal from the photodiode constituting the chip 1 is supplied to the preamplifier 4 through an output terminal pin 31.

The other input of the preamplifier 4 includes the output terminal pin 3.
The chip 5 is provided so that the output component of the pin 32 adjacent to the chip 1 is supplied, and the adjacent pin 32 is provided in an NC (No-Connect) state where it is not connected to the chip 1.

Also, in history, pins 30 on both sides of the two pins 31 and 32
．． 33 are both grounded.

FIG. 2 shows the signal waveforms appearing at each pin 'VC, and the present invention will be further explained using this figure.

At the output terminal pin 31, a signal waveform appears on which the signal component SK extracted by the drive nozzle D and the clock noise component N are superimposed. Further, the adjacent pin 32 has approximately the same clock noise as the output terminal pin 31, which has gone around the cage.

Therefore, when these signal waveforms are supplied to the preamplifier 4 having calculation means, only signal components from which clock noise has been removed appear at the preamplifier output.

In the above embodiment element, the 2 input to the preamplifier 4 is
The amount of 30 degrees of pins on both sides of the two pins 31 and 32 is reduced. Note that the same effect can be obtained by adding a pulse that does not convert within the signal output time instead of grounding.

In addition, in the above-mentioned example element, the pin 32 adjacent to the output terminal pin 31 is not connected to the chip 1.
It is easily assumed that the same effect can be obtained not only in this state but also in a state in which the chip 1 is wire-bonded to the T-pole/Glad on the chip 1.

〔Effect of the invention〕

As described above, according to the MO5 type solid-state image sensor of the present invention, based on the fact that substantially the same clock noise circulates between the adjacent bins of the TTS cage, the signal terminal pin and the pin 8 in contact with the signal terminal pin are By performing anti-phase addition between the elements, even if there is clock noise that varies from element to element, v4 adjustment is not required and it can be easily reduced. Furthermore, since adjustment for each element is not required, productivity can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram illustrating one embodiment of the present invention, and FIG. 2 is a signal waveform diagram appearing at each pin of the /e cage. DESCRIPTION OF SYMBOLS 1... MOS type semiconductor chip, 2... Nogutsu cage, 3... Conductor terminal (bin), 31... Output terminal pin, 62... Adjacent bin, 4... Preamplifier'' ( (and 2 others) Figure 1 Figure 2

Claims (1)

[Scope of Claims] 1) A MOS type solid-state image pickup device containing a semiconductor chip in a package, which includes arithmetic means to which output components of an output terminal pin and a pin adjacent to the output terminal pin are both supplied. A MOS type solid-state image pickup device, wherein output components between the two pins are added in reverse phase. 2) The output terminal pin and the pins on both sides of the pin adjacent to the output terminal pin are grounded or provided with a configuration in which a pulse wave that does not change within the signal output time is supplied. The device according to range 1.