JPH04168922A - Uninterruptible power supply - Google Patents

Abstract

PURPOSE:To sustain parallel operation of inverters stably even upon occurrence of abnormality of common reference signal such as commercial power supply by providing first and second synchronism control circuits having specific functions respectively. CONSTITUTION:First and second synchronism control circuits 18, 19a, 19b are provided. When a first frequency reference signal fed from a direct transmission power supply 5 is normal, the first synchronism control circuit 18 outputs a frequency signal synchronized with the first frequency reference signal as a second frequency reference signal while when the first frequency reference signal is abnormal, the first synchronism control circuit 18 outputs its self- running oscillation frequency signal as a second frequency reference signal. The second synchronism control circuits 19a, 19b receive first and second frequency reference signals and output signals synchronized with any one reference signal, where the second synchronism control circuits 19a, 19b output their self-running oscillation frequency signals when both first and second frequency reference signals are abnormal. According to the constitution, parallel operation of inverters can be sustained stably even when the direct transmission power supply 5 is abnormal.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention is directed to a system in which a plurality of inverters and a commercial power source are operated in parallel while synchronizing with a common frequency reference signal of a commercial power source, etc. The present invention relates to an uninterruptible power supply that can supply power using either a direct power supply, and particularly relates to an uninterruptible power supply that stably continues parallel operation of inverters even when a common reference signal such as a commercial power supply is abnormal.

(Prior art) In an uninterruptible power supply system using an inverter, in order to improve its reliability, it is necessary to operate multiple inverters in parallel to create a configuration with sufficient redundancy for the load capacity. many.

In addition, by making it possible to switch between the common output of parallel operation inverters and direct power supply such as commercial power supply with a changeover switch, in the event that a serious problem such as a failure occurs in this parallel operation inverter, this changeover switch can be used to switch between direct power supply such as commercial power supply. This enables continuous power supply to the load. This configuration improves the reliability of power supply to the load. In such an uninterruptible power supply, it is necessary that the output phases of each inverter match each other, and that the output phase of the inverters also match the phase of the direct power supply.

FIG. 2 is a block diagram showing a conventional control device for parallel operation of this type of inverter. In the same figure, Units 1 and 2
Machines are distinguished by suffixes a and b. la, l
b is a DC bus, to which a DC voltage obtained by using a rectifier (not shown) for converting AC into DC, a storage battery, or a combination of both is supplied. 2a, 2
b is an inverter that converts this DC bus voltage into AC;
3a and 3b are AC filters for improving the waveform of the inverter output into a sine wave, 4a and 4b are circuit breakers for connecting or disconnecting each inverter in parallel, 5 is a commercial power source that serves as a direct power source, and 6.7 is a A stationary changeover switch (semiconductor switch) 8 is a load for switching between the inverter and the direct power supply without momentary interruption.

On the other hand, the control device is a phase difference detector (PHD)
.

111b, low pass filter (L P F ) 11
2a, 112b.

A synchronous control circuit (hereinafter referred to as a PLL circuit) consisting of a voltage controlled oscillator (VCO) 113a and 113b,
ring counters 12a and 12b which divide the output of the PLL circuits 11a and llb to generate gate pulses for each inverter; llb
active power deviation (ΔP) detection circuits 13a, 13b and phase correction circuits 17a, 17b to be applied to low-pass filters 112a, 112b of In this case, it is composed of phase reference changeover switches lea and 16b that switch from the direct power supply 5 to oscillators 14a and 14b as phase references for the PLL circuits 11a and llb.

Note that voltage control for correcting deviations in reactive power is actually required as control for parallel operation of the inverters, but this is omitted here.

The PLL circuit used for synchronous control is a well-known technology, and the detailed operation of the configuration that feeds back the active power deviation of each inverter output to the synchronous control circuit to correct the deviation is described in Japanese Patent No. 1215332 “Inverter Parallel operation equipment”.

The ΔP detection circuit 13 is set to PL when the direct power supply 5 is abnormal such as a power outage.
an oscillator 14a serving as a phase reference for the L circuits 11a and 11b;
The low-pass filter 112a, 112 is provided to correct a deviation in active power sharing caused by a phase shift due to a frequency deviation in the filter 14b.
voltage controlled oscillator 1 so that the deviation of b becomes zero.
The output frequency and phase of 13a and 113b are automatically controlled.

(Problem to be Solved by the Invention) However, in the above configuration, the oscillator 14
The outputs of the oscillators 11a and 14b are used as the phase reference for the PLL circuits 11a and 11b.In an abnormal situation such as a power outage, the output frequencies of the oscillators 14a and 14b do not completely match due to individual differences, and the inverters of each oscillator are The output phase difference changes. For this reason, it is necessary to set the gain K of the phase correction circuits 17a and 17b quite high to ensure sufficient phase correction. However, on the contrary, the active power deviation detection circuits 13a, 1
3b and the phase correction circuits L7a and L7b are also amplified and appear at high gains, so they are easily affected by temperature drift and temporal drift, and the circuit
It was not easy to adjust.

Further, there is also means 13a for detecting an active power deviation.

13b and the parts exchanged between each machine, the configuration is not necessarily simple, and the signals exchanged between them are analog signals, which cannot escape the influence of temperature drift and drift over time.

Therefore, the present invention has been made in view of the above points. It is an object of the present invention to provide an uninterruptible power supply device consisting of a plurality of inverters that is configured by adding a simple control device so as to continue operation.

[Structure of the Invention (Means for Solving the Problems)] In order to achieve the above object, the present invention provides a method for connecting either the output of a plurality of inverters operated in parallel or the output of a direct power source such as a commercial power source. In an uninterruptible power supply that can selectively supply power to a load using a changeover switch, the first synchronous control circuit is provided in common to the plurality of inverters, and the first synchronous control circuit is provided in each of the plurality of inverters to control the output frequency of the inverter. A second synchronous control circuit for controlling is provided, and the first synchronous control circuit generates a frequency signal synchronized with the first frequency reference signal when the first frequency reference signal obtained from the direct power source is normal. It has a function of outputting the free-running oscillation frequency signal of the first synchronous control circuit itself as the second frequency reference signal when the first frequency reference signal is abnormal. The second synchronization control circuit is applied with the first frequency reference signal and the second frequency reference signal, outputs a signal synchronized with one of the frequency reference signals, and outputs a signal synchronized with one of the frequency reference signals. If both of the second frequency reference signals are abnormal, the second synchronous control circuit has a function of outputting its own free-running oscillation frequency signal.

(Function) By configuring as described above, when the first frequency reference signal obtained from the direct power supply is normal, the first synchronization control circuit transfers the frequency signal synchronized with the first frequency reference signal to the second frequency reference signal. output as a frequency reference signal. Therefore, the first frequency reference signal and the second frequency reference signal input to the second synchronous control circuit of each inverter are exactly the same.

Next, if the first frequency reference signal becomes abnormal due to a power outage or the like, the first synchronous control circuit determines that the first frequency reference signal is abnormal, and the synchronous control circuit itself generates a free-running oscillation. The frequency signal is output as a second frequency reference signal. Therefore, the second frequency reference signal, which was synchronized with the first frequency reference signal until just before the abnormality occurred, switches to the free-running oscillation frequency signal without any interruption, so that the second frequency reference signal, which is also the common phase reference for each inverter, The frequency and phase switch to the frequency reference signal without jumps. The free-running oscillation frequency signal output by the first synchronous control circuit is
Set the value to a value that does not exceed the abnormality judgment criteria in the synchronous control circuit.

Therefore, regardless of whether the first frequency reference signal obtained from the direct power source 5 is normal or abnormal, each inverter is synchronized with the second synchronous reference signal that is the output of the uninterrupted first synchronous control circuit. The output of the uninterruptible power supply continues to operate stably and smoothly.

Furthermore, even if the first synchronous control circuit fails, the second synchronous control circuits of all inverters individually determine the abnormality of the second frequency reference signal, and the second synchronous control circuit Each inverter is controlled in synchronization with the reference signal.

Furthermore, even if the second frequency reference signal input to the second synchronous control circuit is not input to the second synchronous control circuit due to a break on its input terminal side, the broken second synchronous control circuit The first frequency reference signal is determined to be abnormal, and the inverter is controlled in synchronization with the first frequency reference signal. 1st
Since the frequency reference signal and the second frequency reference signal that should originally be input are exactly the same, the inverter on the disconnected second synchronous control circuit side continues to operate in synchronization with the other inverters.

Therefore, even if an abnormality occurs in the first synchronous control circuit and its peripheral circuits, which are common parts of the uninterruptible power supply with such a configuration, all inverters will be synchronized to the same frequency standard and the uninterruptible power supply will The output can continue stable and smooth operation.

(Embodiment) An embodiment of the present invention will be described below with reference to the block diagram of FIG.

In FIG. 1, the same parts as in FIG. 2 are given the same reference numerals, and their explanation will be omitted, and only the different points will be explained here.

That is, in FIG. 1, the first synchronous control circuit 18 includes a storage battery 21 for making the output frequency reference signal uninterruptible, and a power source 22 for the first synchronous control circuit that is made uninterruptible by the storage battery 21. It is equipped with

The first synchronous control circuit 18 includes a determination circuit 181 that determines whether the first frequency reference signal obtained from the direct power supply 5 such as a commercial power supply is abnormal; It is composed of a selection circuit 182 that instructs the PLL circuit 183 to output a free-running oscillation frequency that the circuit 183 itself oscillates at.

The selection circuit 182 further instructs the PLL circuit 183 to output a signal synchronized with the first frequency reference signal when it is determined that the first frequency reference signal is normal.

As a result, the free-running oscillation frequency of the PLL circuit 183 becomes a signal synchronized with the first frequency reference signal, the signal synchronized with this first frequency reference signal becomes the second frequency reference signal, and the first synchronous control circuit is output from.

Therefore, when the first frequency reference signal obtained from the direct power source is normal, the first synchronization control circuit 18 outputs a frequency signal synchronized with this first frequency reference signal as a second frequency reference signal, If the first frequency reference signal is abnormal, the synchronous control circuit outputs its own free-running oscillation frequency signal as the second frequency reference signal.

The second synchronous control circuit I9 provided in each inverter includes a determination circuit 191 to which the first frequency reference signal and the second frequency reference signal are applied and determines whether there is an abnormality in these reference signals, and a determination circuit 191 which determines whether there is an abnormality in these reference signals. The selection circuit 192 issues a command to the PLL circuit 193 to output a signal synchronized with the first frequency reference signal and a command to output a signal synchronized with the second frequency reference signal. Also, PLL circuit 1
93 has a function of outputting a free-running oscillation frequency signal that is oscillated by the PLL circuit itself when both the first and second frequency reference signals are abnormal, and furthermore, the PLL circuit has a function of outputting a free-running oscillation frequency signal that is oscillated by itself. However, each inverter has a ΔP detection circuit 13 shown in FIG. This is for correcting the deviation in active power sharing that occurs, and the free-running oscillation frequency of the PLL circuit 193 is controlled so that the deviation in active power sharing becomes zero.

Next, the present invention having the above-described configuration will be explained in detail.

When the direct power supply 5 is in a normal state, the first synchronous control circuit 18
Since the determination circuit 181 determines that the first frequency reference signal is normal, the output of the first synchronization control circuit 1B, that is, the second frequency reference signal, is controlled to be synchronized with the first frequency reference signal. Ru.

A first frequency reference signal and a second frequency reference signal are input to a second synchronous control circuit I9 provided in each inverter. Determination circuit 191 constituting the second synchronous control circuit
determines that both the first and second frequency reference signals are normal. Therefore, each inverter 2a, 2b is controlled by the second synchronous control circuit so as to be synchronized with the frequency of the direct power supply, and the inverters 2a and 2b are in phase with each other to perform stable parallel operation.

Next, if the direct power supply 5 becomes abnormal due to a power outage or the like, the determination circuit 181 of the first synchronous control circuit 18 immediately detects the abnormality, and the selection circuit 182 outputs a free-running oscillation frequency to the PLL circuit 183. command to do so.

Determination circuit 19 of second synchronous control circuit 19 of each inverter
1, the second frequency reference signal is determined to be normal, and the first frequency reference signal is determined to be abnormal. Therefore, each inverter 2a, 2b is controlled to be synchronized with the second frequency reference signal as in the normal state, and the inverters 2a and 2b are in phase with each other to continue stable parallel operation. In other words, even if an abnormality occurs in the first frequency reference signal, the second synchronous control circuit 1 of each inverter
Stable parallel operation continues without switching of both the synchronization function of 9 and the synchronization reference signal.

In addition, when the direct power supply 5 is abnormal, the output of the first synchronous control circuit L8 becomes a free-running oscillation frequency, so each inverter 2a,
2b is also indirectly controlled by the free-running oscillation frequency of the second synchronous control circuit 19.

In this way, in this embodiment, by providing a synchronous control circuit that operates synchronously with the direct power supply 5 and is made uninterruptible by the storage battery 21, even when the direct power supply is abnormal, the output of the common synchronous control circuit is Since each inverter is controlled as a reference, parallel operation control can be performed with a simple configuration that does not require phase correction due to active power deviation, and the problem of being susceptible to temperature drift and temporal drift is also solved.

Furthermore, even if the second frequency reference signal input to the second synchronous control circuit is not input to the second synchronous control circuit due to a break on its input terminal side, the broken second synchronous control circuit The first frequency reference signal is determined to be abnormal, and the inverter is controlled in synchronization with the first frequency reference signal. Since the first frequency reference signal and the second frequency reference signal that should originally be input are exactly the same, the inverter of the second synchronous control circuit that has been disconnected continues to operate in synchronization with the other inverters. In other words, the second synchronous control circuit duplicates the reference signal of each inverter between the direct power supply and the second synchronous control circuit, making it possible to construct a highly reliable system.

In the above-mentioned embodiment, control was described when two inverters were operated in parallel, but the present invention does not limit the number of inverters operated in parallel. Furthermore, although a PLL circuit is provided as a component of the synchronous control circuit, it may be constructed using feedback control using digital control or the like.

Further, to make the synchronous control circuit uninterruptible, instead of using a dedicated storage battery, a parallel output common bus voltage that combines the outputs of each inverter may be used.

[Effects of the Invention] As explained above, according to the present invention, temperature drift,
It is possible to provide an uninterruptible power supply device that is not easily affected by drift over time and can stably continue parallel operation even when the frequency reference signal obtained from a direct power source such as a commercial power source is abnormal.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an uninterruptible power supply according to the present invention, and FIG. 2 is a block diagram of a conventional uninterruptible power supply. la, lb...direct bus, 2a, 2b...inverter, 3a, 3b...AC filter, 4a, 4
b... Breaker, 5a, 5b... Direct bus, 6
, 7... Selector switch, 8a, 8b... Load,
11a, 11b-PLL circuit, 12a, 12
b...Ring counter, 13a, 13b -...ΔP
Detection circuit, 14a, 14b = - oscillator, 15a, 15b,... Judgment circuit, 18a, 16b... Phase reference changeover switch, 17a
, 17b... Phase correction circuit, 18... First synchronization control circuit, 181... Judgment circuit, 182... Selection circuit,
183... PLL circuit, 19a, 19b... second synchronous control circuit, 191a,
191b--determination circuit, 192a, 192b--
Selection circuit, 193a, 193b-PLL circuit, 21
...Storage battery, 22...Power supply. Agent Patent Attorney Noriyuki Chika Figure 1 2 rA Procedural Amendment (Method) % Formula % 1. Indication of the case Patent Application No. 2-293560 2. Name of the invention uninterruptible power supply device 3. Person making the amendment Relationship to the case Patent applicant (307) Toshiba Corporation 4, Agent Address: 1-1 Shibaura-chome, Minato-ku, Tokyo 105 February 12, 1991 (shipment date) 6. Drawings of the specification subject to amendment In Column 7 of the Brief Explanation, Contents of the Amendment In the bottom line of page 16 of the present specification, the statement "U2 is a conventional uninterruptible power supply" is corrected to "Fig. 2 is a conventional uninterruptible power supply."that's all

Claims (1)

[Scope of Claims] An uninterruptible power supply device capable of supplying power to a load by selecting either the output of a plurality of inverters operated in parallel or the output of a direct power source such as a commercial power source using a changeover switch, comprising: a first synchronous control circuit provided in common to the plurality of inverters; and a second synchronous control circuit provided to each of the plurality of inverters, the first synchronous control circuit being obtained from the direct power supply. When the first frequency reference signal is normal, a signal synchronized with this first frequency reference signal is output as a second frequency reference signal, and when the first frequency reference signal is abnormal, the first frequency reference signal is output as a second frequency reference signal. The free-running oscillation frequency signal of the synchronous control circuit itself is
The second synchronization control circuit has a function of outputting a frequency reference signal as a frequency reference signal, and the second synchronization control circuit is applied with the first frequency reference signal and the second frequency reference signal, and synchronizes with either of the frequency reference signals. If both the first and second frequency reference signals are abnormal, the second frequency reference signal is output.
The synchronous control circuit has a function of outputting a free-running oscillation frequency signal of its own, and connects each of the plurality of inverters to the second synchronous control circuit.
An uninterruptible power supply characterized in that it is controlled by a synchronous control circuit.